JPH0964278A - Semiconductor integrated circuit and its test method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce the chip area by scaling down the test circuit for evaluation of operation, and measure oscillatory frequency by changing it into other electric quantity, concerning a semiconductor integrated circuit. SOLUTION: This semiconductor integrated circuit is equipped with an inner circuit 11, an oscillation circuit 21 for test made of a bipolar transistor under the same process condition as the inner circuit 11 and an analog circuit element such as a capacity, etc., a number-of-pulses integrator 23, a switch SW1 for turning on or turning off the previous oscillatory frequency, based on the clock signals CLK, and a switch SW2 for resetting the output voltage of this integrator 23, based on the reset signal.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor integrated circuit (hereinafter referred to as LSI) and its test method,
In particular, the present invention relates to a test circuit and an AC test in a high frequency analog LSI composed of bipolar transistors.

[0002]

2. Description of the Related Art In recent years, along with the development of optical communication systems, analog LSIs have been developed in optical transmitters and receivers that operate at ultra-high frequencies of several hundred MHz to several GHz. A frequency characteristic test (hereinafter referred to as A
C test) is required. However, a dedicated tester having an input impedance of a few pF or less is required to observe an ultrahigh frequency waveform. Therefore, a test oscillator is mounted on the LSI and the input impedance is 10 to 100p.
A method of indirectly evaluating the operation of an LSI by using a general-purpose tester with an F of about 10 MHz is considered.

FIG. 7 is a block diagram showing an operation test of a digital LSI equipped with a ring oscillator. In FIG. 7, reference numeral 300 denotes an LSI to be tested, and an internal circuit 301 operating at an ultrahigh frequency of several tens to hundreds of MHz and an LSI test circuit 302 including a ring oscillator 1 and a frequency dividing circuit 2 on the same substrate. Is equipped with. The ring oscillator 1 is formed by cascade-connecting n stages of inverters, and its oscillation frequency fo is fo = 1 / (2ntpd), where tpd is the delay time related to the first stage of the gate. The frequency dividing circuit 2 is composed of m stages of T-type flip-flop circuits connected in series, and the frequency f1 divided here is fo / 2 ^m . In the digital LSI, the ring oscillator 1 and the frequency dividing circuit 2 are composed of field effect transistors.

[0004] 400 is a general-purpose tester
Connected to 0. Tester 400 is LSI test circuit 302
Is supplied with a power source Vcc, and the divided signal Sin from the frequency dividing circuit 2 is input to measure the oscillation frequency fo of the ring oscillator 1. An L to be tested equipped with such an LSI test circuit 302
In the operation test of SI300, the LSI test circuit 302 is operated while the operation of the internal circuit 301 is stopped, and the oscillation frequency of the ring oscillator 1 is measured.
It will indirectly evaluate whether the 301 is operating normally.

[0005]

By the way, several hundred MHz
-Analog LSI that operates at ultra-high frequencies of several GHz
As a test circuit of the above, a method of mounting a test circuit 302 of a digital LSI is considered. However, digital LSI
Although the test circuit 302 can accurately know the oscillation frequency of the ring oscillator, the n-stage inverter and the T-type flip-flop circuit are built in the high frequency analog LSI for the AC test. It occupies a large chip area.

Further, in a high-frequency analog LSI composed of bipolar transistors, since the number of inverters and T-type flip-flop circuits is small, it is not possible to configure the LSI test circuit 302 by using them as well. If the n-stage inverter or the T-type flip-flop circuit is intentionally constructed by bipolar transistors, the number of inverters of the ring oscillator reaches hundreds in an analog LSI whose operating frequency is several hundred MHz to several GHz. In addition, the number of transistors of the T-type flip-flop circuit that divides the oscillation frequency also increases, and these test circuits occupy a larger chip area than internal circuits.

The present invention was created in view of the problems of the conventional example, and aims to reduce the chip area by reducing the size of the test circuit for operation evaluation, and to reduce the oscillation frequency to other values. It is an object of the present invention to provide a semiconductor integrated circuit that can be measured by changing it into an electric quantity and a test method thereof.

[0008]

As shown in FIG. 1, a first semiconductor integrated circuit of the present invention is a test formed by an internal circuit and a circuit element under the same process condition as the internal circuit. And a conversion circuit for converting the oscillation frequency of the oscillation circuit into a measurable quantity of electricity.

In the first semiconductor integrated circuit of the present invention,
Preferably, the conversion circuit samples the output signal of the oscillation circuit for a certain period and outputs a DC voltage. The second semiconductor integrated circuit of the present invention is characterized in that the conversion circuit analog-divides the oscillation frequency and outputs a frequency lower than the oscillation frequency.

In the second semiconductor integrated circuit of the present invention,
Preferably, the conversion circuit comprises an integrator for sampling the output signal of the oscillation circuit and a reset circuit for discharging the output voltage of the integrator. In the second semiconductor integrated circuit of the present invention, preferably, the integrator is a differentiation circuit that inputs the output signal of the oscillation circuit and outputs a pulse of a constant width, and a rectifier that rectifies the output signal of the differentiation circuit. It is characterized by comprising a circuit.

The third semiconductor integrated circuit of the present invention is preferably characterized in that the conversion circuit comprises a one-shot circuit or a delay circuit. A semiconductor integrated circuit testing method according to the present invention measures a test oscillation circuit and an oscillation frequency of the oscillation circuit with a circuit element having the same process condition as that of a semiconductor integrated circuit operated at a high frequency that is difficult to measure directly by a test apparatus. A conversion circuit for converting into a possible quantity of electricity is previously formed and placed in the same substrate, and at the time of testing the semiconductor integrated circuit, the test oscillation circuit formed in the same substrate is oscillated and the oscillation circuit of the oscillation circuit The oscillation frequency is converted into a measurable quantity of electricity, and the operating frequency of the semiconductor integrated circuit is estimated from the quantity of electricity.

In the test method of the present invention, preferably,
The measurable quantity of electricity is obtained by an integration method in which a current is switched by an output signal of an oscillating circuit to achieve the above object.

[0013]

[Operation] According to the semiconductor integrated circuit of the present invention, since the test oscillation circuit and the conversion circuit are formed by the circuit elements under the same process conditions as the internal circuit, the oscillation frequency of the oscillation circuit is tested by the conversion circuit. It is possible to estimate the operating frequency of the internal circuit that operates at a high frequency, which is difficult to measure with the test equipment, by converting the electrical quantity such as DC voltage or low frequency that can be measured by the device and monitoring this electrical quantity. become.

[0014]

Embodiments of the present invention will now be described with reference to the drawings. 1 to 6 are explanatory views of a semiconductor integrated circuit and a test method thereof according to an embodiment of the present invention. (1) Description of First Embodiment FIG. 1 is a block diagram of a high frequency analog IC and its LSI test circuit according to a first embodiment of the present invention. In FIG. 1 (A), 100 is an LSI to be tested, which outputs an internal circuit 11 operating at an ultrahigh frequency of several hundred MHz to several GHz and an electric quantity for evaluation of this internal circuit 11 on the same substrate. And an LSI test circuit 12 that operates.

Reference numeral 200 denotes a general-purpose tester, which is used to test the LSI 10 to be tested.
Connect to 0 to use. The tester 200 is an LSI test circuit 12
Supply a power supply VCC, a reset signal (hereinafter referred to as RST signal) and a clock signal (hereinafter referred to as CLK signal) to L
The frequency of oscillation in the LSI test circuit 12 is calculated by measuring the DC voltage from the SI test circuit 12.

In FIG. 1B, the LSI test circuit 12
Includes a test oscillation circuit 21 and a frequency-voltage conversion circuit 22 that converts the oscillation frequency of the oscillation circuit 21 into a measurable DC voltage (electric quantity). Test oscillator 2
1 will be described with reference to FIG. The frequency-voltage conversion circuit 22 includes a switch SW1 for sampling, an integration circuit that integrates the number of pulses (hereinafter also referred to as a pulse number integrator).
23 and a reset switch SW2. The switch SW1 outputs the output signal Vf of the oscillator 21 to the pulse number integrator 23 based on the CLK signal from the general-purpose tester 200. The pulse number integrator 23 differentiates the oscillation voltage (frequency f0) Vf of the oscillator 21, samples the differentiated pulse for a certain period of time, and outputs a DC voltage. The integrator 23 includes a capacitor C1 and a resistor R1 that output a differential pulse, and diodes D1 and D2 that form a rectifier circuit.
And a capacitor C2. The switch SW2 resets the DC voltage of the rectifier circuit based on the reset signal. The capacitor C1 and the resistor R1 form a differentiating circuit.

The test oscillator 21 is shown in FIG. 2 as a simple analog amplifier 201, a negative feedback resistor RF,
It consists of a capacitor CF for oscillation. Amplifier 201 has internal circuit 1
1 and npn-type bipolar transistors Q1 and Q2 formed under the same process conditions and resistors R11 to R13. The collector of transistor Q1 is connected to power supply line Vcc through resistor R11, its base is connected to the input, and its emitter is connected to ground line GND. The collector of transistor Q2 is connected to power supply line Vcc through resistor R12, its base is connected to the collector of transistor Q1, and its emitter is connected to one end of resistor R13. The other end of the resistor R13 is connected to the ground line GND. The oscillation signal Vf is output from the collector of the transistor Q2.

The feedback resistor RF is a resistor formed under the same process conditions as the internal circuit 11, and RF is connected between the other end of the resistor R13 and the base of the transistor Q1. The capacitance CF is composed of an npn-type bipolar transistor formed under the same process conditions as the internal circuit 11, and uses its junction capacitance. CF
Has a short-circuited emitter and collector connected between the collector of the transistor Q2 and the base of the transistor Q1. This oscillator 21 constitutes an RC oscillation circuit. The oscillation frequency fo of this circuit is most dependent on the feedback resistance RF and the capacitance CF, but the number of current paths during charging / discharging is not one, and the parameter of the transistor affects the oscillation frequency. fo = 1 /
Does not become (2πR ・ C).

Next, the LSI test method of this embodiment will be described. In this test, the operating frequencies of the internal circuit 11 and the LSI test circuit 12 cannot be directly measured by the tester 200, and a high-frequency analog IC (test LSI 100) that operates at a frequency of several hundred MHz to several GHz is used.
Is the target. In such an analog IC, it is premised that the oscillation frequency fo has a correlation with the frequency characteristic (AC characteristic) of the LSI. Therefore, in advance, analog circuits such as bipolar transistors and junction capacitors under the same process conditions as the internal circuit 11 are used. Oscillation circuit 21 for test by circuit element and DC that can measure oscillation frequency of this circuit 21
It is necessary to form and place the frequency-voltage conversion circuit 22 for converting the voltage in the same substrate.

When testing the LSI under test 100,
The test oscillation circuit 21 formed in the same substrate is oscillated. Prior to this, as shown in FIG. 1A, the tester 200 and the LSI under test 100 are connected and placed. Tester 20
The power supply Vcc, the RST signal and the CLK signal are supplied from 0 to the LSI test circuit 12, and the internal circuit 1 of the LSI under test 1 is tested.
No power is supplied to 1. This causes the internal circuit 11 to stop operating.

As a result, the oscillator 21 oscillates a signal having a frequency of several hundred MHz as shown in FIG. Since the oscillation voltage Vf is output to the frequency-voltage conversion circuit 22,
In the circuit 22, S based on the CLK signal and the RST signal
W1 and SW2 are switch-controlled. That is, CL
K signal is "H" (high) level, RST signal is "L"
During the sampling period when the level is reached, SW1 is turned on and S
Since W2 is turned off, the oscillation voltage Vf is differentiated by the resistance R1 and the capacitance C1 of the Pal number integration circuit 23. The differential signal Sd in the sample period is rectified by the diodes D1 and D2, and the rectified voltage in the sample period is charged in the capacitor C2.

Then, during the hold period in which the CLK signal is at "L" level, SW1 is turned off and the RST signal =
Since the SW2 is turned on by the "H" level, the DC voltage Vx stored in C2 is discharged and the DC voltage Vx is reset. Immediately before switching from the sample period to the hold period, the tester 200 can measure the DC voltage Vx proportional to the oscillation frequency fo of the oscillation circuit 21.

The DC voltage Vx charged in the capacitor C2 during this sampling period is proportional to the number of differential signals Sd, and the number of differential signals Sd is proportional to the oscillation frequency fo. Therefore,
The tester 200 can calculate the oscillation frequency fo of the oscillation circuit 21 from the DC voltage Vx, and as a result, can estimate the operating frequency of the LSI under test 100. For example, the LSI 10 to be tested is previously simulated by simulation.
As an expected value for estimating the operating frequency of 0, the number of the differential signal Sd when the sampling period is arbitrarily set and the value of the DC voltage Vx expected to be measured by the tester 200 are calculated and set. The oscillation frequency of the LSI test circuit 12 is estimated from the amount of deviation between the actual value and the actual value.

In this way, according to the LSI under test 100 of the first embodiment of the present invention, as shown in FIG. 1, the test oscillator circuit 21 is a bipolar transistor under the same process conditions as the internal circuit 11, Since it is formed by a junction capacitance or the like, the oscillation voltage Vf of the oscillation circuit 21
Is converted into a DC voltage that can be measured by the tester 200 by the frequency-voltage conversion circuit 22, and this DC voltage Vx is monitored to directly measure several hundred MH, which is difficult for the tester 200 to measure.
Internal circuit 11 operated at a super high frequency of z to several GHz.
The operating frequency of can be estimated.

As a result, it is not necessary to form an n-stage inverter or a T-type flip-flop circuit with bipolar transistors just for the AC test.
The SI test circuit 12 is smaller than the internal circuit 11, and the ratio of the LSI test circuit 12 for operation evaluation to the chip area is small. In this test, it is not necessary to directly know the oscillation frequency fo, and the measurement accuracy is inferior to that of the conventional example, but it is characterized in that it can be easily evaluated whether or not the operating frequency of the internal circuit 11 is within the allowable range. . That is, in this embodiment, it is sufficient to check whether or not there is a large shift in the operating frequency for a normal LSI.

(2) Description of Second Embodiment FIGS. 4A and 4B show L according to the second embodiment of the present invention.
The block diagram of the SI test circuit and the operation waveform diagram of the frequency divider circuit are shown. In the second embodiment, unlike the first embodiment,
The oscillation frequency fo is divided and converted into a low frequency, and this low frequency is measured by a general-purpose tester.

In FIG. 4A, reference numeral 32 is a frequency dividing circuit, which divides the oscillation frequency fo of the test oscillation circuit 21 in an analog manner and outputs a low frequency signal to a general-purpose tester (not shown). Is. The frequency dividing circuit 32 is a pulse number integrator 2
3 and a reset circuit 24. The reset circuit 24 outputs the output voltage Vout of the pulse number integrator 23 and the reference voltage VR ±
a hysteresis comparator 401 that compares α with VR
It comprises a reference power supply 402 that generates ± α, a feedback resistor R1 that determines the gain of the comparator 401, a reference resistor R2 that determines VR ± α, and a reset switch SW that discharges the output voltage Vout. Other configurations and those having the same names as those in the first embodiment have the same functions, and therefore their explanations are omitted.

The operation of this embodiment will be described. First, similarly to the first embodiment, the test oscillation circuit 21 and the oscillation frequency of this circuit 21 can be measured in advance by analog circuit elements such as bipolar transistors and junction capacitors under the same process conditions as the internal circuit 11. The frequency dividing circuit 32 for converting to a low frequency is formed and placed in the same substrate. Then, when the LSI under test is tested, the test oscillation circuit 21 formed in the same substrate is oscillated as in the first embodiment. The oscillator 21 is several hundreds M as shown in FIG.
It oscillates a signal with a frequency of Hz. This oscillation voltage Vf
Is output to the frequency dividing circuit 32, the output voltage Vout of the pulse number integrator 23 and the reference voltage VR ± α are compared by the hysteresis comparator 401 in the circuit 32. When the output voltage Vout is smaller than the reference voltage VR + α, the comparator 401 switches the switch SW to the RS of the “L” level.
Since the T signal is output, the SW is turned off in response to the RST signal = “L” level. As a result, the output voltage Vout of the pulse number integrator 23 sequentially increases. In addition, the comparator 40
1 outputs the "H" level RST signal to the switch SW when the output voltage Vout exceeds the reference voltage VR + α, so that the SW receives the RST signal = "H" level and turns on. As a result, the output voltage Vout of the pulse number integrator 23
Discharges. Here, the output voltage Vout is the reference voltage VR +
Discharge at α (sampling reset), reference voltage VR-
Since charging (starting) occurs at α, a sawtooth voltage waveform is obtained. By measuring the output voltage Vout of the pulse number integrator 23 during the sampling period in which the reference voltage VR ± α is used as a threshold value, the oscillation frequency fo of the oscillation circuit 21 can be divided, and a low frequency signal can be generated. It becomes possible to measure with a general-purpose tester (not shown).

This sample period is, for example, the oscillation frequency fo
Assuming that it is 100 times the one cycle (several ns),
A signal obtained by dividing the oscillation frequency fo by 1/100 is repeatedly measured by the general-purpose tester. Therefore, since the oscillation frequency fo of the test oscillator 21 can be calculated back from this frequency-divided signal, the operating frequency of the internal circuit formed under the same process conditions as the LSI test circuit can be estimated, as in the first embodiment.

As described above, according to the LSI test circuit of the second embodiment of the present invention, the oscillation circuit for the test is previously prepared by using the analog circuit element such as the bipolar transistor and the junction capacitance under the same process condition as the internal circuit. Two
Since 1 and the frequency dividing circuit 32 for converting the oscillation frequency of the circuit 21 into a measurable low frequency are formed in the same substrate, the frequency dividing circuit 32 divides the oscillation frequency fo into a low frequency. By converting and measuring this low frequency with a general-purpose tester, it is possible to directly estimate the operating frequency of the internal circuit operated at an ultrahigh frequency of several hundred MHz to several GHz, which is difficult to measure with a general-purpose tester.

As a result, as in the first embodiment, the n-stage inverter, the T-type flip-flop circuit, etc. do not have to be formed of bipolar transistors just for the AC test, and these LSI test circuits can be used. The size is smaller than that of the internal circuit, and the ratio of these to the chip area is small. In this test, although the measurement accuracy is inferior as in the first embodiment, it can be easily evaluated whether or not the operating frequency of the internal circuit is within the allowable range.

(3) Description of Third Embodiment FIGS. 5A and 5B show L according to the third embodiment of the present invention.
The block diagram of the test circuit in SI and the waveform diagram of the integrating circuit are shown. The third embodiment differs from the first embodiment in that the pulse number integrator is simplified. In FIG. 5 (A), 33 is a current switching integration circuit, which receives a switch SW that is turned on / off by an oscillation voltage Vf of a test oscillation circuit 21, a current source 34 that supplies a current i, and a current i. It consists of a capacitor C that charges electric charges. The other configurations and those having the same names as those of the first and second embodiments have the same functions, and thus the description thereof will be omitted.

In the integration circuit 33, when the switch SW is turned on / off by the oscillation voltage Vf of the oscillation circuit 21,
The output voltage indicated by VOUT = (1 / C) idt in FIG. 4B is obtained. This voltage is obtained by integrating the current i with the oscillation frequency fo (integration method). Therefore, in the tester, the output voltage VOUT from the oscillation circuit 21
Oscillation frequency fo can be calculated, and the LSI under test can be calculated.
The operating frequency of can be estimated.

(4) Description of Fourth Embodiment FIGS. 6 (A) and 6 (B) show L according to the fourth embodiment of the present invention.
The block diagram of SI test circuit and the operation | movement waveform diagram of the one-shot circuit are shown. In the fourth embodiment, unlike the first to third embodiments, the conversion circuit is composed of a one-shot circuit or a delay circuit.

In FIG. 6A, reference numeral 40 is a one-shot circuit (monostable multivibrator), which is an oscillation circuit 2.
Inverter 41 for inverting and delaying oscillation voltage Vf of No. 1 and resistor R and capacitance C for differentiating the output signal of inverter 41
And a two-input AND circuit 42 that takes the AND logic of the differential signal X and the oscillation voltage Vf. Other configurations and those having the same names as those in the first embodiment have the same functions, and therefore their explanations are omitted.

In this way, since the conversion circuit of the LSI test circuit according to the fourth embodiment of the present invention is composed of the one-shot circuit or the delay circuit, the inverter 41 is used.
As shown in FIG. 6B, the oscillation voltage Vf is inverted and delayed, and when this voltage is differentiated by the resistor R and the capacitance C, the differential signal X and the oscillation voltage Vf are two-input AND.
The circuit 42 takes AND logic.

As a result, the differential pulse can be output to the rectifier circuit in the subsequent stage, and the measurement accuracy of the DC voltage Vx is improved. The conversion circuit may be a delay circuit.

[0038]

As described above, according to the semiconductor integrated circuit of the present invention, since the test oscillation circuit and the conversion circuit are formed by the circuit elements having the same process conditions as the internal circuit, the oscillation of the oscillation circuit is generated. By converting the frequency into an electric quantity such as a DC voltage and a low frequency and monitoring the electric quantity with a test device capable of measuring the electric quantity, the operating frequency of the internal circuit operated at a high frequency, which is difficult to measure, can be estimated directly.

As a result, although the measurement accuracy is lower than that of the conventional example, it is not necessary to form an n-stage inverter, a T-type flip-flop circuit, or the like on the LSI under test just for the AC test. The test circuit can be downsized.

[Brief description of drawings]

FIG. 1 is a configuration diagram at the time of a test of an analog IC for super high frequency according to a first embodiment of the present invention and a configuration diagram of an LSI test circuit.

FIG. 2 is an internal configuration diagram of an oscillator (OSC) according to each embodiment of the present invention.

FIG. 3 is an operation waveform diagram of the LSI test circuit according to the first embodiment of the present invention.

FIG. 4 is a configuration diagram of an LSI test circuit according to a second embodiment of the present invention and an operation waveform diagram of a frequency divider circuit thereof.

FIG. 5 is a configuration diagram of an LSI test circuit according to a third embodiment of the present invention and an operation waveform diagram of its integrating circuit.

FIG. 6 is a configuration diagram of an LSI test circuit according to a fourth embodiment of the present invention and an operation waveform diagram of its one-shot circuit.

FIG. 7 is an LS to which a ring oscillator according to a conventional example is applied.
It is an explanatory view of an I test circuit.

[Explanation of symbols]

1 ... Ring oscillator, 2 ... TFF circuit, 11, 301 ...
Internal circuit, 12, 302 ... LSI test circuit, 21 ... Test oscillator, 22 ... Frequency-voltage conversion circuit, 23, 33 ...
Integrator circuit (pulse number integrator), 24 ... Reset circuit, 3
2 ... Frequency divider circuit, 40 ... One shot circuit (monostable multivibrator), 41 ... Inverter, 42 ... Two-input AN
D circuit, 100, 300 ... Semiconductor integrated circuit, 200, 400 ... Tester, 201 ... Analog amplifier, 401 ... Hysteresis comparator, 402 ... Reference power source.

Claims (8)

[Claims] 1. An internal circuit, an oscillating circuit for testing formed by a circuit element under the same process condition as that of the internal circuit, and a conversion circuit for converting an oscillating frequency of the oscillating circuit into a measurable quantity of electricity. A semiconductor integrated circuit characterized in that. 2. The semiconductor integrated circuit according to claim 1, wherein the conversion circuit samples the output signal of the oscillation circuit for a certain period and outputs a DC voltage. 3. The semiconductor integrated circuit according to claim 1, wherein the conversion circuit divides the oscillation frequency and outputs a frequency lower than the oscillation frequency. 4. The semiconductor integrated circuit according to claim 1, wherein the conversion circuit includes an integrator that samples the output signal of the oscillation circuit and a reset circuit that discharges the output voltage of the integrator. 5. The integrator according to claim 4, wherein the integrator comprises a differentiating circuit for making the output signal of the oscillating circuit a pulse of a constant width, and a rectifying circuit for rectifying the output signal of the differentiating circuit. Semiconductor integrated circuit. 6. The semiconductor integrated circuit according to claim 1, wherein the conversion circuit comprises a one-shot circuit or a delay circuit. 7. An oscillation circuit for testing and an oscillation frequency of the oscillation circuit are converted into a measurable quantity of electricity by a circuit element under the same process condition as a semiconductor integrated circuit operated at a high frequency that is difficult to measure directly by a test apparatus. And a conversion circuit to be formed on the same substrate in advance, and when the semiconductor integrated circuit is tested, the test oscillation circuit formed on the same substrate is oscillated, and the oscillation frequency of the oscillation circuit can be measured. A method for testing a semiconductor integrated circuit, which comprises converting to an electric quantity and estimating the operating frequency of the semiconductor integrated circuit from the electric quantity. 8. The method for testing a semiconductor integrated circuit according to claim 7, wherein the measurable quantity of electricity is obtained by an integration method in which a current is switched by an output signal of the oscillation circuit.