CN217425555U - Capacitor storage capacity measuring circuit - Google Patents

Capacitor storage capacity measuring circuit Download PDF

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Publication number
CN217425555U
CN217425555U CN202220818200.8U CN202220818200U CN217425555U CN 217425555 U CN217425555 U CN 217425555U CN 202220818200 U CN202220818200 U CN 202220818200U CN 217425555 U CN217425555 U CN 217425555U
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capacitor
schmitt trigger
nand gate
crystal oscillator
output end
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CN202220818200.8U
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Inventor
李茂隆
万分龙
陈琼
黄魁英
陈勉华
王春
曾云
夏枫耿
杜少平
涂旭超
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Guangzhou Institute Of Microbiology Group Co ltd
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Guangzhou Institute Of Microbiology Co ltd
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    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E60/00—Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation
    • Y02E60/10—Energy storage using batteries

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Abstract

The utility model discloses a capacitor storage capacity measuring circuit, which comprises a capacitor to be measured, a semiconductor constant current device, a comparator, an AND gate, a counter and a crystal oscillator oscillation starting and shaping loop; the capacitor to be tested is connected with the semiconductor constant current device, two input ends of the comparator are respectively connected with two ends of the semiconductor constant current device, the output end of the comparator is connected with one input end of an AND gate, the other input end of the AND gate is connected with the output end of the crystal oscillator oscillation starting and shaping loop, and the output end of the AND gate is connected with a counter; the utility model relates to a condenser stored power measuring circuit, but wide application in capacitance measurement technical field.

Description

Capacitor storage capacity measuring circuit
Technical Field
The utility model belongs to the technical field of electric capacity electric quantity test technique and specifically relates to a condenser storage capacity measuring circuit.
Background
The capacitor is used as a simple and reliable energy storage component, is widely applied to various electronic circuits, and plays roles in isolating direct current and alternating current, coupling, bypassing, filtering, tuning a circuit, energy conversion, control and the like during the normal working process of the electronic circuits. However, after the electronic circuit stops supplying power, the capacitor still has a certain amount of charge as an energy storage element, if the amount of charge stored is large enough, the risk of electric shock is caused by carelessness, and in order to judge whether the capacitor has the risk of electric shock after power failure, the amount of charge stored in the capacitor needs to be measured. The current common method for measuring the stored electric quantity of the capacitor in the loop is a resistance discharge oscilloscope current integration method, but the method has higher requirements on experimental instruments, an oscilloscope meeting the requirements and a corresponding current detection receiving sensor need to be purchased, and the test cost is higher; and the resistor can consume part of electric quantity in the discharging process, and the accuracy of data is influenced.
SUMMERY OF THE UTILITY MODEL
In view of this, the embodiment of the present invention provides a capacitor storage capacity measuring circuit with high accuracy and low cost.
The embodiment of the utility model provides a condenser stored energy measuring circuit, include: the device comprises a capacitor to be tested, a semiconductor constant current device, a comparator, an AND gate, a counter and a crystal oscillator oscillation starting and shaping loop; the capacitor to be tested is connected with the semiconductor constant current device, two input ends of the comparator are respectively connected with two ends of the semiconductor constant current device, the output end of the comparator is connected with one input end of the AND gate, the other input end of the AND gate is connected with the output end of the crystal oscillator oscillation starting and shaping loop, and the output end of the AND gate is connected with the counter.
Optionally, the semiconductor constant current device comprises at least one of a constant current diode and a constant current triode.
Optionally, the crystal oscillator oscillation starting and shaping loop comprises a quartz crystal oscillator; one end of the quartz crystal oscillator is connected with a first capacitor, the other end of the quartz crystal oscillator is connected with a second capacitor, and the first capacitor and the second capacitor are respectively connected with a ground wire.
Optionally, the crystal oscillator oscillation starting shaping loop further includes a first resistor, a second resistor, and a first nand gate schmitt trigger; the input end of the first NAND gate Schmitt trigger is connected with the quartz crystal oscillator after being short-circuited, one end of the first resistor is connected with the quartz crystal oscillator, the other end of the first resistor is connected with the output end of the first NAND gate Schmitt trigger, and the second resistor is connected with the first NAND gate Schmitt trigger in parallel.
Optionally, the crystal oscillation starting and shaping loop further includes a second nand gate schmitt trigger and a third capacitor; the input end of the second NAND gate Schmitt trigger is connected with the output end of the first NAND gate Schmitt trigger after being short-circuited, the output end of the second NAND gate Schmitt trigger is connected with the input end of the third capacitor, and the output end of the third capacitor is the output end of the crystal oscillator oscillation starting shaping loop.
Optionally, the crystal oscillator shock starting and shaping loop further includes a third nand gate schmitt trigger, a fourth nand gate schmitt trigger, a third resistor and an indicator light; the input end of the third NAND gate Schmitt trigger is connected with the output end of the first NAND gate Schmitt trigger after being short-circuited, the input end of the fourth NAND gate Schmitt trigger is connected with the output end of the third NAND gate Schmitt trigger after being short-circuited, the indicator light is connected with the fourth NAND gate Schmitt trigger in parallel, and the third resistor is connected with the indicator light in series.
Above-mentioned the utility model discloses technical scheme in the embodiment has following advantage: the embodiment of the utility model comprises a capacitor to be tested, a semiconductor constant current device, a comparator, an AND gate, a counter and a crystal oscillator oscillation starting and shaping loop; the capacitor to be tested is connected with the semiconductor constant current device, two input ends of the comparator are respectively connected with two ends of the semiconductor constant current device, the output end of the comparator is connected with one input end of an AND gate, the other input end of the AND gate is connected with the output end of the crystal oscillator oscillation starting and shaping loop, and the output end of the AND gate is connected with a counter; according to the embodiment, the current can be discharged through the semiconductor constant current device, so that the electric quantity loss of the resistor is reduced, and the measurement accuracy is improved; in addition, the embodiment can also use the crystal oscillator oscillation shaping loop and the counter to calculate the charge quantity of the capacitor to be measured, and the measurement cost is reduced.
Drawings
Fig. 1 is the overall structure block diagram of the capacitor storage capacity measuring circuit of the present invention.
Detailed Description
The invention will be further explained and explained with reference to the drawings and the embodiments in the following description.
The embodiment provides a capacitor storage capacity measuring circuit, which comprises a capacitor to be measured, a semiconductor constant current device, a comparator, an AND gate, a counter and a crystal oscillator oscillation starting and shaping loop; the capacitor to be tested is connected with the semiconductor constant current device, two input ends of the comparator are respectively connected with two ends of the semiconductor constant current device, the output end of the comparator is connected with one input end of the AND gate, the other input end of the AND gate is connected with the output end of the crystal oscillator oscillation starting and shaping loop, and the output end of the AND gate is connected with the counter.
Wherein, the embodiment of the utility model provides an in the embodiment of the electric capacity that awaits measuring discharges semiconductor constant current device in the twinkling of an eye at the outage, measures the electric charge total amount of the electric capacity that awaits measuring through the electric current that continuously gathers and flow through semiconductor constant current device. According to the embodiment, the semiconductor constant current device is used for measurement, so that the electric quantity loss of the resistor can be reduced, and the data accuracy is improved. In addition, in the embodiment, two input ends of the comparator are respectively connected with two ends of the semiconductor constant current device, the comparator compares the voltage values of the two ends of the semiconductor constant current device, when the anode voltage of the semiconductor constant current device is higher than the cathode voltage, the comparator outputs a high level, otherwise, the comparator outputs a low level. The output end of the comparator is connected with one input end of the AND gate, the other input end of the AND gate is connected with the output end of the crystal oscillator oscillation starting and shaping loop, when the input end of the AND gate receives a high level, the signal of the output end is consistent with the signal of the other input end, and when the input end of the AND gate is at a low level, the AND gate always outputs a low level no matter how the signal of the other end changes. The output end of the AND gate is connected with a counter which provides a clock for counting through a quartz crystal oscillator in a crystal oscillator oscillation starting and shaping loop.
Further as a preferred embodiment, the semiconductor constant current device includes at least one of a constant current diode and a constant current triode.
Wherein, the embodiment of the utility model provides an in the semiconductor constant current device can adopt constant current diode or constant current triode to can adopt a plurality of constant current diodes or constant current triode to use with the form of connecting in parallel according to the electric current size condition.
Further as a preferred embodiment, the crystal oscillator oscillation starting shaping loop comprises a quartz crystal oscillator; one end of the quartz crystal oscillator is connected with a first capacitor, the other end of the quartz crystal oscillator is connected with a second capacitor, and the first capacitor and the second capacitor are respectively connected with a ground wire.
In order to measure stably, accurately and reliably, the quartz crystal oscillator is used for providing a clock in the embodiment, the quartz crystal oscillator with proper frequency can be selected according to the requirement of the resolution of the test time, and the time is more accurate when the frequency of the quartz crystal oscillator is higher. The first capacitor and the second capacitor are crystal oscillator load capacitors which can be matched with a crystal oscillator and a circuit, so that the circuit is easy to start oscillation and is in a reasonable excitation state to finely adjust the frequency.
Further as a preferred embodiment, the crystal oscillator oscillation starting shaping loop further comprises a first resistor, a second resistor and a first nand gate schmitt trigger; the input end of the first NAND gate Schmitt trigger is connected with the quartz crystal oscillator after being in short circuit, one end of the first resistor is connected with the quartz crystal oscillator, the other end of the first resistor is connected with the output end of the first NAND gate Schmitt trigger, and the second resistor is connected with the first NAND gate Schmitt trigger in parallel.
In this embodiment, the oscillation-starting shaping circuit of the crystal oscillator further includes a first resistor, a second resistor and a first nand-gate schmitt trigger, where the first resistor plays a role in adjusting the driving potential to prevent the crystal oscillator from being overdriven to work above the higher harmonic frequency. The second resistor is a feedback resistor, and the first NAND gate Schmitt trigger is in a linear working area when initially working, and the value is generally larger than 1M omega. The first NAND gate Schmitt trigger provides a positive feedback circuit for two ends of the quartz crystal oscillator to form an oscillation starting condition, and simultaneously shapes a standard square wave to facilitate the operation of a counter.
Further as a preferred embodiment, the crystal oscillator oscillation starting shaping loop further includes a second nand gate schmitt trigger and a third capacitor; the input end of the second NAND gate Schmitt trigger is connected with the output end of the first NAND gate Schmitt trigger after being in short circuit, the output end of the second NAND gate Schmitt trigger is connected with the input end of the third capacitor, and the output end of the third capacitor is the output end of the crystal oscillator oscillation starting shaping loop.
The input end of the second NAND gate Schmitt trigger is connected with the output end of the first NAND gate Schmitt trigger after being short-circuited, the output end of the second NAND gate Schmitt trigger is connected with the input end of the third capacitor, the second NAND gate Schmitt trigger plays a role in buffering and isolating, the third capacitor is used for isolating direct-current components in the crystal oscillation circuit, and the output end of the third capacitor is used as the output end of the crystal oscillation starting and shaping loop.
Further as a preferred embodiment, the crystal oscillator oscillation starting shaping circuit further comprises a third nand gate schmitt trigger, a fourth nand gate schmitt trigger, a third resistor and an indicator light; the input end of the third NAND gate Schmitt trigger is connected with the output end of the first NAND gate Schmitt trigger after being short-circuited, the input end of the fourth NAND gate Schmitt trigger is connected with the output end of the third NAND gate Schmitt trigger after being short-circuited, the indicator light is connected with the fourth NAND gate Schmitt trigger in parallel, and the third resistor is connected with the indicator light in series.
The crystal oscillator shock-starting shaping circuit in this embodiment further includes a third nand gate schmitt trigger, a fourth nand gate schmitt trigger, a third resistor and an indicator light, the third nand gate schmitt trigger plays a role in buffering and isolating, the fourth nand gate schmitt trigger provides a driving signal for the indicator light, and the third resistor plays a role in current limiting and feedback for the indicator light. When the crystal oscillator loop normally works, the indicator light flickers at the same frequency of the crystal oscillator.
Referring to fig. 1, an embodiment of the present invention provides a specific capacitor capacity test circuit, including a capacitor 1 to be tested, a first switch 2, a second switch 3, a constant current diode 4, a comparator 5, an and gate 6, a counter (not shown), a third capacitor 7, a second nand gate schmitt trigger 8, a first resistor 9, a second resistor 10, a quartz crystal oscillator 11, a first capacitor 12, a second capacitor 13, a first nand gate schmitt trigger 14, a third nand gate schmitt trigger 15, a fourth nand gate schmitt trigger 16, a third resistor 17 and an indicator light 18. The constant current diode can be a 2DH5C constant current diode, the type of the comparator chip can be selected to be LM339, the type of the AND gate chip can be selected to be 74LS09, the counter can be selected to be a Beikaki electric CR series pulse calculator, and the NAND gate Schmitt trigger chip can be selected to be CD 4093B. The first switch is connected with an original circuit of the capacitor to be tested, the second switch is connected with the electric quantity testing circuit, the first switch is normally closed, and the second switch is normally open in the normal working process of the electronic circuit. When the charge quantity of the capacitor to be detected needs to be detected, the first switch is changed from normally closed to normally open, the second switch is changed from normally open to normally closed, and the capacitor to be detected is discharged through the constant current diode. According to the charge quantity measuring formula, the stored charge quantity of the capacitor to be measured can be measured by measuring the charge quantity of the constant current diode within the charge discharge time of the capacitor to be measured, the discharge time is calculated through the fixed frequency of the crystal oscillator and the counter, and the charge quantity of the capacitor at the discharge moment is calculated according to the discharge time and the current value flowing through the constant current diode.
To sum up, compare in prior art, the utility model has the advantages of it is following:
1. the embodiment of the utility model can discharge the current through the semiconductor constant current device, reduce the resistance power loss and improve the measuring accuracy;
2. the embodiment can also use the crystal oscillator oscillation shaping loop and the counter to calculate the charge amount of the capacitor to be measured, and the measurement cost is reduced.
While the preferred embodiments of the present invention have been described, the present invention is not limited to the above embodiments, and those skilled in the art can make various equivalent modifications or substitutions without departing from the spirit of the present invention, and such equivalent modifications or substitutions are intended to be included within the scope of the present invention as defined by the appended claims.

Claims (6)

1. A kind of capacitor stores the measuring circuit of the electric quantity, characterized by that: the device comprises a capacitor to be tested, a semiconductor constant current device, a comparator, an AND gate, a counter and a crystal oscillator vibration starting and shaping loop; the capacitor to be tested is connected with the semiconductor constant current device, two input ends of the comparator are respectively connected with two ends of the semiconductor constant current device, the output end of the comparator is connected with one input end of the AND gate, the other input end of the AND gate is connected with the output end of the crystal oscillator oscillation starting and shaping loop, and the output end of the AND gate is connected with the counter.
2. The circuit for measuring the amount of electricity stored in a capacitor according to claim 1, wherein: the semiconductor constant current device comprises at least one of a constant current diode and a constant current triode.
3. The circuit for measuring the amount of electricity stored in a capacitor according to claim 1, wherein: the crystal oscillator oscillation starting and shaping loop comprises a quartz crystal oscillator; one end of the quartz crystal oscillator is connected with a first capacitor, the other end of the quartz crystal oscillator is connected with a second capacitor, and the first capacitor and the second capacitor are respectively connected with a ground wire.
4. A capacitor charge storage amount measuring circuit according to claim 3, wherein: the crystal oscillator oscillation starting shaping loop further comprises a first resistor, a second resistor and a first NAND gate Schmitt trigger; the input end of the first NAND gate Schmitt trigger is connected with the quartz crystal oscillator after being short-circuited, one end of the first resistor is connected with the quartz crystal oscillator, the other end of the first resistor is connected with the output end of the first NAND gate Schmitt trigger, and the second resistor is connected with the first NAND gate Schmitt trigger in parallel.
5. The circuit of claim 4, wherein: the crystal oscillator oscillation starting shaping loop further comprises a second NAND gate Schmitt trigger and a third capacitor; the input end of the second NAND gate Schmitt trigger is connected with the output end of the first NAND gate Schmitt trigger after being short-circuited, the output end of the second NAND gate Schmitt trigger is connected with the input end of the third capacitor, and the output end of the third capacitor is the output end of the crystal oscillator oscillation starting shaping loop.
6. The circuit of claim 4, wherein: the crystal oscillator oscillation starting shaping loop further comprises a third NAND gate Schmitt trigger, a fourth NAND gate Schmitt trigger, a third resistor and an indicator light; the input end of the third NAND gate Schmitt trigger is connected with the output end of the first NAND gate Schmitt trigger after being short-circuited, the input end of the fourth NAND gate Schmitt trigger is connected with the output end of the third NAND gate Schmitt trigger after being short-circuited, the indicator light is connected with the fourth NAND gate Schmitt trigger in parallel, and the third resistor is connected with the indicator light in series.
CN202220818200.8U 2022-04-11 2022-04-11 Capacitor storage capacity measuring circuit Active CN217425555U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202220818200.8U CN217425555U (en) 2022-04-11 2022-04-11 Capacitor storage capacity measuring circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202220818200.8U CN217425555U (en) 2022-04-11 2022-04-11 Capacitor storage capacity measuring circuit

Publications (1)

Publication Number Publication Date
CN217425555U true CN217425555U (en) 2022-09-13

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Application Number Title Priority Date Filing Date
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Country Status (1)

Country Link
CN (1) CN217425555U (en)

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Address after: 510663 1 Pinnacle Road, Luogang District, Guangzhou, Guangdong

Patentee after: Guangzhou Institute of Microbiology Group Co.,Ltd.

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