CN106501618B - Capacitor's capacity measuring circuit - Google Patents

Capacitor's capacity measuring circuit Download PDF

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Publication number
CN106501618B
CN106501618B CN201611264800.XA CN201611264800A CN106501618B CN 106501618 B CN106501618 B CN 106501618B CN 201611264800 A CN201611264800 A CN 201611264800A CN 106501618 B CN106501618 B CN 106501618B
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capacitance
testing capacitance
capacitor
charging
output
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CN106501618A (en
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万峰
张旭
陈光胜
江友志
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Shanghai Eastsoft Microelectronics Co Ltd
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Shanghai Eastsoft Microelectronics Co Ltd
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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R27/00Arrangements for measuring resistance, reactance, impedance, or electric characteristics derived therefrom
    • G01R27/02Measuring real or complex resistance, reactance, impedance, or other two-pole characteristics derived therefrom, e.g. time constant
    • G01R27/26Measuring inductance or capacitance; Measuring quality factor, e.g. by using the resonance method; Measuring loss factor; Measuring dielectric constants ; Measuring impedance or related variables
    • G01R27/2605Measuring capacitance

Abstract

A kind of capacitor's capacity measuring circuit, comprising: controller, testing capacitance, capacitor charge and discharge unit, timer and counter, in which: controller when completing voltage threshold suitable for reaching electric discharge in the voltage for getting testing capacitance, exports charging control signal;When the voltage for getting testing capacitance reaches charging complete voltage threshold, discharge control signal is exported;After the completion of test, the average charge duration of testing capacitance is calculated;According to the corresponding relationship of preset standard capacitance corresponding charging duration and standard capacitance capacitance, testing capacitance capacitance is calculated;Capacitor charge and discharge unit, suitable for forming charge circuit with testing capacitance under the control of charging control signal;When receiving discharge control signal, control testing capacitance electric discharge;Timer, the charging total duration suitable for timing testing capacitance;Counter, suitable for recording the charging total degree of testing capacitance in test process.Above scheme can be improved the precision of capacitor's capacity measurement.

Description

Capacitor's capacity measuring circuit
Technical field
The present invention relates to component testing field more particularly to a kind of capacitor's capacity measuring circuits.
Background technique
In electrotechnics, capacitor is one of most common component, is widely used in separated by direct communication in circuit, coupling Conjunction, bypass, resonant tank etc..
In practical applications, capacitor's capacity can be measured using a variety of methods, for example, holding using bridge measurement capacitor Value measures capacitor's capacity using capacitive reactance method.
Using capacitive reactance method measurement capacitor's capacity when, be that AC sine wave signal is applied in measured capacitance, it is laggard Row capacitor-voltage conversion, then pass through bandpass filter filtering interference signals.Then, pass through ac/dc (Alternating Current/Direct Current, AC/DC) converter obtains the RMS voltage for being proportional to testing capacitance capacitance, Jin Ertong Obtained modulus (A/D) sampled value is crossed after analog-digital converter (Analog-to-Digital Converter, ADC) conversion to count Calculate capacitance.
However, since there are internal resistances for capacitor, leading to low measurement accuracy when using capacitive reactance method measurement capacitor's capacity.
Summary of the invention
The technical issues of embodiment of the present invention solves is the measurement accuracy for how improving measurement capacitor's capacity.
In order to solve the above technical problems, the embodiment of the present invention provides a kind of capacitor's capacity measuring circuit, comprising: controller, Testing capacitance, capacitor charge and discharge unit, timer and the counter coupled respectively with the controller and the testing capacitance, Wherein: the controller, when completing voltage threshold suitable for reaching default electric discharge in the voltage for getting the testing capacitance, output Charging control signal is to the capacitor charge and discharge unit;And in the voltage for getting the testing capacitance to reach preset charged complete When at voltage threshold, output discharge control signal to the capacitor charge and discharge unit;After the completion of test, the timer is obtained The charging total degree of the charging total duration of the corresponding testing capacitance and the corresponding testing capacitance of the counter, meter Calculate the average charge duration of the testing capacitance;According to the corresponding charging duration of preset standard capacitance and standard capacitance capacitance Corresponding relationship calculates the testing capacitance capacitance;The capacitor charge and discharge unit, suitable for the control in the charging control signal Under, charge circuit is formed with testing capacitance, the testing capacitance is made to charge;Suitable under the control of the discharge control signal, Discharge loop is formed with the testing capacitance, the testing capacitance is made to discharge;The timer is suitable for testing capacitance described in timing Charging total duration;The counter, suitable for recording the charging total degree of testing capacitance described in test process.
Optionally, the controller is suitable for calculating the testing capacitance capacitance using following formula: Wherein, C is the testing capacitance capacitance;T is the charging total duration of the testing capacitance, and M is that the charging of the testing capacitance is total Number, C0For the preset standard capacitance capacitance, Δ t0For the corresponding charging duration of the preset standard capacitance.
Optionally, the capacitor charge and discharge unit includes: multidiameter option switch circuit, first voltage source and second voltage Source, in which: the multidiameter option switch circuit, suitable under the control of the charging control signal, by the first voltage source Charge circuit is formed with the testing capacitance;And under the control of the discharge control signal, by the second voltage source with The testing capacitance forms discharge loop;The output voltage of the first voltage source is higher than the output electricity of the second voltage source Pressure.
Optionally, the capacitor's capacity measuring circuit includes: first comparator, the second comparator, in which: first ratio Compared with device, first input end inputs the corresponding voltage of the charging complete voltage threshold, the second input terminal and the testing capacitance The first input end of first end coupling, output end and the controller couples;Second comparator, first input end input institute It states electric discharge and completes the corresponding voltage of voltage threshold, the first end coupling of the second input terminal and the testing capacitance, output end and institute State the second input terminal coupling of controller;The second end and ground of the testing capacitance couple.
Optionally, the capacitor's capacity measuring circuit further include: latch;The reset terminal of the latch and described first The output end of comparator couples;The output end of the set end of the latch and second comparator couples;The latch Output end and the timer enable signal input terminal and the counter clock signal input terminal couple;The meter When device, suitable for starting timing in the enable signal input terminal input high level;The counter, suitable for recording the clock The rising edge number of signal input part input signal.
Optionally, the capacitor's capacity measuring circuit further include: synchronization unit;The data-signal of the synchronization unit inputs End and the output end of the latch couple;The system clock of the clock signal input terminal of the synchronization unit and the controller Signal output end coupling;The enable signal input terminal of the output end of the synchronization unit and the timer couples.
Optionally, the timer further include: the clock signal of the clock signal input terminal of timer, the timer is defeated Enter end and the clock signal of system output end of the controller couples.
Optionally, the counter further include: the enable signal input terminal of counter, the enable signal of the counter are defeated Enter end and keeps high level during the test.
Optionally, the capacitor's capacity measuring circuit further include: the first current-limiting resistance, the first of first current-limiting resistance End and the first end of the testing capacitance couple, the second input of the first current-limiting resistance second end and the first comparator Second input terminal of end and second comparator couples.
Optionally, the capacitor's capacity measuring circuit further include: the second current-limiting resistance is coupled in the capacitor charge and discharge list Between the output end of member and the first end of the testing capacitance.
Optionally, the digit of the counter is not less than 24, and the digit of the timer is not less than 24.
Compared with prior art, the technical solution of the embodiment of the present invention has the advantages that
According to the charging duration and charging times of testing capacitance, the average charge duration of testing capacitance is calculated.According to pre- If standard capacitance corresponding charging duration and standard capacitance capacitance corresponding relationship, calculate testing capacitance capacitance.Due to surveying That testing capacitance capacitance is corresponding with average charge duration when measuring testing capacitance capacitance, rather than by testing capacitance capacitance and Voltage is corresponding, so as to avoid the appearance because capacitor is there are internal resistance leads to low measurement accuracy the case where, therefore can mention The measurement accuracy of high capacitance capacitance.
Detailed description of the invention
Fig. 1 is the structural schematic diagram of one of embodiment of the present invention capacitor's capacity measuring circuit;
Fig. 2 is the structural schematic diagram of one of embodiment of the present invention capacitor charge and discharge unit;
Fig. 3 is the structural schematic diagram of another capacitor's capacity measurement capacitor in the embodiment of the present invention.
Specific embodiment
In the prior art, capacitor's capacity can be measured using bridge method or capacitive reactance method.Bridge method is according to bridge balance Principle measures capacitor's capacity, and measuring accuracy is higher, but circuit is complex, and at high cost, volume is big.
When measuring capacitor's capacity using capacitive reactance method, it is that AC sine wave signal is applied in measured capacitance, carries out later Capacitor-voltage conversion, then pass through bandpass filter filtering interference signals.Then, by AC/DC converter obtain being proportional to The RMS voltage of capacitor's capacity is surveyed, and then the A/D sampled value that obtains after converting by ADC calculates capacitance.However, adopting When measuring capacitor's capacity with capacitive reactance method, since there are internal resistances for capacitor, lead to low measurement accuracy.
In embodiments of the present invention, according to the charging duration of testing capacitance and charging times, the flat of testing capacitance is calculated Bulk charge duration.According to the corresponding relationship of preset standard capacitance corresponding charging duration and standard capacitance capacitance, calculate to be measured Capacitor's capacity.Due to being that testing capacitance capacitance is corresponding with average charge duration when measuring testing capacitance capacitance, rather than Testing capacitance capacitance is corresponding with voltage, so as to avoid because capacitor is there are internal resistance leads to low measurement accuracy the case where Occur, therefore can be improved the measurement accuracy of capacitor's capacity.In addition, the capacitor's capacity measuring circuit provided in the embodiment of the present invention Structure is more simple compared with bridge method, and cost is relatively low.
It is understandable to enable above-mentioned purpose of the invention, feature and beneficial effect to become apparent, with reference to the accompanying drawing to this The specific embodiment of invention is described in detail.
Referring to Fig.1, one of embodiment of the present invention capacitor's capacity measuring circuit is given, comprising: controller 11, to be measured Capacitor 12, capacitor charge and discharge unit 13, timer 14 and counter 15.
In specific implementation, controller 11, testing capacitance 12 with capacitor charge and discharge unit 13, timer 14 and count Device 15 couples.During testing testing capacitance 12, controller 11 can obtain the voltage of testing capacitance 12 in real time Value.When the voltage value for getting testing capacitance 12, which reaches default electric discharge, completes voltage threshold, output charging control signal to electricity Hold charge/discharge unit 13;When the voltage value for getting testing capacitance 12, which reaches preset charged, completes voltage threshold, output electric discharge Signal is controlled to capacitor charge and discharge unit 13.
Voltage threshold is completed in electric discharge, charging complete voltage threshold can be configured according to the actual situation, and setting is put Electricity completes voltage threshold and is less than charging complete voltage threshold.In an embodiment of the present invention, electric discharge completion voltage threshold is set as 1.3V, charging complete voltage threshold are set as 2.0V.In other embodiments of the present invention, voltage threshold and charging are completed in electric discharge Other values can also be set as by completing voltage threshold.
In specific implementation, capacitor charge and discharge unit 13 is arranged between the output end of controller 11 and testing capacitance 12. Capacitor charge and discharge unit 13 is when receiving the charging control signal of the output of controller 11, under the control of charging control signal, Charge circuit is formed with testing capacitance 12, to charge for testing capacitance 12.Correspondingly, capacitor charge and discharge unit 13 is receiving When the discharge control signal that controller 11 exports, under the control of discharge control signal, discharge loop is formed with testing capacitance 12, To make testing capacitance 12 discharge.
When testing capacitance 12 starts to charge, timer 14 is triggered and starts timing, in this charging process of timing to Survey the charging duration of capacitor 12.Meanwhile when testing capacitance 12 starts to charge, counter 15 is triggered, and records charging times.
In entire test process, when measuring the capacitance of testing capacitance 12, controller 11 can repeatedly control capacitor and fill Discharge cell 13, so that controlling testing capacitance 12 carries out multiple charge and discharge.After entire test process, in timer 14 Timing duration is the charging total duration of testing capacitance 12 in entire test process, and the count value in counter 15 is entirely to test The charging total degree of testing capacitance 12 in journey.
After entire test process, controller 11 can obtain the charging of testing capacitance 12 from timer 14 respectively Total duration obtains the charging total degree of testing capacitance 12 from counter 15.According to the charging total duration of testing capacitance 12 and Charge total degree, can calculate the average charge duration of testing capacitance 12 in test process.
The corresponding relationship of controller 11 available preset standard capacitance charging duration and standard capacitance capacitance, calculate to Survey capacitor's capacity.
The principle for calculating 12 capacitance of testing capacitance to controller 11 below is illustrated.
By capacitance charging current formula: I=dQ/dt is it is found that △ Q=I* △ t, wherein △ Q is the charge of testing capacitance 12 Knots modification, I is the charging current of testing capacitance 12 and I is constant, and △ t is the charging duration of testing capacitance 12.
Again △ Q=C* △ V, therefore, I* △ t=C* △ V, wherein △ V be testing capacitance 12 voltage knots modification, C be to Survey 12 capacitance of capacitor.
Peer-to-peer I* △ t=C* △ V is deformed, and following formula is obtained:
Similarly, according to formula (1), for standard capacitance, available following formula:
In formula (2), C0For preset standard capacitance capacitance, Δ t0It is in charging voltage variable quantity for preset standard capacitance Corresponding charging duration when △ V.
Formula (1) and formula (2) is done into division arithmetic, obtains the capacitance of testing capacitance 12 are as follows:
When testing capacitance 12 is electrically operated by multiple charge and discharge in test process, △ t is electricity to be measured in entire test process Hold 12 average charge duration.
That is, in embodiments of the present invention, according to the corresponding charging duration of preset standard capacitance and standard capacitance The corresponding relationship of capacitance, you can learn that the capacitor of the corresponding capacitor's capacity of testing capacitance average charge duration namely testing capacitance Capacitance.
In specific implementation, it can first pass through in advance and standard capacitance is taken multiple measurements, to obtain the charging of standard capacitance The corresponding relationship of duration and standard capacitance capacitance.For example, choosing the standard capacitance that capacitor's capacity is 100nF, repeatedly measurement is solid Under conditions of fixed voltage knots modification, duration needed for standard capacitance charges, and its average value is sought, as standard capacitance capacitance Charging duration.In practical applications, the charging duration and standard for carrying out to obtain standard capacitance with other methods in advance can also be adopted The corresponding relationship of capacitor's capacity.
It, can be by above-mentioned correspondence after the corresponding relationship of the charging duration and standard capacitance capacitance that get standard capacitance The storage region of relationship storage in the controller, or above-mentioned corresponding relationship is stored in other memories, other memories It couples and can be readable by the controller with controller.
It can be seen that calculating the average charge of testing capacitance according to the charging duration of testing capacitance and charging total degree Duration.According to the corresponding relationship of preset standard capacitance corresponding charging duration and standard capacitance capacitance, calculates testing capacitance and hold Value.Due to being that testing capacitance capacitance is corresponding with average charge duration when measuring testing capacitance capacitance, rather than will be to be measured Capacitor's capacity is corresponding with voltage, so as to avoid the appearance because capacitor is there are internal resistance leads to low measurement accuracy the case where, Therefore it can be improved the measurement accuracy of capacitor's capacity.
Referring to Fig. 2, the structural schematic diagram of one of embodiment of the present invention capacitor charge and discharge unit 13 is given, is tied below Fig. 1 is closed to be illustrated.
In specific implementation, capacitor charge and discharge unit 13 may include multidiameter option switch circuit S, first voltage source VDD And the second voltage source VSS, in which: multidiameter option switch circuit S is coupled with controller 11, suitable for what is exported in controller 11 Under the control of charging control signal, first voltage source VDD and testing capacitance 12 are formed into charge circuit;It is exported in controller 11 Under the control of discharge control signal, the second voltage source VSS and testing capacitance 12 are formed into discharge loop, in which: first voltage source The output voltage of VDD is higher than the output voltage of the second voltage source VSS.
That is, in embodiments of the present invention, controller 11 reaches in the voltage for getting testing capacitance 12 to have discharged When at voltage threshold, i.e., exportable charging control signal, to control multidiameter option switch S for first voltage source VDD and electricity to be measured Hold 12 and form charge circuit, to use first voltage source VDD for the power supply of testing capacitance 12.Controller 11 is getting electricity to be measured Hold 12 voltage when reaching charging complete voltage threshold, i.e., exportable discharge control signal, to control multidiameter option switch S for the Two voltage source VSS and testing capacitance 12 form discharge loop, to control the electric discharge of testing capacitance 12.
Referring to Fig. 3, another capacitor's capacity measuring circuit in the embodiment of the present invention is given.
In specific implementation, capacitor's capacity measuring circuit may include first comparator 16 and the second comparator 17, lead to The output signal of detection first comparator 16 and the output signal of the second comparator 17 are crossed, to detect the voltage of testing capacitance 12 Whether reach electric discharge and complete voltage threshold, and whether the voltage of detection testing capacitance 12 reaches charging complete voltage threshold.
In specific implementation, first comparator 16 includes first input end, the second input terminal and output end, in which: the The first input end of one comparator 16 is suitable for the corresponding voltage V_H of input charging complete voltage threshold;The of first comparator 16 The first end of two input terminals and testing capacitance 12 couples;The output end of first comparator 16 and the first input end coupling of controller 11 It connects.
Second comparator 17 includes first input end, the second input terminal and output end, in which: the of the second comparator 17 One input terminal is suitable for input electric discharge and completes the corresponding voltage V_L of voltage threshold;Second input terminal of the second comparator 17 with it is to be measured The first end of capacitor 12 couples;The output end of second comparator 17 and the second input terminal of controller 11 couple.
The first input end of controller 11 is coupled with the output end of first comparator 16, suitable for receiving testing capacitance 12 Whether voltage reaches the signal of charging complete voltage threshold;Second input terminal of controller 11, the output with the second comparator 17 Whether end coupling, the voltage suitable for receiving testing capacitance 12 reach the signal that voltage threshold is completed in electric discharge.The of testing capacitance 12 Two ends and ground couple.
When the voltage that the first input end of first comparator 16 inputs is greater than the voltage of its second input terminal input, first The output end of comparator 16 exports high level signal;Conversely, when the voltage that the first input end of first comparator 16 inputs is less than When the voltage of its second input terminal input, the output end of first comparator 16 exports low level signal.That is, working as electricity to be measured When holding 12 voltage and reaching the corresponding voltage V_H of charging complete voltage threshold, the signal of the output end output of first comparator 16 Low level is turned to from high level.
When the voltage that the first input end of the second comparator 17 inputs is greater than the voltage of its second input terminal input, second The output end of comparator 17 exports high level signal;Conversely, when the voltage that the first input end of the second comparator 17 inputs is less than When the voltage of its second input terminal input, the output end of the second comparator 17 exports low level signal.That is, working as electricity to be measured When holding 12 voltage and reaching electric discharge and complete the corresponding voltage V_L of voltage threshold, the signal of the output end output of the second comparator 17 High level is turned to from low level.
When the first input end of controller 11 detects that the signal of input is turned to low level from high level, determine to receive Reach the signal of charging complete voltage threshold to the voltage of testing capacitance 12, generate discharge control signal and exports.Work as controller When 11 the second input terminal detects that the signal of input is turned to high level from low level, the electricity for receiving testing capacitance 12 is determined Pressure reaches the signal that voltage threshold is completed in electric discharge, generates charging control signal and exports.
In specific implementation, capacitor's capacity measuring circuit can also include latch 18.The reset terminal R of latch 18 and The output end of one comparator 16 couples, and the output end of set end S and the second comparator 17 couples, output end Q and timer 14 The clock signal input terminal CLK coupling of enable signal input terminal EN, counter 15.When reset terminal R input low level signal, set When holding S input high level signal, the output end of latch 18 exports low level signal;When reset terminal R input high level signal, set When the end S input low level signal of position, the output end of latch 18 exports high level signal.
That is, the output end of latch 18 exports high level signal when testing capacitance 12 is in charged state.When When testing capacitance 12 is in discharge condition, the output end of latch 18 exports low level signal.When testing capacitance 12 from electric discharge shape When state switches to charged state, the output signal of latch 18 switches to high level from low level;When testing capacitance 12 is from charging When state switches to discharge condition, the output signal of latch 18 switches to low level from high level.
In specific implementation, timer 14 includes enable signal input terminal EN and clock signal input terminal CLK.When enabled When signal input part EN input high level signal, timer 14 is started to work;When enable signal input terminal EN input low level is believed Number when, timer 14 stops working.Namely: when the output signal of latch 18 switches to high level from low level, timer 14 start timing;When the output signal of latch 18 switches to low level from high level, timer 14 stops working.Timer 14 clock signal input terminal CLK input system clock signal FSYSCLK, clock signal of system FSYSCLKIt can be controller 11 Clock signal.
In other words, when testing capacitance 12 switches to charged state from discharge condition, timer 14 starts timing;When to When survey capacitor 12 switches to discharge condition from charged state, timer 14 stops working.It can be seen that timer 14 can for The charging duration for surveying capacitor 12 carries out timing.
In entire test process, the numerical value in timer 14 is constantly cumulative.After the completion of entire test process, timer Numerical value in 14 is the charging total duration of testing capacitance 12 in entire test process.
In specific implementation, counter 15 includes enable signal input terminal EN and clock signal input terminal CLK.Entire In test process, the enable signal input terminal EN of counter 15 input high level signal always.Clock signal inputs upon this detection When holding CLK input rising edge, the count value of counter 15 adds 1.Namely: when the output signal of latch 18 is switched to from low level When high level, the count value of counter 15 adds 1.That is, when testing capacitance 12 switches to charged state from discharge condition, The count value of counter 15 adds 1.
In entire test process, the count value of counter 15 is constantly cumulative.After the completion of entire test process, counter Count value in 15 is the charging total degree of testing capacitance 12 in entire test process.
In specific implementation, the enable signal input terminal EN of timer 15 can be coupled with controller 11, by controller 11 Enable signal is inputted for the enable signal input terminal EN of timer 15.It is understood that the enable signal of timer 15 inputs End EN can also be coupled with other devices, input enable signal from other devices to the enable signal input terminal EN of timer 15, It only needs to meet in entire test process, the enable signal input terminal EN of timer 15 input high level signal always. The embodiment of the present invention is to the device or equipment of the enable signal input terminal EN of timer 15 input enable signal and without limitation.
It is total according to the charging total duration of testing capacitance 12 in entire test process and charging after entire test process The average charge duration that testing capacitance 12 charges each time can be calculated in number.
In specific implementation, the clock signal of the clock signal input terminal CLK input of timer 14 can be controller 11 Clock signal of system output end output clock signal of system.The clock of the clock signal input terminal CLK input of counter 15 Signal is also possible to the clock signal of system of the clock signal of system output end output of controller 11.
In practical applications, clocking capability can be realized by counter.According to the clock signal input terminal of counter The number of the rising edge for the clock signal that the frequency and counter of the clock signal of input are recorded, can be realized timing function Energy.
For example, the number of the rising edge for the clock signal that counter is recorded is A, the clock signal input terminal of counter is defeated The frequency of the clock signal entered is B, then the when a length of A/B of counter records.
In specific implementation, capacitor's capacity measuring circuit can also include: synchronization unit 19, suitable for by timer 14 when Clock signal is synchronous with the clock signal of system of controller 11.Synchronization unit 19 includes data signal input D, clock signal input Hold CLK and output end Q, in which: the data signal input D of synchronization unit 19 and the output end Q of latch 18 are coupled, clock The clock signal of system output end of signal input part CLK and controller 11 couples, and output end Q and the enable signal of timer 14 are defeated Enter EN is held to couple.The clock signal input terminal input system clock signal F of synchronization unit 19SYSCLK, clock signal of system FSYSCLK It can be the clock signal of controller 11.
In specific implementation, the digit of timer 14 and the digit of counter 15 are related to actually required precision.Therefore, In practical applications, it can be set according to actual accuracy requirement.The digit of timer 14 and the digit of counter 15 Bigger, measurement accuracy is more accurate.
In an embodiment of the present invention, measurement capacitor's capacity the required accuracy is 1nF, and therefore, the digit of counter 15 is not small In 24, the digit of timer 14 is equally not less than 24.In other embodiments of the present invention, the essence needed for measuring capacitor's capacity When degree is other values, the counter and timer of other digits can also be selected, is not limited in the example above illustrates 24 The counter and timer of position.
In specific implementation, capacitor's capacity measuring circuit can also include the first current-limiting resistance R1, first end and electricity to be measured Hold 12 first end coupling, second end and the second input terminal of first comparator 16 and the second input terminal of the second comparator 17 Coupling.It, can be to avoid between testing capacitance 12 and first comparator 16, the second comparator 17 by the way that the first current-limiting resistance R1 is arranged There is short circuit.
In specific implementation, capacitor's capacity measuring circuit can also include the second current-limiting resistance R2, first end and electricity to be measured Hold 12 first end coupling, the output end coupling of second end and capacitor charge and discharge unit 13.By the way that the second current-limiting resistance R2 is arranged, It can be short-circuit to avoid occurring between testing capacitance 12 and capacitor charge and discharge unit 13.
In specific implementation, above-mentioned capacitor's capacity measuring circuit can integrate in chip piece, also can be set same On one piece of circuit board, or it is arranged on circuit board that is different and there is electrical connection.Compared to bridge measurement capacitor's capacity, The circuit structure of the capacitor's capacity measuring circuit provided in the embodiment of the present invention is relatively simple, and small volume is easy to carry.
In specific implementation, the capacitor's capacity measuring circuit provided in the embodiment of the present invention, can be used for small capacitances into The measurement of row capacitor's capacity, small capacitances can be capacitor of the capacitor's capacity less than 1 μ F;It can be used for carrying out capacitor appearance to bulky capacitor Value measurement, bulky capacitor can be greater than the capacitor of 1 μ F for capacitor's capacity.
Below by citing, capacitor appearance is carried out to using the capacitor's capacity measuring circuit provided in the above embodiment of the present invention The process of value measurement is described in detail.
The ideal capacitance of testing capacitance is 220nF.Charging complete voltage threshold is set as 2.0V, voltage is completed into electric discharge Threshold value is set as 1.3V.Before testing begins, the value of counter and timer is all reset.
Employ counters to realize the function of timer.After entire test process, the numerical value in timer is 0x23DFE0, then in entire test process, the charging total duration of testing capacitance is T=0x23DFE0/f0, f0For timer The clock signal frequency of clock signal input terminal CLK input.
After entire test process, the numerical value in counter is 0x00008C, namely in entire test process, to The charging total degree for surveying capacitor is M=0x00008C.
By in entire test process, when average charge of testing capacitance a length of T/M.Testing capacitance capacitance are as follows:Wherein, C0=100nF, Δ t0When the charging for the standard capacitance that the capacitance to measure in advance is 100nF It is long, and Δ t0=0x001DD1.The capacitance for the testing capacitance being finally calculated are as follows: C=219.99nF.
Although present disclosure is as above, present invention is not limited to this.Anyone skilled in the art are not departing from this It in the spirit and scope of invention, can make various changes or modifications, therefore protection scope of the present invention should be with claim institute Subject to the range of restriction.

Claims (9)

1. a kind of capacitor's capacity measuring circuit characterized by comprising controller, testing capacitance, respectively with the controller and Capacitor charge and discharge unit, timer and the counter of the testing capacitance coupling, the second comparator, latch at first comparator Device, in which:
The controller, when completing voltage threshold suitable for reaching default electric discharge in the voltage for getting the testing capacitance, output Charging control signal is to the capacitor charge and discharge unit;And in the voltage for getting the testing capacitance to reach preset charged complete When at voltage threshold, output discharge control signal to the capacitor charge and discharge unit;After the completion of test, the timer is obtained The charging total degree of the charging total duration of the corresponding testing capacitance and the corresponding testing capacitance of the counter, meter Calculate the average charge duration of the testing capacitance;According to the charging total duration of testing capacitance, the charging total degree, pre- of testing capacitance If the corresponding charging duration of standard capacitance and standard capacitance capacitance, calculate the testing capacitance capacitance;
The capacitor charge and discharge unit, suitable for forming charge circuit with testing capacitance under the control of the charging control signal, The testing capacitance is set to charge;Suitable for forming discharge loop with the testing capacitance under the control of the discharge control signal, The testing capacitance is set to discharge;
The first comparator, first input end input the corresponding voltage of the charging complete voltage threshold, the second input terminal with The first end of the testing capacitance couples, and the first input end of output end and the controller couples;
Second comparator, first input end input the electric discharge and complete the corresponding voltage of voltage threshold, the second input terminal and The first end of the testing capacitance couples, and the second input terminal of output end and the controller couples;The of the testing capacitance Two ends and ground couple;
The reset terminal of the latch and the output end of the first comparator couple;The set end of the latch and described the The output end of two comparators couples;The enable signal input terminal and the meter of the output end of the latch and the timer The clock signal input terminal coupling of number device;
The timer, suitable for starting timing in the enable signal input terminal input high level, to obtain the electricity to be measured The charging total duration of appearance;
The counter, suitable for recording the rising edge number of the clock signal input terminal input signal, to record test process Described in testing capacitance charging total degree.
2. capacitor's capacity measuring circuit as described in claim 1, which is characterized in that the controller is suitable for using following public Formula calculates the testing capacitance capacitance:
Wherein, C is the testing capacitance capacitance;T is the charging total duration of the testing capacitance, and M is filling for the testing capacitance Electric total degree, C0For the preset standard capacitance capacitance, Δ t0For the corresponding charging duration of the preset standard capacitance.
3. capacitor's capacity measuring circuit as described in claim 1, which is characterized in that the capacitor charge and discharge unit includes: more Road selected on-off circuit, first voltage source and the second voltage source, in which:
The multidiameter option switch circuit, suitable under the control of the charging control signal, by the first voltage source and institute It states testing capacitance and forms charge circuit;And under the control of the discharge control signal, by the second voltage source with it is described Testing capacitance forms discharge loop;
The output voltage of the first voltage source is higher than the output voltage of the second voltage source.
4. capacitor's capacity measuring circuit as described in claim 1, which is characterized in that further include: synchronization unit;
The output end of the data signal input of the synchronization unit and the latch couples;
The clock signal of system output end of the clock signal input terminal of the synchronization unit and the controller couples;
The enable signal input terminal of the output end of the synchronization unit and the timer couples.
5. capacitor's capacity measuring circuit as claimed in claim 4, which is characterized in that the timer further include: timer Clock signal input terminal, the clock signal of system output end coupling of the clock signal input terminal of the timer and the controller It connects.
6. capacitor's capacity measuring circuit as described in claim 1, which is characterized in that the counter further include: counter The enable signal input terminal of enable signal input terminal, the counter keeps high level during the test.
7. capacitor's capacity measuring circuit as described in claim 1, which is characterized in that further include: the first current-limiting resistance, described The first end of the first end of one current-limiting resistance and the testing capacitance couples, the second end of first current-limiting resistance and described the The coupling of second input terminal of the second input terminal of one comparator and second comparator.
8. capacitor's capacity measuring circuit as claimed in claim 7, which is characterized in that further include: the second current-limiting resistance is coupled in Between the output end of the capacitor charge and discharge unit and the first end of the testing capacitance.
9. capacitor's capacity measuring circuit as described in any one of claims 1 to 8, which is characterized in that the digit of the counter Not less than 24, the digit of the timer is not less than 24.
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