JPH0964275A - High frequency integrated circuit device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a high-frequency integrated circuit device equipped with a capacitor element which can materialize capacity up without increasing the area of a chip and besides can be manufactured with less manhour. SOLUTION: This device has such a constitution that in a semiinsulating substrate 1 are provided a plurality of grooves 12 and 13 for formation of electrodes in parallel with each other vertically downward from the surface of the substrate, and that in respective of grooves 12 and 13 for formation of electrodes are formed a plurality of plate-shaped electrode members 2 and 3 consisting of a conductive material to fill these grooves. As the dielectric of the capacitor, a part of the semiinsulating substrate is used.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a high frequency integrated circuit device, and more particularly to a high frequency integrated circuit device having an improved capacitor structure.

[0002]

2. Description of the Related Art FIG. 9 shows an MI of a conventional high frequency integrated circuit device.
It is a figure which shows a M (Metal-Insulator-Metal) capacitor structure. In FIG. 9, 1 is a GaAs semi-insulating substrate, 8 is a base electrode formed on the GaAs semi-insulating substrate 1,
Reference numeral 9 denotes an interlayer insulating film formed on the base electrode 8, and 7 denotes an upper electrode formed on the interlayer insulating film 9.

Here, the area of the interlayer insulating film 9 disposed between the metal electrodes 8 and 7 is S, the thickness of the interlayer insulating film 9 is d, the relative dielectric constant of the interlayer insulating film 9 is ε r, and the vacuum relative dielectric constant is Rate (8.85
When x10 ^-12 ) is εo, the capacitance C stored between the electrodes 8 and 7 can be represented by C = εr · εo · S / d. That is, in the MIM capacitor, in order to obtain a large capacitance when the relative dielectric constant and the layer thickness of the interlayer insulating film are constant, the areas of the upper electrode 7, the base electrode 8 and the interlayer insulating film 9 are increased. It is necessary. Particularly, in a high frequency integrated circuit device including an amplifier and the like, a large-capacity capacitor is required. Therefore, in order to form such a large-capacity capacitor, the area of the upper electrode 7, the base electrode 8, and the interlayer insulating film 9 is increased. However, as a result, the chip area becomes large and the device becomes large.

The above-mentioned MIM formed on the substrate surface
In order to solve the problem of the capacitor, the conventional method shown in FIG.
0 has been proposed. FIG. 10 is a sectional view showing the structure of a conventional capacitor element disclosed in, for example, Japanese Patent Laid-Open No. 4-61266. In the figure, the semi-insulating semiconductor substrate 101 has a main surface 101a.
A plurality of grooves 105 are sequentially arranged and formed from the side. Further, the electrode layer 102 is the semi-insulating semiconductor substrate 101.
Is continuously formed on the main surface 101a of the substrate and the inner surface of the groove 105. The dielectric layer 103 is formed on the electrode layer 102 along the shape of the electrode layer 102, and the electrode layer 104 is formed on the dielectric layer 103 so as to fill the groove 105.

In the conventional capacitor element having such a structure, the electrode layer 102 is provided on the main surface 101a of the semi-insulating semiconductor substrate 101 and along the inner surface of the groove 105,
Since the electrode layer 104 is opposed to the entire surface of the electrode layer 102 via the dielectric layer 103, the area of the electrode pair opposed to the dielectric layer 103 is smaller than the area occupied by the capacitor element on the substrate 101. And wide. Therefore, in this conventional example, it is possible to suppress an increase in the chip area due to an increase in the capacity of the capacitor.

[0006]

[Patent Document 1] Japanese Patent Application Laid-Open No. 4-61266
The conventional capacitor element disclosed in Japanese Laid-Open Patent Publication No. 10-31100 is configured as described above, and it is possible to increase the capacity without increasing the chip area. However, in the manufacturing process, the groove 105 is formed in the substrate. After that, the electrode layer 102 must be formed, the dielectric layer 103 must be formed on the electrode layer 102, and the electrode layer 104 must be formed on the dielectric layer 103. There was a problem.

The present invention has been made in order to solve the above problems, and provides a capacitor element which can achieve a large capacity without increasing a chip area and can be manufactured by a small number of steps. An object of the present invention is to obtain a high frequency integrated circuit device provided with the device.

[0008]

A high frequency integrated circuit device according to the present invention is a high frequency integrated circuit device formed on a semi-insulating substrate made of a compound semiconductor, wherein a plurality of electrodes are formed on the semi-insulating substrate. Grooves are provided in parallel with each other vertically downward from the upper surface of the substrate, and a plurality of plate-shaped electrode members made of a conductive material are provided in each of the plurality of electrode forming grooves. It is formed to fill up.

According to the present invention, in the high frequency integrated circuit device, the semi-insulating substrate is provided with the two electrode forming grooves.

According to the present invention, in the high frequency integrated circuit device, the semi-insulating substrate is provided with three or more electrode forming grooves.

A high frequency integrated circuit device according to the present invention is a high frequency integrated circuit device formed on a semi-insulating substrate made of a compound semiconductor, wherein the semi-insulating substrate is
A plurality of conductive portions formed so as to extend vertically downward from the upper surface of the substrate by the first ion implantation are arranged in parallel to each other, and a second ion implantation is performed between each of the plurality of conductive portions. An isolation portion is formed so as to extend vertically downward from the upper surface of the substrate.

Further, in the high frequency integrated circuit device according to the present invention, the two conductive portions are provided in the semi-insulating substrate.

In the high frequency integrated circuit device according to the present invention, three or more conductive parts are provided in the semi-insulating substrate.

[0014]

BEST MODE FOR CARRYING OUT THE INVENTION

Embodiment 1. According to FIG. 1, the first embodiment of the present invention is a high-frequency integrated circuit device formed on a semi-insulating substrate made of a compound semiconductor.
A plurality of electrode forming grooves 12 and 13 are provided in parallel with each other vertically downward from the upper surface of the substrate, and a plurality of plate-shaped electrodes made of a conductive material are provided in the plurality of electrode forming grooves 12 and 13. The electrode members 2 and 3 are formed so as to fill these grooves, and in this embodiment, a high-frequency integrated circuit device that is easy to manufacture, has a small chip area, and is inexpensive Is something that can be done.

That is, in FIG. 1, a plurality of electrode forming grooves 12 and 13 are arranged in parallel to each other on an insulating substrate 1 with a semi-insulating portion 4 made of a compound semiconductor constituting the substrate being sandwiched therebetween. Is provided. Further, plate-shaped electrode members 2 and 3 made of a conductive material are formed in the electrode forming grooves 12 and 13 so as to fill these grooves.

In the first embodiment of the present invention having such a structure, a pair of plate-shaped electrode members 2 and 3 made of a conductive material.
And the semi-insulating portion 4 sandwiched between the pair of plate-shaped electrode members constitutes a capacitor.

A method of manufacturing the high frequency integrated circuit device according to the first embodiment will be described. First, two parallel electrode-forming grooves 12 and 13 are formed in a semi-insulating substrate, for example, a semi-insulating GaAs substrate 1, by etching so that they are parallel to each other vertically downward from the upper surface of the substrate. Form.
Here, as an etching method, RIE (Reactive Io
An etching method such as n Etching) that enables high aspect ratio etching is used. Next, the electrode forming groove 1
Plate-shaped electrode members 2 and 3 made of a conductive material are arranged and formed so as to fill the electrodes 2 and 13. A metal such as an alloy of titanium and gold, a conductive semiconductor, a conductive resin, or the like is used for the plate-shaped electrode members 2 and 3 made of this conductive material. When using a metal, vapor deposition, when using a conductive semiconductor, CVD (c
Chemical vapor deposition), and in the case of a conductive resin, it can be formed by applying and curing a conductive resin paste.

Although the upper end portions 2a, 3a of the plate-like electrode members 2, 3 are formed on the surface of the substrate 1 in FIG. 1, the upper end portions 2a, 3a on the surface of the substrate 1 are formed.
By using 3a, the capacitor element and other circuit elements of the high frequency integrated circuit can be easily connected.

As described above, in the capacitor element of the high frequency integrated circuit device according to the first embodiment, after a groove is formed in the substrate by etching, a plate-like member made of a conductive material is formed by vapor deposition or the like so as to fill the groove. It can be prepared by arranging and forming the metal electrode and SiO2, SiO2.
Since it is not necessary to alternately stack dielectric films such as N and SiN, the number of manufacturing steps can be greatly reduced as compared with the conventional capacitor element shown in FIG.

The capacitance C of the capacitor according to the first embodiment is such that the area of the semi-insulating portion 4 arranged between the conductive plate members (electrodes) 2 and 3 is S and the thickness of the semi-insulating portion 4 is S. Where d is the relative permittivity of the semi-insulating portion 4 and εo is the relative permittivity of the vacuum, C = εr · εo · S / d, and the capacitance C is equal to that of the semi-insulating portion 4. Although it can be increased by increasing the area S, the height h and the width w of the semi-insulating portion 4 are determined by the depth and the length of the grooves 12 and 13. By changing
It is possible to easily increase the capacity of the capacitor without increasing the chip area.

Specifically, for example, a semi-insulating GaAs substrate (relative permittivity εr = 12.9) is used as the semi-insulating substrate 1, and the height h of the semi-insulating portion 4 is 50 μm and the width w is 500.
μm and thickness d is 2000 angstrom,
The capacitance C is about 14.3 pF, and a capacitance that can be effectively used in the high frequency integrated circuit device can be obtained.

Embodiment 2 FIG. The second embodiment of the present invention is
According to FIG. 2, in a high frequency integrated circuit device formed on a semi-insulating substrate made of a compound semiconductor, a plurality of conductive parts 5 are formed in the semi-insulating substrate 1 by first ion implantation. The isolation portions 4b are formed so as to extend vertically downward from the upper surface and are arranged in parallel to each other, and an isolation portion 4b is provided between each of the plurality of conductive portions vertically downward from the upper surface of the substrate by the second ion implantation. In this embodiment, a high-frequency integrated circuit device that is easy to manufacture, has a small chip area, and is inexpensive can be obtained.

That is, in FIG. 2, a pair of conductive portions 5 formed by ion implantation are provided in the insulating substrate 1.
They are arranged in parallel to each other with the isolation portion 4b formed by ion implantation interposed therebetween.

In the second embodiment of the present invention having such a structure, a capacitor is composed of the pair of conductive parts 5 and the isolation part 4b sandwiched by the conductive parts.

A method of manufacturing the high frequency integrated circuit device according to the second embodiment will be described. That is, first ion implantation is performed vertically downward from the upper surface of the semi-insulating substrate 1 to form a conductive portion 5 in the substrate 1, and thereafter, the substrate 1 is vertically perpendicular to the upper surface of the substrate. Second ion implantation is performed downward to form the isolation portion 4b in the substrate 1. For example, as the semi-insulating substrate 1, semi-insulating GaAs is used.
When a substrate is used, Si (silicon) or the like is used as the ion species for the first ion implantation, and B (boron), O (oxygen), or H (hydrogen) or the like is used as the ion species for the second ion implantation. Ions may be implanted. Here, the pair of conductive portions 5 and the isolation portion 4b between the conductive portions 5 are
As shown in FIG. 3, a pair of opposing conductive parts 5 is formed by the first ion implantation (FIG. 3 (a)), and then the second ions are formed in the region between the conductive parts 5 which are not ion-implanted. Injection is performed to form the isolation portion 4b (FIG. 3B).
) Is formed. Alternatively, as shown in FIG. 4, one conductive portion 5 is formed by the first ion implantation (FIG. 4 (a)), and the conductive portion 5 is separated into two in the central portion of the formed conductive portion 5. As described above, the second ion implantation may be performed to form the isolation portion 4b (FIG. 4 (b)). As shown in FIG. 3, when the pair of conductive parts 5 facing each other is formed by the first ion implantation, the region between the conductive parts 5 not ion-implanted remains semi-insulating. Even in the non-implanted region, the implanted ion species are ion-implanted between the ion-implanted regions when heat treatment is performed to make the ion-implanted region a conductive region after the first ion implantation. It becomes a conductive region by diffusing into a non-existing region. Therefore,
Considering that the region not ion-implanted does not sufficiently function as a dielectric constituting a capacitor as it is, as shown in FIG. 3, a pair of conductive layers opposed to each other by the first ion implantation is used. Even when the portion 5 is formed, the isolation portion 4b formed by the second ion implantation is provided.

Although the metal electrode 6 is provided on the conductive portion 5 in FIG. 2, the metal electrode 6 facilitates connection between the capacitor element and another circuit element of the high frequency integrated circuit.

As described above, in the capacitor element of the high-frequency integrated circuit device according to the second embodiment, the substrate is ion-implanted twice, and the pair of conductive portions 5 and the isolator sandwiched between the pair of conductive portions are formed. By forming the connection portion 4b, this can be manufactured, and the manufacturing thereof can be made easier as compared with the conventional capacitor element shown in FIG.

The capacitance C of the capacitor according to the second embodiment is such that the area of the isolation portion 4b disposed between the conductive portions (electrodes) 5 is S, and the isolation portion 4b is
Is d, the relative permittivity of the semi-insulating portion 4 is εr, and the relative permittivity of vacuum is εo, then C = εr.εo.S / d, and the capacitance C is the area S of the semi-insulating portion 4. Can be increased by increasing. However, the area S
Is determined by the depth and length of ion implantation, so by changing the conditions of this ion implantation (mask shape, implantation energy, etc.), it is easy to increase the capacitance of the capacitor without increasing the chip area. Can be realized.

Embodiment 3 The third embodiment of the present invention is
According to FIG. 5, in a high frequency integrated circuit device formed on a semi-insulating substrate made of a compound semiconductor, in the semi-insulating substrate 1, three or more electrode forming grooves 12, 13, 12b are formed.
Are provided in parallel with each other vertically downward from the upper surface of the substrate, and the three or more electrode-forming grooves 12, 13, 12b are provided.
A plurality of plate-shaped electrode members 2, 3, made of a conductive material
2c is formed so as to fill these grooves, which makes it possible to obtain a high-frequency integrated circuit device which is easy to manufacture, has a small chip area, and is inexpensive in the third embodiment. .

That is, in FIG. 5, the insulating substrate 1 has three or more (three in FIG. 5) electrode forming grooves 12, 1.
3, 12b are provided so as to be arranged in parallel to each other with the semi-insulating portion 4 made of a compound semiconductor constituting the substrate interposed therebetween. Further, in the electrode forming grooves 12, 13, 12b, the plate-like electrode members 2, 3, 2c made of a conductive material are formed.
Are formed so as to fill these grooves.

In the third embodiment of the present invention having such a structure, the plate-like electrode members 2, 3, 2 made of a conductive material are used.
c and the semi-insulating portion 4 sandwiched between these plate-like electrode members form a multilayer capacitor.

FIG. 6 is a sectional view and an equivalent circuit diagram of the capacitor element of the high frequency integrated circuit device according to the third embodiment, and FIGS. 6 (a), 6 (b) and 6 (c). ) Indicates a cross-sectional view and an equivalent circuit diagram when the number of electrode forming grooves is 3, 4, and 5, respectively. In the figure, C1, C2,
C3 represents each capacitance value between the electrode forming grooves in the case of having three, four, and five electrode forming grooves, respectively, 60 represents an electrode portion, and 70 represents an insulating portion.

FIG. 7 is a top view of the capacitor element of the high frequency integrated circuit device according to the third embodiment, and FIGS. 7 (a), 7 (b) and 7 (c) respectively show A top view is shown when the number of electrode forming grooves is three, four, and five. In the figure, the same reference numerals as those in FIG. 6 denote the same or corresponding portions, and 80 denotes wiring.

As shown in FIGS. 6 (a), 6 (b) and 6 (c), by forming three, four and five electrode portions respectively, each high frequency integrated circuit has two One, three, and four capacitor elements are obtained. If the capacitance values of the capacitor elements of the respective high frequency integrated circuits are C1, C2 and C3 and they are arranged in parallel, each high frequency integrated circuit will have a capacitance value of 2C1, 3C2 and 4C3 respectively. Can be obtained. As described above, by forming a capacitor element having a multilayer structure including the electrode portion 60 and the insulating portion 70 sandwiched between these electrode portions, and by forming a circuit configuration in which the respective capacitor elements are parallel to each other, it is possible to easily increase the size. The capacity can be increased.

Further, as shown in FIGS. 7 (a), 7 (b) and 7 (c), the wirings 80 connected to the electrode portion 60 are alternately drawn out in the opposite direction, so that the electrode portion 60 Even if the number of wirings increases, the wirings do not cross each other, and the capacity can be easily increased.

A method of manufacturing the high frequency integrated circuit device according to the third embodiment will be described. First, three or more parallel electrode forming grooves 12, 13, 12b are formed in a semi-insulating substrate, for example, a semi-insulating GaAs substrate 1 so as to be parallel to each other vertically downward from the upper surface of the substrate. , Formed by etching. Here, as the etching method, similar to the first embodiment, RIE (Reactive Ion Etching) or the like is used.
An etching method that enables etching with a high aspect ratio is used. Next, the electrode forming grooves 12, 13, 12b
So as to fill up the plate-like electrode member 2 made of a conductive material.
3 and 2c are formed. As in the first embodiment, a metal such as an alloy of titanium and gold, a conductive semiconductor, a conductive resin, or the like is used for the plate-shaped electrode members 2, 3, and 2c made of this conductive material. When using a metal, vapor deposition, when using a conductive semiconductor, CVD, (chemical vapor depositi
on; chemical vapor deposition), and in the case of a conductive resin, it can be formed by applying and curing a conductive resin paste.

As described above, in the capacitor element of the high frequency integrated circuit device according to the third embodiment, after the groove is formed in the substrate by etching, the plate-like electrode member made of a conductive material is formed by vapor deposition or the like so as to fill the groove. Can be formed by forming. In order to realize a multilayer capacitor element having a large capacitance with the conventional capacitor element structure shown in FIGS. 9 and 10, an electrode metal and, for example, SiO2 are used.
, SiON, SiN, etc. are required to be laminated alternately and repeatedly, and the number of steps is extremely large. However, as described above, the capacitor of the high frequency integrated circuit device according to the third embodiment. The element can realize a capacitor element having a large capacitance with a very small number of steps by forming a groove in a substrate by etching and then forming a plate-like electrode member made of a conductive material so as to fill the groove by vapor deposition or the like. .

Fourth Embodiment Embodiment 4 of the present invention
According to FIG. 8, in a high frequency integrated circuit device formed on a semi-insulating substrate made of a compound semiconductor, three or more conductive parts 50 are formed in the semi-insulating substrate 1 by the first ion implantation. The isolation portions 40 are formed so as to extend vertically downward from the upper surface of the substrate and are arranged in parallel to each other, and an isolation portion 40 is provided between each of the three or more conductive portions from the upper surface of the substrate by the second ion implantation. It is formed so as to extend vertically downward, which makes it possible to obtain an inexpensive high frequency integrated circuit device in the fourth embodiment, which is easy to manufacture, has a small chip area.

That is, in FIG. 8, in the insulating substrate 1, three or more (three in FIG. 8) conductive portions 50 formed by ion implantation are provided with isolation portions 40 formed by ion implantation. They are placed in parallel with each other with the pinching in between.

In Embodiment 4 of the present invention having such a structure, a capacitor is composed of three or more conductive parts 50 and the isolation part 40 sandwiched between the conductive parts.

FIG. 6 is a sectional view and an equivalent circuit diagram showing a capacitor element of a high frequency integrated circuit device according to the fourth embodiment, and FIGS. 6 (a), 6 (b) and 6 ( c) is
A cross-sectional view and an equivalent circuit diagram in the case where the number of electrode forming grooves is 3, 4, and 5, respectively, are shown in FIG.
C2 and C3 represent capacitance values between the electrode forming grooves when the electrode forming grooves have three, four, and five electrode forming grooves, respectively, and 60
Indicates an electrode portion, and 70 indicates an insulating portion.

FIG. 7 is a top view of the capacitor element of the high frequency integrated circuit device according to the fourth embodiment, and FIGS. 7 (a), 7 (b) and 7 (c) respectively show the same. A top view is shown when the number of electrode forming grooves is three, four, and five. In the figure, the same reference numerals as those in FIG. 6 denote the same or corresponding portions, and 80 denotes wiring.

As shown in FIGS. 6 (a), 6 (b) and 6 (c), by forming three, four and five electrode portions respectively, each high frequency integrated circuit has two One, three, and four capacitor elements are obtained. If the capacitance values of the capacitor elements of the respective high frequency integrated circuits are C1, C2 and C3 and they are arranged in parallel, each high frequency integrated circuit will have a capacitance value of 2C1, 3C2 and 4C3 respectively. Can be obtained. As described above, by forming a capacitor element having a multilayer structure including the electrode portion 60 and the insulating portion 70 sandwiched between these electrode portions, and by forming a circuit configuration in which the respective capacitor elements are parallel to each other, it is possible to easily increase the size. The capacity can be increased.

Further, as shown in FIGS. 7 (a), 7 (b), and 7 (c), the wirings 80 connected to the electrode portion 60 are alternately drawn out in the opposite direction. Even if the number of wirings increases, the wirings do not cross each other, and the capacity can be easily increased.

A method of manufacturing the high frequency integrated circuit device according to the fourth embodiment will be described. That is, first ion implantation is performed on the semi-insulating substrate 1 vertically downward from the upper surface of the substrate to form a conductive portion 50 in the substrate 1, and then, on the substrate 1 vertically downward from the upper surface of the substrate. A second ion implantation is performed to form an isolation portion 40 in the substrate 1. For example, as the semi-insulating substrate 1, semi-insulating GaAs is used.
When a substrate is used, Si (silicon) or the like is used as the ion species for the first ion implantation, and B (boron), O (oxygen), or H (hydrogen) or the like is used as the ion species for the second ion implantation. Ions may be implanted. Here, three or more conductive parts 50 and the isolation part 4 between the conductive parts 50.
In the case of 0, after forming three or more conductive parts 50 arranged in parallel with each other in the first ion implantation step, second ion implantation is performed in a region between the non-ion-implanted conductive parts 50. It is formed as if the isolation portion 40 is formed. Alternatively, one conductive portion 50 is formed in the first ion implantation step, and second ion implantation is performed so that the formed conductive portion 50 is divided into three or more portions to form the isolation portion 4b. You may Three or more conductive parts 5 arranged in parallel with each other by the first ion implantation
When forming 0, the conductive portion 5 not ion-implanted
Although the region between 0s remains semi-insulating, when the region not ion-implanted is also subjected to heat treatment to make the region ion-implanted after the first ion-implantation a conductive region, The implanted ionic species diffuse into the non-ion-implanted region between the ion-implanted regions to form a conductive region. Therefore, considering that the region not ion-implanted does not function sufficiently as a dielectric that constitutes the capacitor as it is,
Even when the three or more conductive parts 50 arranged in parallel to each other are formed by the first ion implantation, the isolation part 40 by the second ion implantation is provided.

In FIG. 8, the metal electrode 6 is formed on the conductive portion 50.
The metal electrode 6 allows the capacitor element to be easily connected to other circuit elements of the high frequency integrated circuit.

As described above, in the capacitor element of the high frequency integrated circuit device according to the fourth embodiment, the substrate is ion-implanted twice, and three or more conductive portions 50 and the isolator sandwiched between the conductive portions are formed. This can be manufactured by forming the connection portion 40, which is an extremely small number of steps as compared with the case of realizing a multilayer capacitor element having a large capacitance with the conventional capacitor element structure shown in FIGS. 9 and 10. Thus, a multi-layered capacitor element having a large capacitance can be realized.

[Brief description of drawings]

FIG. 1 is a perspective view showing a structure of a high frequency integrated circuit device according to a first embodiment of the present invention.

FIG. 2 is a perspective view showing the structure of a high frequency integrated circuit device according to a second embodiment of the present invention.

FIG. 3 is a diagram showing an example of a manufacturing process of a high frequency integrated circuit device according to a second embodiment of the present invention.

FIG. 4 is a diagram showing an example of a manufacturing process of a high frequency integrated circuit device according to a second embodiment of the present invention.

FIG. 5 is a perspective view showing a structure of a high frequency integrated circuit device according to a third embodiment of the present invention.

FIG. 6 is a sectional view and an equivalent circuit diagram of a capacitor element of a high frequency integrated circuit device according to the third and fourth embodiments of the present invention.
They are (a), (b), and (c).

FIG. 7 is a top view (a), (b), (c) of a capacitor element of the high frequency integrated circuit device according to the third and fourth embodiments of the present invention.

FIG. 8 is a perspective view showing the structure of a high frequency integrated circuit device according to a fourth embodiment of the present invention.

FIG. 9 is a diagram showing a MIM capacitor structure of a conventional high frequency integrated circuit device.

FIG. 10 is a diagram showing a capacitor structure of another conventional high-frequency integrated circuit device.

[Explanation of symbols]

1 semi-insulating substrate, 2, 3 plate-shaped electrode members, 12, 13
Electrode forming groove, 2a Upper end of plate-like electrode member 2, 3a
Upper end of plate-shaped electrode member 3, 2c Plate-shaped electrode member, 12b
Electrode forming groove, 4 semi-insulating part, 4b isolation part, 5 conductive part, 6 metal electrode, 40 isolation part, 50 conductive part, 60 electrode part, 70 insulating part,
80 wiring.

Claims (6)

[Claims] 1. A high-frequency integrated circuit device formed on a semi-insulating substrate made of a compound semiconductor, wherein a plurality of electrode-forming grooves are formed on the semi-insulating substrate vertically downward from the upper surface of the substrate. And a plurality of plate-shaped electrode members made of a conductive material are formed in each groove of the plurality of electrode forming grooves so as to fill these grooves. apparatus. 2. The high frequency integrated circuit device according to claim 1, wherein the semi-insulating substrate is provided with two of the electrode forming grooves. 3. The high frequency integrated circuit device according to claim 1, wherein the semi-insulating substrate is provided with three or more electrode forming grooves. 4. A high frequency integrated circuit device formed on a semi-insulating substrate made of a compound semiconductor, wherein the semi-insulating substrate is formed so as to extend vertically downward from the upper surface of the substrate by first ion implantation. A plurality of conductive portions arranged in parallel with each other, and an isolation portion formed so as to extend vertically downward from the upper surface of the substrate by the second ion implantation between the plurality of conductive portions. A high frequency integrated circuit device characterized by being provided. 5. The high frequency integrated circuit device according to claim 4, wherein the two conductive parts are provided in the semi-insulating substrate. 6. The high frequency integrated circuit device according to claim 4, wherein three or more conductive parts are provided in the semi-insulating substrate.