JPH0954788A - Method for designing printing circuit board, printing circuit board and electronic equipment provided with printing circuit board - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce the generation of radiation noise caused mainly by a power source line when an IC having a multipin lead is mounted on a two-layer printing circuit board in place of a multilayer printing circuit board. SOLUTION: In order to mount an electronic circuit element on the two-layer printer wiring plate 1 in which printing circuit patterns are formed on a surface 1a and a back face 1b via an insulated base part 100, a land 8 is arranged on the surface, a ground pattern 2 is extended up to the inside part of the electronic circuit element, the trunk power source pattern 5 of a trunk is arranged, a branching is performed from the trunk power source pattern, the branching is extended up to the inside portion of the electronic circuit element and a power source branching pattern 3 is connected to a part of the land via a throughhole 6. An inductance pattern is formed so that the inductance formed between the power source branching pattern and the trunk power source pattern may be larger than the inductance between a bypass capacitor arranged in the vicinity of the power source branching pattern and the power source branching pattern 3.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for designing a printed circuit board, a printed circuit board, and an electronic device including the printed circuit board, and more particularly to a technique for reducing a generation level of radiation noise in a two-layer printed circuit board. is there.

[0002]

2. Description of the Related Art Conventionally, as a measure for preventing generation of radiation noise on a printed circuit board, a power supply pattern and a GN are used.
2. Description of the Related Art A multilayer printed circuit board has been put into practical use in the past, in which a dedicated conductive layer is formed for each D (ground) pattern, and a power supply pattern and a GND pattern are opposed to each other in a planar shape having a predetermined area. As described above, since a conductive layer dedicated to the power supply pattern and the GND pattern is formed as a countermeasure against radiation noise and the power supply pattern and the GND pattern are opposed to each other, the multilayer printed circuit board has a high product cost. There have been active studies to satisfy the standards for controlling radiated noise using a substrate.

Therefore, for example, in a two-layer printed circuit board in which patterns are formed on the front and back surfaces of the insulating base of the board, a large capacitive coupling can be obtained by making the power supply pattern and the GND pattern face each other over a wide area. Radiation noise countermeasures are performed by inserting a bypass capacitor between the power supply pattern and the GND pattern, or by using noise suppression components including many filters in the power supply line and the signal line.

[0004]

DISCLOSURE OF THE INVENTION Problems to be Solved by the Invention
When an IC having a lead pin in the direction is mounted on a two-layer printed circuit board, the wiring space is small and the following problems occur. That is, since the 1.2-layer printed circuit board is different from the multilayer printed circuit board in that there is a constraint that a wiring space for lead pins in four directions is secured, the wiring space power supply pattern and the GND pattern are wide as in the multilayer printed circuit board. Can not be opposed in area.

For this reason, the noise voltage generated in the power supply pattern becomes large. Also, force the power supply pattern and GN.
If they are opposed to each other so as to have a capacitive coupling between the D patterns, the area of the GND is reduced or the GND is divided, so that the inductance of the GND is increased and the noise generated in the GND is increased.

Especially when an IC having lead pins in four directions is used in a two-layer printed circuit board, the power source pattern and the G
If capacitive coupling is provided between the ND patterns, the wiring space is reduced, the GND pattern is extremely weakened, and common mode radiation noise increases. 2.4 A lot of signal patterns are arranged around and inside the land where the IC having the lead pin in four directions is mounted. Therefore, if the GND pattern is thin, it is inevitable and also divided in places. As a result, the effect of the bypass capacitor mounted at a small angle is reduced. 3.4 There are many signal patterns around and inside the land where ICs with lead pins in the 4-direction are mounted, so the GND pattern is thin and is divided in places, which is the return path of the charging current that flows through the signal pattern. Since the pattern must be divided, the current cannot flow through the shortest path. It is necessary to mount a noise countermeasure component such as a filter in order to cover the drawbacks described in 4.1, but for example, a countermeasure component such as a low pass filter formed by an inductor and a capacitor is GND.
Since the effect is weak, only a small effect can be obtained.

A conventional configuration example based on the accompanying drawings,
An example of mounting an IC having lead pins in four directions on a two-layer printed circuit board will be described. FIG. 5A shows the upper surface 1 of the substrate 101.
01a is a plan view, 102 is a GND pattern, 105 is a basic power supply pattern, which is directly connected to the land for the power supply pattern of the IC, and is connected to the land of the IC lead pin and the GND pattern on the back surface and the capacitance It has a large area for the purpose of binding. 108 is I
It is a land where the lead of the input / output signal of C is mounted,
Although not shown, the signal line 107 is connected to a thin pattern. All lands are the same as 108 lands. The land indicated by 109 is the GND of the IC
The land on which the pin is mounted and which is connected to the thick pattern 102 indicated by diagonal lines is the same as 109.
The land indicated by 110 is a land on which the power supply pin of the IC is mounted, and the land connected to the power supply line 105 is the same as 110. The circular shape indicated by 106 is a through hole for connecting the pattern on the reference surface (A) and the pattern on the back surface (B).

Next, FIG. 5B shows the back surface 101 of the substrate 101.
It is the top view which showed b, and is the figure shown in the state seen through by peeling off the insulating base part 100. In this figure, 10
Reference numeral 5 is a power supply pattern which is the basis of the two-layer printed circuit board. 111 and 112 are lands on which bypass capacitors of chip components are mounted, the lands of 111 are connected to a power supply pattern, and the lands of 112 are connected to a GND pattern.

In the above-mentioned structure, since the thicker power source pattern is directly connected to the land for mounting the power supply lead pins of the IC, noise is likely to be applied to the power source pattern and the radiation spread over the entire substrate 101. The noise level of becomes high.

Further, as shown in FIG. 5A, since the GND pattern is not drawn out to the outside of the lead pin in the downward direction with respect to the four directions of the IC lead pin, the current loop of the charging current becomes large. Further, since many of them cannot be connected to the GND pattern toward the inside of the IC lead pin, the power pin → bypass capacitor → GN
The loop area of the D pin becomes very large.

As described above, in the two-layer printed circuit board, the radiation noise generation level is likely to be high, so that it is necessary to separately take other measures using a power supply filter, an electromagnetic shield and the like. When QFP (quad flat package) or QTP (quad tape package) having narrow pitch multi-pin leads in four directions is used and mounted on a two-layer printed circuit board instead of the multilayer printed circuit board, , Each of the above problems became more apparent.

Therefore, the present invention has been made in view of the above problems, and when an IC having a multi-pin lead is mounted on a two-layer printed circuit board instead of the multilayer printed circuit board, a power supply line is provided. It is an object of the present invention to provide a method of designing a printed circuit board, a printed circuit board, and an electronic device including the printed circuit board, which can reduce the generation of radiation noise mainly caused by the above.

An IC having lead pins in four directions in particular
When mounted on a two-layer printed circuit board, a radiation noise level close to that of a conventional general multi-layer printed circuit board can be realized, and when the two-layer printed circuit board is incorporated into an electronic device, the conventional two-layer printed circuit board is used. An object of the present invention is to provide a method of designing a printed circuit board, a printed circuit board, and an electronic device including the printed circuit board, which can significantly improve the radiated noise level in comparison with the printed circuit board and can sufficiently satisfy the EMI (electromagnetic interference) standard. I am trying.

[0014]

Means for Solving the Problems The above-mentioned problems are solved,
In order to achieve the object, according to the method for designing a printed circuit board of the present invention, a plurality of lead elements are arranged in four directions on a two-layer printed wiring board having a printed circuit pattern formed on the front surface and the back surface via an insulating base. A method for designing a printed circuit board for mounting an electronic circuit element, comprising: arranging a land on the surface for mounting the electronic circuit element, and extending a ground pattern to an inner portion of the electronic circuit element. Then, a main power supply pattern is provided on the front surface or the back surface, a power supply branch pattern is provided that branches from the main power supply pattern and extends to an inner portion of the electronic circuit element, and the through-hole is used to The power supply branch pattern and the main power supply are more connected than the inductance formed between the bypass capacitor which is connected to a part of the land and is arranged near the power supply branch pattern. It is characterized in that an inductance is formed between the turn forms an inductance pattern becomes larger.

A method of designing a printed circuit board for mounting an electronic circuit element having a plurality of lead pins in four directions on a two-layer printed wiring board having a printed circuit pattern formed on the front surface and the back surface via an insulating base. There, a land is provided on the surface for mounting the electronic circuit element, a ground pattern is extended to an inner portion of the electronic circuit element, and the backbone is parallel to the upper and lower rows of the land on the back surface. The two main power supply patterns are provided, branch from the main power supply pattern, extend to the inner side of the electronic circuit element, and form a power supply branch pattern on a part of the land through a through hole. The power supply branch pattern and the core power supply pattern are more connected than the inductance formed between the bypass capacitors connected to the power supply branch pattern and in the vicinity thereof. It is characterized in that an inductance is formed between the over emissions meanders form an inductance pattern so as to increase.

A method of designing a printed circuit board for mounting an electronic circuit element having a plurality of lead pins in four directions on a two-layer printed wiring board having a printed circuit pattern formed on the front and back surfaces via an insulating base. Therefore, a land is provided on the surface for mounting the electronic circuit element, a ground pattern is extended to an inner portion of the electronic circuit element, and a basic power source pattern serving as a core is arranged on the front surface or the back surface. The main power supply pattern is formed through an inductance pattern that is meandered to the inside portion of the electronic circuit element on the front surface through the through hole, and is further extended to the back surface through the through hole. A power branch pattern is connected to a part of the land, and is formed between a bypass capacitor arranged near the power branch pattern. Than the inductance, is characterized in that to make the inductance formed between the said power supply branch pattern main power supply pattern is increased.

A printed circuit board for mounting an electronic circuit element having a plurality of lead elements in four directions on a two-layer printed wiring board having a printed circuit pattern formed on the front and back surfaces via an insulating base. A land disposed on the surface for mounting the electronic circuit element, a ground pattern extending to an inner portion of the electronic circuit element, and a main power source for the backbone disposed on the front surface or the back surface. A pattern, a power supply branch pattern branched from the main power supply pattern, extending to an inner portion of the electronic circuit element, and connected to the land through a through hole,
An inductance pattern formed such that the inductance formed between the power supply branch pattern and the main power supply pattern is larger than the inductance formed between the bypass capacitor arranged near the power supply branch pattern. It is characterized by having and.

A printed circuit board for mounting an electronic circuit element having a plurality of lead pins in four directions on a two-layer printed wiring board having a printed circuit pattern formed on the front and back surfaces via an insulating base. Lands arranged on the front surface for mounting the electronic circuit element, a ground pattern extending to an inner portion of the electronic circuit element, and arranged on the rear surface in parallel with the upper and lower rows of the lands. And two main power supply patterns serving as the main power supply, each of which is branched from the main power supply pattern and extends to an inner portion of the electronic circuit element, and is formed on a part of the four pieces of the land through through holes. The power supply branch pattern is more than the inductance formed between the connected power supply branch pattern and the bypass capacitor arranged near the power supply branch pattern. It is characterized by comprising an inductance pattern inductance formed between said main power supply pattern is meander formed to be larger.

A printed circuit board for mounting an electronic circuit element having a plurality of lead pins in four directions on a two-layer printed wiring board having printed circuit patterns formed on the front and back surfaces via an insulating base. A land arranged on the front surface for mounting the electronic circuit element, a ground pattern extending to an inner portion of the electronic circuit element, and a basic power supply pattern serving as a trunk arranged on the back surface, The main power source pattern is formed through an inductance pattern that is formed in a meandering shape on the front surface through the through hole to the inside portion of the electronic circuit element, and is further extended to the back surface through the through hole to extend to the back surface of the land. And a bypass capacitor arranged in the vicinity of the power supply branch pattern. Than in the inductance to be formed, it is characterized in that an inductance is formed between said main power supply pattern and the power branch pattern is made larger.

An electronic device having a printed circuit board for mounting an electronic circuit element having a plurality of lead elements in four directions on a two-layer printed wiring board having a printed circuit pattern formed on the front and back surfaces via an insulating base. A device, a land provided on the front surface for mounting the electronic circuit element, a ground pattern extending to an inner portion of the electronic circuit element, and a backbone of a backbone provided on the back surface. A power supply pattern, a power supply branch pattern that is branched from the main power supply pattern, extends to an inner part of the electronic circuit element, and is connected to a part of the land through a through hole, and the vicinity of the power supply branch pattern The inductance formed between the power supply branch pattern and the main power supply pattern, rather than the inductance formed between the bypass capacitor arranged in It is characterized by comprising an inductance pattern wardrobe is formed to be larger.

Further, an electronic device having a printed circuit board for mounting an electronic circuit element having a plurality of lead pins in four directions on a two-layer printed wiring board having a printed circuit pattern formed on the front and back surfaces via an insulating base. A land disposed on the front surface for mounting the electronic circuit element, a ground pattern extending to an inner portion of the electronic circuit element, and the upper and lower rows of the land on the rear surface. Two basic power supply patterns that are arranged in parallel and are branched from the basic power supply pattern, extend to the inside of the electronic circuit element, and have four pieces of the land through through holes. The inductance formed between a power supply branch pattern connected to a part of the power supply branch pattern and a bypass capacitor arranged in the vicinity of the power supply branch pattern, It is characterized by comprising an inductance pattern source inductance formed between the branching pattern and said main power supply pattern is meander formed to be larger.

An electronic device having a printed circuit board for mounting an electronic circuit element having a plurality of lead pins in four directions on a two-layer printed wiring board having a printed circuit pattern formed on the front and back surfaces via an insulating base. A land that is provided on the front surface for mounting the electronic circuit element, a ground pattern that extends to an inner portion of the electronic circuit element, and a backbone that is a backbone provided on the back surface. A power supply pattern and an inductance pattern, which is meanderingly formed from the core power supply pattern to the inside portion of the electronic circuit element on the front surface through a through hole, and further extends to the back surface through a through hole. And a power branch pattern connected to a part of the four pieces of the land, and a bypass disposed near the power branch pattern. Than the inductance formed between the capacitor, is characterized in that an inductance is formed between said main power supply pattern and the power branch pattern is made larger.

In the above structure, an IC having leads in four directions, for example, has many power supply pins, GND pins, and signal pins. First, one or several power supply patterns from the outside of the IC leads are used as the backbone. The maximum space for the GND pattern can be secured by branching from the power supply pattern to the area inside the lead pin of the IC and then connecting to the land for mounting the power pin from the area inside the lead pin. The GND pattern is drawn from the land for pins to the area outside the four directions of the IC to minimize the GND return power supply loop of the charging current that can be the maximum radiation noise source, and further, the core power supply pattern and the IC. If an inductance is present between the power supply patterns drawn into the power supply of the That the spread can be greatly suppressed. The inductance is formed between the bypass capacitor and the basic power supply pattern so that the value of the inductance is larger than the inductance from the position of the bypass capacitor of the power supply pattern to the power supply pattern of the IC chip.

[0024]

BEST MODE FOR CARRYING OUT THE INVENTION Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.

(First Embodiment of the Invention) FIG. 1 is a plan view of a two-layer printed circuit board 1 showing how an IC having lead pins in four directions is mounted in the first embodiment of the present invention (A).
And a rear view (B) showing the back surface side of the substrate 1, the rear view (B) being an insulating base part as shown in order to clarify the mutual positional relationship with the plan view (A) which is the front surface. FIG. 3 is a diagram showing a state in which 100 is peeled off and seen through, and the wiring patterns, through holes, and chip component mounting lands formed on the front and back surfaces of the substrate 1 are shown by solid lines. Further, in order to make the mutual positional relationship with the surface 1a of the substrate 1 easy to understand, the shapes and positions of the IC lead pin mounting lands are shown by broken lines 8, 9 and 10 on the rear view (B) side. Also,
Although this figure describes the case where one IC having lead pins in four directions is mounted as a representative, it goes without saying that a plurality of ICs are usually mounted.

First, in FIG. 1A, on the surface 1a which is the upper surface of the substrate 1 and which is a component mounting surface, a portion where the GND pattern 2 is surrounded by the lands 8 and the middle of the lands 8 as shown in the figure. It is provided radially from. In addition, the power supply pattern 3 for the IC is surrounded by the land 8 and has a land 8 inside.
It is formed to extend from.

The land 8 serving as a lead for input / output signals of the IC is connected to the thin pattern shown by the signal line 7, while the land 9 is a land on which the GND pin of the IC is mounted. It is connected to the thick GND pattern 2 shown by hatching in the figure.

Land 10 on which power pins of IC are mounted
Is connected to the pattern 3 shown by a thick solid line and is electrically connected to the circular through hole 6a formed at the end of the pattern 3, and the through hole provided on the back surface 1b side of the substrate 1 The 6b is electrically connected.

Next, the back surface 1b of the substrate 1 will be described with reference to FIG. 1 (B). The power supply pattern 5 which is the backbone of the two-layer printed circuit board 1 is formed on the left and right as shown in the drawing, and in the middle thereof. The power supply pattern 4 is branched from the part. This power supply pattern 4 is branched from the power supply pattern 5 and is indicated by I.
This is a power supply pattern for drawing the lead pins of the IC indicated by the broken line exclusively for C into the inside of the land 10 to be mounted.

Lands 11 and 12 for mounting bypass capacitors of chip parts are formed at the positions shown in the figure. The land 11 includes the power supply pattern 4 and the land 12.
Are formed at positions respectively connected to the GND pattern.

In the above configuration, when considering the land of the bypass capacitor indicated by the land 11 as a reference, the inductance from the land 11 to the land 10 on which the power supply pin 3 of the IC is mounted is determined by the land 11 to the power supply pattern. The pattern is formed so that the inductance up to the basic power supply pattern 5 through 4 becomes large. Also, the above relationship is established based on the power supply lands of all bypass capacitors.

With such a shape, an ideal T-type low-pass filter can be formed, and the high frequency current loop of the power supply system can be reduced. Furthermore, I
The power supply to C can be wired in a relatively thin pattern and inside the land of the IC.

As a result, even in the vicinity of the land 8 on which an IC having lead pins in four directions in which wirings are densely mounted is mounted,
The degree of freedom for wiring the GND pattern 2 can be improved, and wiring can be ideally performed.

That is, as shown in FIG. 1A, the GN is provided at least at one or more locations in four directions of the IC lead pin.
By pulling out the D pattern 2 to the outside of the lead pin, the current loop of the charging current can be reduced. Further, since it can be connected to the GND pattern 2 in the inner direction of the lead pin of the IC, the loop area of the power supply pin → the bypass capacitor → the GND pin can be minimized.

(Second Embodiment of the Invention) FIG. 2 is a plan view (A) of a two-layer printed circuit board 1 and a rear view (B) showing the back surface side of the board 1, which is the first invention described above. Similar to the embodiment, the rear view (B) is a perspective view of the insulation base 100 peeled off as shown in order to clarify the mutual positional relationship with the plan view (A) which is the surface. Is.

In the figure, GN is formed on the upper surface 1a of the substrate 1.
The D pattern 2 and the power supply pattern 3 for the IC are formed inside and outside surrounded by the land 8 on which leads for input / output signals of the IC are mounted, as shown in the figure. The signal line 7 is connected to the land 8. The land 9 is a land on which the GND pin of the IC is mounted and is connected to the thick pattern 2 indicated by hashing. The land 10 is a land on which the power supply pin of the IC is mounted and is a pattern 3 shown by a thick solid line.
And is connected to the circular through hole 6a formed at the end of the pattern 3,
The through holes 6b provided on the rear surface 1b side are electrically connected to each other.

Further, in FIG. 2B, the power supply pattern 5 serving as the backbone is formed on the back surface 1b of the two-layer printed circuit board as shown in the drawing, and the power source pattern 5 is branched from this intermediate portion to I
A power supply pattern 4 for drawing in the lands 8, 9, 10 on which the C lead pin is mounted is formed. Land 1 where the bypass capacitor for chip parts is mounted
1 and 12 are provided, the land 11 is connected to the power supply pattern 4, and the land 12 is connected to the GND pattern 2. In addition, when considering the land of the bypass capacitor indicated by the land 11 as a reference, the inductance from the land 11 to the land on which the power supply pin of the IC is mounted is determined by the inductance of the land 11 through the power supply pattern 4 and the basic power supply pattern. The inductance pattern 14 is formed in a meandering shape so that the inductance up to 5 becomes large. Therefore, in the example shown in FIG. 2, a pattern is formed so that the inductance from the land 11 to the power supply pattern 5 serving as the core through the power supply pattern 4 becomes large with reference to the power supply lands of all the bypass capacitors. become.

As described above, a substantially ideal T-type low-pass filter can be formed and the inductance can be increased, so that the loop of the high frequency current of the power supply system can be reduced from a low frequency. it can.

Further, since the power supplied to the IC can be wired inside the land of the IC with a relatively thin pattern and a small number of two, that is, the upper and lower sides, the IC having lead pins in four dense directions is mounted. GN near the land
The degree of freedom of wiring of the D pattern is improved, and ideal wiring is possible.

That is, as shown in FIG. 2A, the GND of the lead pin of the IC is GND in at least one place in at least four directions.
By drawing the pattern outside the lead pin, the current loop of the charging current can be reduced. Further, since it can be connected to the GND pattern in the inner direction of the lead pin of the IC, the loop area of the power pin → the bypass capacitor → the GND pin can be minimized.

(Third Invention Embodiment) Reference plane (A) in FIG. 3 is the upper surface of substrate 1, 2 is a GND pattern, and 3 is a ground pattern.
Is a power supply pattern for IC. Reference numeral 4 is a power supply pattern for branching from the power supply pattern 5 serving as the backbone of the back surface (B) through a through hole 6a and drawing it into the inside of the land where the IC lead pin is mounted. It is formed between the through holes 6b.

Reference numeral 8 denotes a land on which leads for input / output signals of the IC are mounted, and although not shown, all the lands connected to a thin pattern as shown by the signal line 7 are 8
It is similar to the land. The land indicated by 9 is the GND of the IC
The land on which the pin is mounted and connected to the thick pattern 2 shown by hatching is the same as 9. The land shown by 10 is a land on which the power supply pin of the IC is mounted, and the land connected to the thick solid line 3 is the same as 10. The circular shape shown by 6 shows through holes for connecting the pattern of the reference surface (A) and the pattern of the back surface (B).

Next, the back surface (B) of the substrate 1 will be described.

Reference numeral 5 is a power supply pattern which is the basis of the two-layer printed circuit board. 11 and 12 are lands on which bypass capacitors of chip parts are mounted, 11 lands are connected to a power supply pattern, and 12 lands are connected to a GND pattern.

When the land of the bypass capacitor indicated by 11, for example, is considered as a reference, from the land of 11 I
The inductance formed in a meandering manner on the reference plane (A) so that the inductance from the land of 11 to the power supply pattern of 5 through the power supply pattern of 4 becomes larger than the inductance to the land where the power supply pin of C is mounted. The pattern is formed including the pattern 14. In FIG. 3, the above relationship holds based on the power supply lands of all bypass capacitors.

With such a shape, an ideal T-type low-pass filter can be formed and the inductance can be increased, so that the loop of the high frequency current of the power supply system can be reduced from a low frequency. The effect can be obtained.

Further, since the power supplied to the IC is wired inside the land of the IC with a relatively thin pattern and a small number of two, even in the vicinity of the land where an IC having lead pins in four directions in which conventional wiring is dense is mounted. The GND pattern has an advantage that the degree of freedom of wiring is improved and ideal wiring is possible. That is, as shown in the reference plane (A), the GND pattern is drawn out of the lead pin at least at one or more locations in the four directions of the IC lead pin, whereby the current loop of the charging current can be reduced. Further, since it can be connected to the GND pattern in the inner direction of the lead pin of the IC, the loop area of the power pin → the bypass capacitor → the GND pin can be minimized.

Fourth Embodiment of the Invention A reference surface (A) in FIG. 4 is the upper surface of the substrate 1, 2 is a GND pattern, and 3 is a ground pattern.
Is a power supply pattern for IC. Reference numeral 8 is a land on which leads for input / output signals of the IC are mounted, and all lands connected to a thin pattern as shown by the signal line 7 are the same as the lands 8 although not shown. The land indicated by 9 is a land on which the GND pin of the IC is mounted, and the land connected to the thick pattern 2 shown by hatching is the same as 9. The land shown by 10 is a land on which the power supply pin of the IC is mounted, and the land connected to the thick solid line 3 is 10.
Is the same as The circular shape shown by 6 shows through holes for connecting the pattern of the reference surface (A) and the pattern of the back surface (B).

Next, the back surface (B) of the substrate 1 will be described.

Reference numeral 5 is a power source pattern which is the basis of the two-layer printed circuit board. Reference numeral 4 is a pattern dedicated to the power supply pin closest to the signal pin for outputting the clock signal of the IC shown in the drawing, which is branched from the basic power supply pattern 5, and after forming the meandering inductance pattern 14, the power supply pin 4 is formed. Connected to the land for. 11 and 12 are lands on which bypass capacitors of chip parts are mounted, 12 lands are power supply patterns, and 12 lands are G
It is connected to the ND pattern.

Includes 14 parallel type inductance patterns from the land of the bypass capacitor to the inductance of the land of the power supply pin closest to the signal pin outputting the clock signal to the land of the bypass capacitor 4
The power supply pattern has a large inductance.

With such a shape, an ideal T-type low-pass filter with a large inductance is provided in the power supply pattern closest to the signal pin that outputs the clock signal that is particularly likely to generate a radiation noise in the power supply pattern. Since it can be formed, the loop of the high frequency current of the power supply system can be reduced from a low frequency.

As described above, in the power supply pattern of the two-layer printed circuit board connected to the power supply lead pin mounting land of the IC having the lead pins in four directions, the power supply pattern branched from the core power supply pattern is used for the IC lead pin. Bypassing to the inner area and then connecting to the power lead pin mounting land from the inner area of the lead pin so that the inductance is larger than the inductance from the IC power lead pin mounting land to the closest bypass capacitor position. Since the inductance pattern is provided between the capacitor and the main power supply pattern, the loop area of the charging current and the through current, which is the source of radiation noise, can be reduced.

As a result, the radiation noise directly generated from the printed circuit board can be suppressed, and when the printed circuit board having such a structure is used in electronic equipment, the radiation noise level can be lowered.

Further, when an inductance pattern shape, a spiral shape, or a coil shape formed in a meandering manner on the above-mentioned inductance pattern is formed, a large inductance can be obtained, so that an effect can be obtained from a low frequency region.

[0056]

As described above, according to the present invention,
A printed circuit board capable of reducing the generation of radiation noise mainly caused by a power supply line when an IC having a multi-pin read element is mounted on a two-layer printed circuit board instead of the multilayer printed circuit board. It is possible to provide the design method, the printed circuit board, and the electronic device including the printed circuit board.

An IC having lead pins in four directions in particular
When mounted on a two-layer printed circuit board, a radiation noise level close to that of a conventional general multi-layer printed circuit board can be realized, and when the two-layer printed circuit board is incorporated into an electronic device, the conventional two-layer printed circuit board is used. To provide a method for designing a printed circuit board, a printed circuit board, and an electronic device including the printed circuit board, which can significantly improve the radiated noise level in comparison with the printed circuit board and can sufficiently satisfy the EMI (electromagnetic interference) standard. You can

[0058]

[Brief description of drawings]

FIG. 1 is a plan view (A) of a two-layer printed circuit board 1 showing a state in which an IC having lead pins in four directions is mounted in the first embodiment of the present invention, and a back surface side of the board 1 is shown. It is the back view (B) shown.

FIG. 2 is a plan view (A) of a two-layer printed circuit board 1 showing a state in which an IC having lead pins in four directions is mounted in a second embodiment of the present invention, and a back surface side of the board 1 is shown. It is the back view (B) shown.

FIG. 3 is a plan view (A) of a two-layer printed circuit board 1 showing a state in which an IC having lead pins in four directions is mounted in a third embodiment of the present invention, and a rear surface side of the board 1; It is the back view (B) shown.

FIG. 4 is a plan view (A) of a two-layer printed circuit board 1 showing how ICs having lead pins in four directions are mounted in a fourth embodiment of the present invention, and a back surface side of the board 1; It is the back view (B) shown.

FIG. 5 is a top view (A) and a transparent bottom view (B) of a conventional example.
It is an explanatory view shown by, and a part of the substrate is cut out.

[Explanation of symbols]

1 board 2 GND pattern (ground pattern) 3 power supply pattern for IC (power supply branch pattern) 4 power supply pattern (branch pattern) for drawing from the power supply pattern that is the core to the inside of the lead pin mounting land of the IC 5 power supply that is the core ( Basic power supply pattern 6 Through hole 7 Signal pattern 8 Land on which IC signal lead pin is mounted 9 Land on which IC GND lead pin is mounted 10 Land on which IC power lead pin is mounted 11 Chip type bypass Land on the power supply pattern side for capacitors 12 Land on the GND pattern side for chip type bypass capacitors 14 Inductance pattern formed in a meandering manner

Claims (15)

[Claims] 1. A method of designing a printed circuit board for mounting an electronic circuit element having a plurality of lead elements in four directions on a two-layer printed wiring board having a printed circuit pattern formed on a front surface and a back surface via an insulating base. A land is provided on the surface for mounting the electronic circuit element, a ground pattern is extended to an inner portion of the electronic circuit element, and a main power supply pattern is provided on the front surface or the back surface. , A power supply branch pattern that branches from the main power supply pattern and extends to an inner portion of the electronic circuit element, and is connected to a part of the land through a through hole, and near the power supply branch pattern The inductance formed between the power supply branch pattern and the core power supply pattern is larger than the inductance formed between the bypass capacitor arranged in Printed circuit board design method, which comprises forming a composed inductance pattern. 2. The method of designing a printed circuit board according to claim 1, wherein the inductance pattern is formed in a shape that includes a meandering inductance pattern shape, a spiral shape, and a coil shape. 3. A method of designing a printed circuit board for mounting an electronic circuit element having a plurality of lead pins in four directions on a two-layer printed wiring board having a printed circuit pattern formed on a front surface and a back surface via an insulating base. A land is provided on the front surface for mounting the electronic circuit element, a ground pattern is extended to an inner portion of the electronic circuit element, and a backbone is provided on the back surface in parallel with upper and lower rows of the land. The two main power supply patterns are provided, branch from the main power supply pattern, extend to the inside of the electronic circuit element, and form a power supply branch pattern on a part of the land through a through hole. The power supply branch pattern and the main power supply pattern are more connected than the inductance formed between the bypass capacitor connected in the vicinity of the power supply branch pattern. Printed circuit board design method characterized in that the inductance is formed between the emission meanders form an inductance pattern so as to increase. 4. A method for designing a printed circuit board for mounting an electronic circuit element having a plurality of lead pins in four directions on a two-layer printed wiring board having a printed circuit pattern formed on a front surface and a back surface via an insulating base. A land is provided on the surface for mounting the electronic circuit element, a ground pattern is extended to an inner portion of the electronic circuit element, and a basic power source pattern serving as a core is arranged on the front surface or the back surface. The main power supply pattern is formed through an inductance pattern that is formed in a meandering manner on the front surface through the through hole to the inside portion of the electronic circuit element, and is further extended to the back surface through the through hole. A power supply branch pattern is connected to a part of the land and is formed between a bypass capacitor arranged near the power supply branch pattern. Than inductance, printed circuit board design method characterized by such inductance formed between the said power supply branch pattern main power supply pattern is increased. 5. In the land, a signal lead pin mounting land for outputting a clock signal having a repetitive periodicity, and a bypass arranged closest to a power supply lead pin mounting land closest to the input signal lead pin mounting land. The method for designing a printed circuit board according to claim 3 or 4, wherein the inductance pattern is formed so as to have an inductance larger than that formed between the capacitors. 6. A printed circuit board for mounting an electronic circuit element having a plurality of lead elements in four directions on a two-layer printed wiring board having a printed circuit pattern formed on a front surface and a back surface via an insulating base. A land disposed on the surface for mounting the electronic circuit element, a ground pattern extending to an inner portion of the electronic circuit element, and a main power source of a backbone disposed on the front surface or the back surface. A pattern, a power supply branch pattern that is branched from the main power supply pattern, extends to an inner portion of the electronic circuit element, and is connected to the land through a through hole, and is arranged in the vicinity of the power supply branch pattern. The inductance formed between the power supply branch pattern and the main power supply pattern is greater than the inductance formed between the bypass capacitor and Printed circuit board, characterized by comprising an inductance pattern formed so as to hear the. 7. The printed circuit board according to claim 6, wherein the inductance pattern is formed in a shape including a meandering inductance pattern shape, a spiral shape, and a coil shape. 8. A printed circuit board for mounting an electronic circuit element having a plurality of lead pins in four directions on a two-layer printed wiring board having a printed circuit pattern formed on a front surface and a back surface via an insulating base. Lands arranged on the front surface for mounting the electronic circuit element, a ground pattern extending to an inner portion of the electronic circuit element, and arranged on the back surface in parallel with upper and lower rows of the lands. And two main power supply patterns serving as the main bases, each of which is branched from the main power supply pattern and extends to an inner portion of the electronic circuit element, and is formed on a part of the four pieces of the land through a through hole. The power supply branching pattern is more effective than the inductance formed between the connected power supply branching pattern and the bypass capacitor arranged near the power supply branching pattern. Printed circuit board, characterized by comprising, an inductance pattern meandering formed so inductance increases formed between the serial main power supply pattern. 9. A printed circuit board for mounting an electronic circuit element having a plurality of lead pins in four directions on a two-layer printed wiring board having a printed circuit pattern formed on a front surface and a back surface via an insulating base. A land disposed on the front surface for mounting the electronic circuit element, a ground pattern extending to an inner portion of the electronic circuit element, and a backbone power source pattern serving as a backbone disposed on the back surface, The main power source pattern is formed through an inductance pattern that is formed in a meandering shape on the front surface through the through hole to the inside portion of the electronic circuit element, and is further extended to the back surface through the through hole to extend to the back surface of the land. A power supply branch pattern connected to a part of the four pieces, and a bypass capacitor arranged in the vicinity of the power supply branch pattern. Than the inductance to be formed, printed circuit board, characterized in that the inductance is formed between said main power supply pattern and the power branch pattern is made larger. 10. In the land, a signal lead pin mounting land for outputting a clock signal having a repetitive periodicity and a bypass arranged closest to a power supply lead pin mounting land closest to the input signal lead pin mounting land. The printed circuit board according to claim 9 or 10, wherein the inductance pattern is formed so as to have an inductance larger than that formed between the capacitors. 11. An electronic device comprising a printed circuit board for mounting an electronic circuit element having a plurality of lead elements in four directions on a two-layer printed wiring board having a printed circuit pattern formed on a front surface and a back surface via an insulating base. A device, which is a land disposed on the front surface for mounting the electronic circuit element, a ground pattern extending to an inner portion of the electronic circuit element, and a backbone of a backbone disposed on the back surface. A power supply pattern, a power supply branch pattern that is branched from the main power supply pattern, extends to an inner portion of the electronic circuit element, and is connected to a part of the land through a through hole, and the vicinity of the power supply branch pattern The inductance formed between the power supply branch pattern and the main power supply pattern, rather than the inductance formed between the bypass capacitor arranged in Electronic apparatus including the printed circuit board, characterized by comprising an inductance pattern formed so chest is increased, the. 12. The electronic device having a printed circuit board according to claim 11, wherein the inductance pattern is formed in a shape including a meandering inductance pattern shape, a spiral shape, and a coil shape. 13. An electronic device comprising a printed circuit board for mounting an electronic circuit element having a plurality of lead pins in four directions on a two-layer printed wiring board having a printed circuit pattern formed on the front surface and the back surface via an insulating base. A land disposed on the front surface for mounting the electronic circuit element, a ground pattern extending to an inner portion of the electronic circuit element, and an upper and lower row of the land on the back surface. Two basic power supply patterns that are arranged in parallel and serve as the main power supply patterns, branch from the basic power supply pattern, extend to the inside of the electronic circuit element, and have four pieces of the land through through holes. The inductance formed between the power supply branch pattern connected to a part of the power supply branch pattern and the bypass capacitor arranged in the vicinity of the power supply branch pattern, Electronic apparatus including the printed circuit board, characterized by comprising, an inductance pattern meandering formed so inductance increases formed between the source branch patterns and said main power supply pattern. 14. An electronic device comprising a printed circuit board for mounting an electronic circuit element having a plurality of lead pins in four directions on a two-layer printed wiring board having a printed circuit pattern formed on a front surface and a back surface via an insulating base. A land disposed on the front surface for mounting the electronic circuit element, a ground pattern extending to an inner portion of the electronic circuit element, and a backbone serving as a backbone disposed on the back surface. A power supply pattern, an inductance pattern formed from the main power supply pattern through the through hole to the inside of the electronic circuit element on the front surface through a through hole, and further extending to the back surface through the through hole. And a power supply branch pattern connected to a part of the four pieces of the land, and a bypass disposed near the power supply branch pattern. Than the inductance formed between the capacitor, an electronic apparatus comprising a printed circuit board, characterized in that the inductance is formed between said main power supply pattern and the power branch pattern is made larger. 15. In the land, a signal lead pin mounting land for outputting a clock signal having a repetitive periodicity, and a bypass arranged closest to a power supply lead pin mounting land closest to a lead pin mounting land for an input signal. The electronic device comprising the printed circuit board according to claim 13 or 14, wherein the inductance pattern is formed so as to have a larger inductance than the inductance formed between the capacitors.