JPH0946224A - Synchronous control oscillation device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve a demodulation characteristic in a demodulation device avoiding pseudo-synchronism, substantially enlarging a pull-in range and using the carrier signal of the processing in accordance with the input-signal frequency of a wide range. SOLUTION: A search waveform oscillator 8 always operates and self-drives/ oscillates the search waveform signal S1 of a triangular wave for pull-in. A switch is turned on at every detection signal showing the occurrence of step-out and the search waveform signal is impressed on the voltage control terminal of VCO7. The search waveform signal becomes a state where it is self-driven to a low waveform from a high waveform or to a state that it is self-driven to the high waveform from the low waveform. When a pseudo-synchronous point does not exist, PLL2 executes a normal pull-in operation. When pseudo- synchronization is executed by the search waveform signal which is self-driven to the high waveform from the low waveform, the switch is turned on by the detection signal after step-out. When the search waveform signal which is self- driven to the low waveform from the high waveform is outputted, VCO7 performs the normal pull-in operation.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention is used in a demodulator of a digital microwave communication device of a quadrature amplitude modulation system that demodulates a baseband signal by synchronizing a carrier wave in a Costas loop, and avoids pseudo pull-in (pseudo synchronization). The present invention relates to a synchronous control oscillator that outputs a frequency-locked carrier signal.

[0002]

2. Description of the Related Art FIG. 4 is a block diagram showing a schematic configuration of a demodulation device using such a synchronous control oscillator. In FIG. 4, this example shows 4 QPSK (4 Quadrature Phase S
The transmission signal of “hift keying” is input to a multiplier (not shown) in the demodulation unit 1. PLL (Phase Locked Lo)
op) Input the carrier signal from 2 through the phase shifter,
I, Q demodulation The baseband signal is demodulated. PLL
2, the phase comparator 4, the loop filter 5, the adder 6, and the voltage controlled oscillator (VCO) 7 perform closed loop control based on the phase error from the demodulation unit 1 to pull the free-running frequency to a constant frequency and lock this lock. The oscillation signal of the frequency is supplied to the demodulation unit 1.

A search waveform oscillator 8 is provided to widen the pull-in range (Pull in Range) and to cope with the frequency fluctuation of the input signal. This search waveform oscillator 8 adds the search waveform signal to the error signal that has passed through the phase comparator 4 of the PLL 2 and the loop filter 5 by the adder 6,
It is applied to the voltage control terminal of the VCO 7.

FIG. 5 is a circuit diagram showing a configuration example of the search waveform oscillator 8, and FIGS. 6 (a) and 6 (b) are diagrams for explaining the pull-in state. 5 and 6A and 6B, the search waveform oscillator 8 is composed of an operational amplifier 8a, resistors R1, R2, R3, and a capacitor C. For example, a detection signal from the loop filter 5 indicating a loss of synchronism. When the switch SW is turned on, the triangular search waveform signal Sa self-runs and oscillates, and this search waveform signal Sa is applied to the voltage control terminal of the VCO 7 through the adder 6. Due to the configuration of this circuit, the search waveform signal Sa has a waveform higher than the zero potential (hereinafter referred to as a high waveform) at the start of operation, for example, when the power is turned on, as shown in FIGS. ) To a waveform at a level lower than zero potential (hereinafter,
It is self-propelled and oscillates. Or
It oscillates by self-running only from a low waveform to a high waveform.

Therefore, as shown in FIG.
When the input frequency is high and the pseudo synchronization point (frequency) is low with respect to the lock frequency of the free-running oscillation frequency of CO7, and when the search waveform signal Sa oscillates by free-running from a high waveform to a low waveform, Pseudo-synchronize with the low waveform. On the contrary, as shown in FIG. 6B, when the input frequency is low and the pseudo synchronization point (frequency) is high with respect to the free-running oscillation frequency (lock frequency) of the VCO 7, the search waveform signal Sa is high. When the waveform oscillates from the waveform to the low waveform by self-oscillation, pseudo synchronization occurs at the high waveform.

Such pseudo-synchronization is performed by the transmission signal (4QP
SK signal) has an input frequency f0, and this input frequency f
The transmission clock signal frequency of 0 is fc (n = 1, 2, 3
…) In case of f0 ± n / 4 · fc different from carrier frequency
It is known that pseudo pull-in occurs at the frequency of. In particular, when the transmission capacity is small, for example, when fc <4 MHz, the pseudo pull-in point becomes ± 1 MHz or less, and this pseudo sync point tends to occur close to the lock frequency.

For this reason, a configuration is used in which the Costas loop characteristic is set in a range in which pseudo synchronization hardly occurs.
With this configuration, the pull-in range (lock range) becomes narrow. Also, there is a configuration example in which the occurrence of pseudo synchronization is detected and the operation is canceled. For example, A (not shown) in the demodulation unit 1
The fact that the value between the signal points of the demodulated baseband signal in the / D converter becomes larger than the normal value is used to detect the pseudo pull-in and cancel the pseudo synchronization by the signal that detected the overflow or underflow of the sampling. There is. Or P
LL2 itself detects the occurrence of pseudo synchronization and cancels the pseudo synchronization.

[0008]

As described above, in the above-mentioned conventional synchronous control oscillator, when the transmission capacity is small,
The pseudo pull-in point tends to occur close to the lock frequency,
The pull-in range becomes narrow, it is difficult to cope with the frequency fluctuation of the input signal, and the pull-in characteristic deteriorates. In other words, there is a drawback in that the demodulation characteristics of the demodulation device and the like deteriorate.

The present invention solves the problems in the prior art as described above, and in the case where the transmission capacity is small and the pseudo pull-in point easily occurs close to the lock frequency,
Providing a synchronous control oscillator that avoids the pseudo-synchronization and can substantially expand the pull-in range, and that corresponds to a wide range of input signal frequencies and improves the demodulation characteristics in a demodulator that uses the carrier signal of this processing With the goal.

[0010]

In order to achieve the above object, a synchronous control oscillator according to a first aspect of the present invention includes a voltage control oscillator that oscillates a carrier wave, and performs a pseudo sync and a pseudo sync release operation. At the same time, a PLL circuit that outputs an out-of-synchronization detection signal, a search waveform oscillating means that constantly oscillates a triangular wave signal for the voltage controlled oscillator to pull in the lock frequency, and a triangular wave from the search waveform oscillating means according to the detection signal that the PLL circuit outputs. And a switching means for outputting a signal to the voltage controlled oscillator, and when the PLL circuit is pseudo-synchronized with the triangular wave signal output by the switching means, cancels the pseudo-synchronization and outputs the detection signal to the switching means, and again. The triangular wave signal is output to the voltage controlled oscillator.

According to another aspect of the present invention, there is provided a synchronous control oscillating device including a voltage controlled oscillator for oscillating a carrier wave, which performs pseudo-synchronization and pseudo-synchronization canceling operation, and outputs a loss-of-synchronization detection signal, and an input control signal. A first search waveform oscillating unit that oscillates a triangular wave signal that is free-running from a waveform having a level higher than zero potential to a waveform having a lower level, and is free-running from a waveform having a level lower than zero potential to a higher level waveform by an input control signal. Second search waveform oscillating means for oscillating a triangular wave signal, and switching setting means for alternately outputting a control signal to the first and second search waveform oscillating means each time a detection signal output by the PLL circuit is input. When the PLL circuit is pseudo-synchronized with the triangular wave signal output from the first or second search waveform oscillating means, the pseudo-synchronization is canceled and the detection signal is switched and set. And it outputs the switching setting means outputs a control signal to the first or second search wave oscillating means opposite to the first or second search wave oscillation means outputs the previous triangular wave signals.

According to a third aspect of the present invention, the synchronous control oscillating device supplies the carrier wave signal output from the PLL circuit to the demodulating device.

According to a fourth aspect of the present invention, in the synchronous control oscillating device, a signal for canceling pseudo-synchronization is sent from the demodulating device which performs demodulation processing with a carrier signal output from the PLL circuit.
The circuit receives the out-of-sync detection signal from the demodulator.

According to a fifth aspect of the present invention, in the synchronous control oscillating device, the switching setting means includes a flip-flop circuit whose output level is inverted every time a high-level detection signal is input, a high-level detection signal and a flip-flop circuit. An AND gate circuit that alternately outputs the control signal to the first and second search waveform oscillating means for each input of the detection signal by the high level signal or the low level signal to be output is provided.

According to the synchronous control oscillator of the present invention having the above-mentioned structure, when the pseudo-synchronization is performed with the triangular wave signal,
This pseudo-synchronization is cancelled, and an out-of-synchronization detection signal is output to the switching means, and again, the self-running from a waveform with a level higher than zero potential to a waveform with a lower level or with the opposite waveform The triangular wave signal for is output to the voltage controlled oscillator.

Therefore, after canceling the pseudo synchronization, the previous triangular wave signal is, for example, a waveform of a level higher than zero potential to a waveform of a lower level, and if the current triangular wave signal is the opposite, the current pull-in Pseudo-sync will not occur. In this case, if the transmission capacity is small and the pseudo pull-in point is likely to occur close to the lock frequency, avoiding the pseudo-synchronization, the pull-in range is substantially expanded, and it is possible to handle a wide range of input signal frequencies. Become.

Further, in the synchronous controlled oscillator according to the present invention, the PLL circuit is pseudo-synchronized with the triangular wave signal for pull-in output from one of the first or second search waveform oscillating means. At this time, the pseudo synchronization is canceled. Then, the control signal is output to the first or second search waveform oscillating means opposite to the first or second search waveform oscillating means that previously output the triangular wave signal by the out-of-sync detection signal. That is, for each detection signal input, a triangular wave signal that oscillates by self-running from a waveform of a level higher than zero potential to a waveform of a low level,
The opposite triangular wave signal for pulling in is alternately output to the voltage controlled oscillator.

Therefore, the triangular wave signal is output from the zero potential in the opposite waveform (high waveform or low waveform) every time the synchronization is lost, so that the pseudo synchronization can be surely avoided. Also in this case, when the transmission capacity is small and the pseudo pull-in point is likely to occur near the lock frequency, avoiding the pseudo-synchronization, the pull-in range is substantially expanded so that the input signal frequency in a wide range can be dealt with. Become.

[0019]

BEST MODE FOR CARRYING OUT THE INVENTION Next, an embodiment of a synchronous controlled oscillator according to the present invention will be described in detail with reference to the drawings. This example
It is provided in place of the search waveform oscillator 8 in the conventional demodulator shown in FIG. 4, and the demodulator shown in FIG.

FIG. 1 is a block diagram showing the configuration of a first embodiment of a search waveform oscillator in a synchronous control oscillator according to the present invention. In FIG. 1, the search waveform oscillator 10 is
This search is turned on by the triangular wave oscillator 10a which is always operating and oscillates by self-oscillating the triangular search waveform signal S1 and a detection signal indicating the loss of synchronization from the loop filter 5 in the PLL 2 shown in FIG. It has a switch 10b such as a relay switch for applying the waveform signal S1 to the voltage control terminal of the VCO 7 through the adder 6 in the demodulation unit 1 in FIG.

Next, the operation of the first embodiment will be described. FIG. 2 is a diagram for explaining the pull-in operation of the first embodiment. 1 and 2, the triangular wave oscillator 1
0a indicates that the search waveform signal S of a triangular wave is always operating and is a triangular wave.
1 is self-oscillating. Here, when a detection signal indicating the occurrence of out-of-sync is input to the search waveform oscillator 10, the switch 10b is turned on by the detection signal. This switch 1
The search waveform signal S1 output from the triangular wave oscillator 10a through 0b passes through the adder 6 in the demodulation unit 1 in FIG.
It is applied to the voltage control terminal of O7.

In this case, when the search waveform signal S1 is output when the switch 10b is turned on, the search waveform signal S1 output from the switch 10b has a level higher than the zero potential as shown by the solid line in FIG. It is either in a state of free-running to a waveform having a level lower than zero potential, or in a state of free-running from a waveform lower than zero potential to a waveform higher than zero potential, as shown by a dotted line in FIG.

Here, as shown in FIG. 2, when the input frequency is high and the pseudo sync point (frequency) is low with respect to the lock frequency of the VCO 7, if the search waveform signal S1 self-runs from a high waveform to a low waveform. Since there is no pseudo sync point in this period, the PLL 2 performs a normal pull-in operation. Also,
When the search waveform signal S1 self-runs from a low waveform to a high waveform, there is a pseudo sync point between them and pseudo sync occurs.

When the pseudo-synchronization is performed here, for example, the inter-signal-point value of the demodulated baseband signal in the A / D converter (not shown) in the demodulation unit 1 becomes larger than the normal value due to the pseudo-synchronization, and the sampling overflow occurs. The pseudo sync signal which has detected the underflow is input to the VCO 7 of the PLL 2 to remove the pseudo sync. Then, the search operation in synchronization with the lock frequency of the free-running oscillation frequency of the VCO 7 is started again. by this,
A detection signal indicating out-of-synchronization is input to the switch 10b of the search waveform oscillator 10 and turned on, and the triangular wave oscillator 1
The search waveform signal S1 output by 0a is derived.

At this time, if the search waveform signal S1 is free-running from a high waveform to a low waveform, there is no pseudo sync point between them, so that the search waveform signal S1 operates normally and synchronizes with the lock frequency of the VCO 7. . In addition, when the input frequency is low and the pseudo synchronization point (frequency) is high with respect to the lock frequency of the VCO 7, the same operation is performed and the pseudo synchronization point can be avoided. Therefore, when the transmission capacity is small and the pseudo pull-in point is likely to occur near the lock frequency,
The pull-in range (lock range) is substantially expanded,
It becomes possible to cope with a wide range of input signal frequencies.

FIG. 3 is a block diagram showing the configuration of the second embodiment. In FIG. 3, the search waveform oscillator 20 of this example is shown.
Is a search waveform signal S11 of a triangular wave that oscillates by free running from a high waveform to a low waveform when the control signal Ca is input.
Is provided to the voltage control terminal of the VCO 7 through the adder 6 in the demodulation unit 1 in FIG.

Further, when the control signal Cb is input, a triangular wave oscillator 20b that outputs a triangular waveform search waveform signal S12 that oscillates by self-running from a low waveform to a high waveform, and a loop in the PLL 2 shown in FIG. 4, for example. When a high (H) level detection signal indicating out-of-synchronization from the filter 5 is input, an H level signal is sent from the output terminal, and a low (L) level signal is output from the inverted output terminal with the next detection signal. A flip-flop (F / F) circuit 20c is provided.

Further, the AND gate 20 which sends out the control signal Cb for causing the triangular wave oscillator 20b to oscillate according to the H level detection signal and the H level from the F / F circuit 20c.
There is provided an AND gate 20e which sends out a control signal Ca for causing the triangular wave oscillator 20a to oscillate by d, the next H level detection signal, and the L level signal from the F / F circuit 20c.

Next, the operation of the first embodiment will be described. In FIG. 3, the H-level detection signal indicating the occurrence of out-of-sync is an input terminal (data terminal) of the F / F circuit 20c.
Input to the AND gates 20d and 20e, the H level signal is output from the output terminal. An H level detection signal is also input to the AND gate 20d at the same time, and a control signal Cb is output from the AND gate 20d to the triangular wave oscillator 20b. The triangular wave oscillator 20b outputs a search waveform signal S11 of a triangular wave that oscillates by self-running from a high waveform to a low waveform by the control signal to the voltage control terminal of the VCO 7 through the adder 6 in the demodulation unit 1 in FIG.

According to the search waveform signal S11, when there is no pseudo synchronization, the normal pull-in operation is performed as described in the first embodiment, and when there is pseudo synchronization, the pseudo synchronization signal is used to remove the pseudo synchronization. I have to. Then, the detection signal indicating the loss of synchronization is input again to the search waveform oscillator 20.

The H-level detection signal indicating the occurrence of the out-of-synchronization is input to the input terminal of the F / F circuit 20c, and the L-level signal is input from the inverting output terminal to the AND gates 20d and 20e.
Then, the AND gate 20e outputs the control signal Ca to the triangular wave oscillator 20a. The triangular wave oscillator 20a outputs a search waveform signal S12 of a triangular wave that oscillates by self-running from a low waveform to a high waveform by the control signal Ca.

As described above, the triangular wave oscillators 20a and 20b operate for each input of the detection signal, and the triangular-shaped search waveform signals S11 and S12, which are free-running from a high waveform to a low waveform or from a low waveform to a high waveform, alternate. Is output. Also in this case, similarly to the first embodiment, the pseudo sync point is avoided, the normal operation is performed and the lock frequency of the VCO 7 is synchronized, the frequency fluctuation of the input signal can be dealt with, and the pull-in range is substantially expanded. It will be.

[0033]

As is apparent from the above description, according to the synchronous control oscillator of the first, third and fourth aspects, when the pseudo-synchronization is performed, the waveform of the level higher than the zero potential is changed again to the low level. A triangular wave signal that is free-running in a waveform or free-running in the opposite waveform is output to the voltage controlled oscillator. That is, when the triangular wave signal of this time is opposite from the waveform of the level higher than the previous zero potential which is pseudo-synchronized to the waveform of the low level, the pseudo synchronization is not performed this time. Therefore, when the transmission capacity is small and the pseudo pull-in point is likely to occur near the lock frequency, the pull-in range is substantially expanded while avoiding the pseudo synchronization. As a result, it is possible to cope with a wide range of input signal frequencies, and it is possible to improve the demodulation characteristics in a demodulator or the like that uses the carrier signal of this processing.

According to another aspect of the synchronous control oscillator of the present invention, the first or second search that previously output the triangular wave signal when the PLL circuit is pseudo-synchronized by the pull-in operation. A triangular wave signal for pulling in is output from the first or second search waveform oscillating means opposite to the waveform oscillating means.
That is, a triangular wave signal that self-oscillates from a waveform with a level higher than the zero potential to a waveform with a lower level and the opposite triangular wave signal are alternately output for each detection signal input. Will be output from the zero potential in the opposite waveform (high or low waveform), and it becomes possible to reliably avoid pseudo synchronization.
Also in this case, when the transmission capacity is small and the pseudo pull-in point is likely to occur near the lock frequency, the pseudo-synchronization is avoided, the pull-in range is substantially expanded, and a wide range of input signal frequencies can be accommodated. A demodulation device or the like that uses a carrier signal in processing has the effect of improving its demodulation characteristics.

[Brief description of drawings]

FIG. 1 is a block diagram showing the configuration of a first embodiment of a search waveform oscillator in a synchronous control oscillator of the present invention.

FIG. 2 is a diagram for explaining a pull-in operation of the first embodiment.

FIG. 3 is a block diagram showing a configuration of a second embodiment.

FIG. 4 is a block diagram showing a schematic configuration of a demodulator using a synchronous control oscillator in a conventional example.

5 is a circuit diagram showing a configuration example of the search waveform oscillator in FIG.

FIG. 6 is a diagram for explaining a conventional retracted state. In (a), the input frequency is higher than the lock frequency,
In addition, the pull-in state is shown when the pseudo sync point is low. In (b), the input frequency is lower than the lock frequency,
Moreover, the pull-in state is shown when the pseudo sync point is high.

[Explanation of symbols]

 1 Demodulator 2 PLL 5 Loop Filter 6 Adder 7 VCO 10 Search Waveform Oscillator 10a Triangle Wave Oscillator 10b Switch 20 Search Waveform Oscillator 20a, 20b Triangle Wave Oscillator 20c F / F Circuit 20d, 20e AND Gate Ca, Cb Control Signal S1 Search Waveform Signal S11, S12 Search waveform signal

Claims (5)

[Claims] 1. A voltage controlled oscillator for oscillating a carrier wave is provided, which performs pseudo-synchronization and pseudo-synchronization canceling operation,
A PLL circuit that outputs an out-of-synchronization detection signal, a search waveform oscillating unit that constantly oscillates a triangular wave signal for the voltage controlled oscillator to pull in the lock frequency, and a triangular wave from the search waveform oscillating unit according to the detection signal that the PLL circuit outputs. And a switching means for outputting a signal to the voltage controlled oscillator, when the PLL circuit is pseudo-synchronized with the triangular wave signal output by the switching means, cancels the pseudo-synchronization and outputs a detection signal to the switching means, The synchronous controlled oscillator, wherein the triangular wave signal is output to the voltage controlled oscillator again. 2. A voltage controlled oscillator for oscillating a carrier wave is provided, which performs pseudo synchronization and pseudo synchronization release operation, and
A PLL circuit that outputs an out-of-synchronization detection signal, a first search waveform oscillating unit that oscillates a triangular wave signal that is free-running from a waveform having a level higher than zero potential to a waveform having a lower level by an input control signal, and a zero input control signal Second search waveform oscillating means for oscillating a triangular wave signal free-running from a waveform having a level lower than the potential to a waveform having a higher level, and the first and second search waveform oscillating means each time a detection signal output from the PLL circuit is input. Switching setting means for alternately outputting a control signal to the search waveform oscillating means, and when the PLL circuit is pseudo synchronized with the triangular wave signal output by the first or second search waveform oscillating means, this pseudo synchronization And a detection signal is output to the switching setting means, and the switching setting means outputs the triangular wave signal last time.
Alternatively, a synchronous control oscillation device which outputs a control signal to a first or second search waveform oscillating means opposite to the second search waveform oscillating means. 3. The synchronous controlled oscillator according to claim 1, wherein the carrier wave signal output from the PLL circuit is supplied to a demodulator. 4. A signal for canceling pseudo-synchronization is input to a PLL circuit from a demodulator that performs demodulation processing using a carrier signal output from the PLL circuit, and an out-of-sync detection signal is output from the demodulator. 3. The synchronous controlled oscillator according to claim 1 or 2, wherein. 5. The switching setting means includes a flip-flop circuit whose output level is inverted every time a high-level detection signal is input, and a high-level signal or a low-level signal output from the high-level detection signal and the flip-flop circuit. 3. The synchronous controlled oscillator according to claim 2, further comprising an AND gate circuit which alternately outputs the control signals to the first and second search waveform oscillating means each time a detection signal is input.