JPH0936323A - Manufacture of semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To restrain the etching of an element isolation oxide film or the like, and improve element characteristics, by eliminating an insulating film containing impurities by using heated hydrogen fluoride water vapor. SOLUTION: An element isolation oxide film 11, and a thermal oxidation layer 2 and a nitride film 3 which are used as etching protection films when a trench is formed are formed on a substrate 1. The trench has an aperture in the boundary part between the element isolation oxide film 11 and the oxide film 2 on an element region. A PSG film 6 of an SiO2 film containing phosphorus is deposited. Resist is spread on the PSG film 6, and exposure is performed without interposing a pattern mask. Resist having a specified depth is left in the trench, and the exposed part of the PSG film 6 is eliminated. After the resist is eliminated, an oxide film 8 is formed. By the heat treatment in an N2 atmospher, phosphorus is diffused in the substrate 1 from the PSG film 6 left in the trench, and a diffusion layer 9 is formed. Further by V-HF treatment, the PSG film is eliminated, and a desired impurity diffusion layer 9 is formed on the inner wall of the trench.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for selectively performing impurity diffusion.

[0002]

2. Description of the Related Art As semiconductor devices become highly integrated, DRAM
A memory device such as (Dynamic Random Access Memory) needs to realize a small cell area. For this reason,
In order to secure the memory capacity, the capacitor area is increased by forming the capacitor inside the groove formed in the semiconductor substrate. This capacitor is composed of, for example, an impurity diffusion layer formed on the inner wall of the groove, an insulating film formed on the inner wall of the groove, and a polycrystalline silicon film embedded inside the groove. Therefore, in order to form a capacitor having such a structure, it is necessary to diffuse desired impurities into the inner wall of the groove with good controllability.

A conventional method of diffusing impurities on the inner wall of the groove will be described with reference to FIGS. A groove 10 having a depth of 9 μm, for example, is formed in the Si substrate 1 by using the lithography method and the anisotropic etching technique. On the substrate 1, an oxide film 11 for element isolation, a thermal oxide film (SiO2) 2 having a film thickness of, for example, 50 nm or less, and a film thickness of 100 to 400 nm are used as an etching protection film when forming the groove 10.
In this example, the trench 10 is opened at the boundary between the element isolation oxide film 11 and the oxide film 2 on the element region, as shown in FIG.

Thereafter, a SiO ₂ film containing phosphorus (P) of 10 ²¹ to 10 ²² cm ^-3 (hereinafter referred to as P) is formed by a low pressure CVD method.
6) is deposited, and a lithographic method is used to
A resist 7 is applied on the PSG film 6 and exposed without passing through a pattern mask to form the resist 7 on the nitride film 3 and the groove 1.
0 to 1 μm from the surface of the substrate 1 in the resist 7 inside
To a depth of 10 to leave the resist 7 inside the groove 10 (FIG. 6).

The exposed portion of the PSG film 6 is removed by NH ₄ F etching. After removing the resist 7, an oxide film 8 is formed to a thickness of 10 nm. Then, heat treatment is performed in an N ₂ atmosphere at a temperature of 800 ° C. to form the groove 10
Phosphorus is diffused from the PSG film 6 left inside the substrate into the substrate 1 to form a diffusion layer 9 (FIG. 7).

[0006] Further, by NH ₄ F etching, PS
The G film 6 is removed, and the desired impurity diffusion layer 9 is formed on the side surface of the groove 10.
The formed structure of is completed (FIG. 8). However, in such a method of forming the impurity diffusion layer, NH ₄ F etching for removing the PSG film 6 also causes various problems because the thermal oxide film is also etched. That is, groove 1
Since 0 is opened so as to overlap the element isolation region,
As shown in FIG. 3, the element isolation oxide film 11 is etched and recedes from the exposed side surface portion, which causes deterioration of the element isolation withstand voltage. Similarly, the oxide film 2 is also etched and recedes. For example, when the diffusion layer is formed by ion-implanting through the oxide film thereafter, impurities are deeply implanted in the recessed portion of the oxide film 2, so that the diffusion layer is deeply diffused and the diffusion layer 9 is formed. There is a possibility that it will be conducted with.

[0007]

As described above, in the conventional method of manufacturing a semiconductor device, when the PSG film deposited for diffusing impurities into the inner wall of the groove is removed, there is no selectivity with respect to the thermal oxide film. Since the etching method is used, an oxide film such as an element isolation oxide film is etched together, which causes a problem that element characteristics are deteriorated.

An object of the present invention is to provide a method of manufacturing a semiconductor device which can suppress the etching of an element isolation oxide film or the like and improve element characteristics in a method of selectively diffusing impurities. .

[0009]

Means for solving the above problems and achieving the object are to use an insulating film containing impurities by using heated hydrogen fluoride vapor instead of the conventionally used NH ₄ F etching. Is to be removed.

That is, in the method of manufacturing a semiconductor device according to the present invention, a step of forming a groove in a semiconductor substrate, a step of depositing an insulating film containing a desired impurity on the groove and the semiconductor substrate, and a step of forming the groove Forming a protective film on the insulating film inside, removing the insulating film in a portion not covered with the protective film by performing treatment in steam of hydrogen fluoride at 30 ° C. or higher, and the protective film And a step of diffusing the impurities in the insulating film into the semiconductor substrate by heat treatment at 800 ° C. or higher,
The protective film has etching resistance against the hydrogen fluoride steam treatment.

[0011]

BEST MODE FOR CARRYING OUT THE INVENTION As shown in the above means, in the method of manufacturing a semiconductor device according to the present invention, a treatment in steam of hydrogen fluoride at 30 ° C. or higher is performed to remove the insulating film. Since this treatment has a property of etching the insulating film containing impurities and hardly etching the thermal oxide film, it is possible to prevent the element isolation oxide film from being etched by this treatment.

Hereinafter, embodiments of the present invention will be described with reference to the drawings. 1 to 4 show a method of forming an impurity diffusion layer according to the present invention. Using the same method as before, S
A groove 10 having a depth of 9 μm, for example, is formed in the i substrate 1. On the substrate 1, an element isolation oxide film 11, a thermal oxide film (SiO2) 2 having a film thickness of, for example, 50 nm or less as an etching protection film when forming the groove 10, and, for example, low pressure CVD
A nitride film (SiN) 3 having a film thickness of 100 to 400 nm formed by the method is formed. In this example, the trench 10 includes an element isolation oxide film 11 and an oxide film 2 on the element region as shown in FIG. It is opened at the boundary.

Further, as in the prior art, Si containing 10 ²¹ to 10 ²² cm ^{-3 of} phosphorus (P), for example, is formed by the low pressure CVD method.
An O ₂ film (PSG film) 6 is deposited. After that, a resist 7 is applied on the PSG film 6 by a lithography method and exposed without using a pattern mask to remove the resist 7 on the nitride film 3 and the resist 7 inside the groove 10. Of this, the resist 7 is removed from the surface of the substrate 1 to a depth of 1 to 8 μm to leave the resist 7 inside the groove 10 (FIG. 2).

After this, unlike the conventional etching using NH ₄ F, a treatment is carried out in steam of hydrogen fluoride heated to 80 ° C. (hereinafter referred to as V-HF treatment) to obtain PS.
The exposed portion of the G film 6 is removed.

Thereafter, after removing the resist 7 as in the conventional case, an oxide film 8 is formed to a thickness of 10 nm, and the temperature is set to 800, for example.
A heat treatment is performed in a N ₂ atmosphere at a temperature of 0 ° C. to diffuse phosphorus from the PSG film 6 left inside the groove 10 into the substrate 1 to form a diffusion layer 9 (FIG. 3).

Further, unlike the conventional etching using NH ₄ F, the PSG film 6 is removed by V-HF treatment, and the structure in which the desired impurity diffusion layer 9 is formed on the inner wall of the groove 10 is completed ( Figure 5).

As described above, according to the embodiment of the present invention, in order to remove the PSG film, unlike the conventional etching with NH ₄ F, for example, V-H heated to 80 ° C. is used.
Perform processing in F. PS by this V-HF treatment
The etching rate of G is 400 nm / min, whereas the etching rate of the thermal oxide film is only 0.1 n.
There is only m / minute. Therefore, it is possible to prevent the element isolation oxide film and the like from being etched, unlike the conventional etching with NH ₄ F, which has no difference in the etching rate for the PSG and the thermal oxide film.

The selectivity of the etching rate by the treatment in V-HF (PSG etching rate with respect to the thermal oxide film etching rate) can be obtained at 30 ° C. or higher and increases with temperature. However, a selection ratio of 4000 is obtained at 80 ° C. as described above. The selection ratio saturates at higher temperatures. Further, especially at a temperature of 800 ° C. or higher, crystal defects of the substrate 1 due to the stress of the nitride film 3 may occur, or the diffusion layer 9 may excessively diffuse to deteriorate the element isolation breakdown voltage. It is not preferable to perform such high temperature treatment.

[0019]

As described above, according to the method for manufacturing a semiconductor device of the present invention, in the method of selectively diffusing impurities, it is possible to suppress the etching of the element isolation oxide film and improve the element characteristics. You can

[Brief description of drawings]

FIG. 1 is a diagram showing a method for manufacturing a semiconductor device according to the present invention.

FIG. 2 is a diagram showing a method for manufacturing a semiconductor device according to the present invention.

FIG. 3 is a diagram showing a method for manufacturing a semiconductor device according to the present invention.

FIG. 4 is a diagram showing a method for manufacturing a semiconductor device according to the present invention.

FIG. 5 is a diagram showing a conventional method for manufacturing a semiconductor device.

FIG. 6 is a diagram showing a conventional method for manufacturing a semiconductor device.

FIG. 7 is a diagram showing a conventional method for manufacturing a semiconductor device.

FIG. 8 is a diagram showing a conventional method for manufacturing a semiconductor device.

[Explanation of symbols]

1 ... Si substrate, 2, 8, 11 ... Oxide film, 3 ... Nitride film, 6
... PSG film, 7 ... resist, 9 ... diffusion layer, 10 ... groove

Claims (3)

[Claims] 1. A step of forming a groove in a semiconductor substrate, a step of depositing an insulating film containing a desired impurity on the groove and the semiconductor substrate, and a protective film on the insulating film inside the groove. A step of forming, a step of removing the insulating film in a portion not covered with the protective film by performing a treatment in steam of hydrogen fluoride at 30 ° C. or higher, a step of removing the protective film, and a temperature of 800 ° C. or higher. A step of diffusing the impurities in the insulating film into the semiconductor substrate by heat treatment, wherein the protective film has etching resistance to the hydrogen fluoride steam treatment. . 2. A step of forming a groove in a semiconductor substrate, a step of depositing an insulating film containing a desired impurity on the groove and the semiconductor substrate, and a protective film on the insulating film inside the groove. A step of forming, a step of removing the insulating film in a portion not covered with the protective film by performing a treatment in steam of hydrogen fluoride at 30 ° C. or higher, a step of removing the protective film, and a temperature of 800 ° C. or higher. Diffusing the impurities in the insulating film into the semiconductor substrate by heat treatment;
And a step of removing the insulating film by performing a treatment in hydrogen fluoride vapor at 0 ° C. or higher, wherein the protective film has etching resistance against the hydrogen fluoride vapor treatment. Production method. 3. The method according to claim 1, wherein the impurities are one or more elements selected from a group of group III and group V elements of the periodic table, and the insulating film is an oxide film. A method for manufacturing a semiconductor device as described above.