JPH09322407A - Control method for reactive power compensator - Google Patents

Control method for reactive power compensator

Info

Publication number
JPH09322407A
JPH09322407A JP8132279A JP13227996A JPH09322407A JP H09322407 A JPH09322407 A JP H09322407A JP 8132279 A JP8132279 A JP 8132279A JP 13227996 A JP13227996 A JP 13227996A JP H09322407 A JPH09322407 A JP H09322407A
Authority
JP
Japan
Prior art keywords
voltage
interconnection point
reactive power
point voltage
control
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP8132279A
Other languages
Japanese (ja)
Inventor
Tomoshi Tada
知史 多田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nissin Electric Co Ltd
Original Assignee
Nissin Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nissin Electric Co Ltd filed Critical Nissin Electric Co Ltd
Priority to JP8132279A priority Critical patent/JPH09322407A/en
Publication of JPH09322407A publication Critical patent/JPH09322407A/en
Withdrawn legal-status Critical Current

Links

Classifications

    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E40/00Technologies for an efficient electrical power generation, transmission or distribution
    • Y02E40/30Reactive power compensation

Landscapes

  • Supply And Distribution Of Alternating Current (AREA)

Abstract

PROBLEM TO BE SOLVED: To restrain the voltage of a link point from going up even if there is an omission of ripple load. SOLUTION: This method is one which automatically adjusts the system voltage VL at the linkage point, in a reactive power compensator 1 where the parallel circuit of a thyristor phase control reactor 2 and an LC filter 3 is connected to a system bus 4 and is linked to the system power 5. This is one which forcibly makes a thyristor phase control reactor 2 fully electrically continuous at the point of time when the system voltage VL gets over the reference voltage VDU, by comparing the system voltage VL at the control linkage point with preset reference voltage VDU.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明の属する技術分野】本発明は無効電力補償装置に
関し、詳しくは、サイリスタ位相制御リアクトルを位相
制御して電力系統における負荷変動に伴う電圧変動を抑
制する無効電力補償装置において、その連系点での系統
電圧を自動調整する制御方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a reactive power compensator, and more particularly, to a reactive power compensator for phase-controlling a thyristor phase control reactor to suppress voltage fluctuations due to load fluctuations in a power system. The present invention relates to a control method for automatically adjusting a system voltage in a vehicle.

【0002】[0002]

【従来の技術】例えば、アーク炉、電鉄負荷、鉄鋼圧延
負荷等の変動負荷を系統電源に接続した電力系統では、
負荷変動に伴う系統電圧の変動を抑制するため、系統電
源と変動負荷との間に、負荷変動による無効電力を補償
する無効電力補償装置(以下、SVCと称す)が設けら
れる。
2. Description of the Related Art For example, in an electric power system in which a variable load such as an electric arc furnace, electric iron load, steel rolling load, etc. is connected to a system power supply,
In order to suppress fluctuations in the system voltage due to load fluctuations, a reactive power compensator (hereinafter referred to as SVC) that compensates reactive power due to load fluctuations is provided between the system power supply and the fluctuating load.

【0003】このSVC1は、図3に示すように可変の
遅相無効電力を生成するサイリスタ位相制御リアクトル
2(以下、TCRと称す)と固定の進相無効電力を生成
するLCフィルタ3との並列回路を系統母線4に接続し
て系統電源5と連系させた構造を有する。尚、図中、6
は一つ又は二つ以上の変動負荷である。
As shown in FIG. 3, the SVC 1 includes a thyristor phase control reactor 2 (hereinafter, referred to as TCR) for generating a variable lagging reactive power and an LC filter 3 for generating a fixed lagging reactive power in parallel. It has a structure in which the circuit is connected to the system bus 4 and is connected to the system power supply 5. In the figure, 6
Is one or more variable loads.

【0004】SVC1を設けた電力系統では、SVC1
におけるTCR2に流れる電流ITを調整することによ
り、そのTCR2に発生する遅相無効電力を負荷変動に
伴う系統電圧VS の変動に応じて増減してその電圧変動
を抑制し、更に、LCフィルタ3に発生する一定の進相
無効電力により、力率を改善しながら系統母線4での電
圧降下を一律に抑制するようにしている。
In a power system provided with SVC1, SVC1
By adjusting the current I T flowing in the TCR2 in the TCR2, the lagging reactive power generated in the TCR2 is increased / decreased in accordance with the change in the system voltage V S accompanying the load change, and the voltage change is suppressed. The constant advance reactive power generated in 3 suppresses the voltage drop in the system bus 4 uniformly while improving the power factor.

【0005】一方、系統母線4にLCフィルタ3を構成
するコンデンサが接続されていると、系統母線4におけ
るSVC1の連系点での系統電圧VL (以下、連系点電
圧と称す)が上昇する現象が発生することがある。そこ
で、従来のSVC1では、連系点電圧VL を一定電圧に
制御するため、以下のような制御方法を採用していた。
On the other hand, when a capacitor constituting the LC filter 3 is connected to the system bus 4, the system voltage V L (hereinafter, referred to as a connection point voltage) at the connection point of the SVC 1 on the system bus 4 rises. The phenomenon may occur. Therefore, in the conventional SVC 1, in order to control the interconnection point voltage V L to a constant voltage, the following control method has been adopted.

【0006】図4の制御ブロックで示すように連系点電
圧VL を変圧器(図示せず)により検出し、その連系点
電圧VL の実効値VD を演算回路7で算出する。一方、
前述のようにして得られた連系点電圧VL の実効値VD
を伝達関数回路8に入力し、その伝達関数の時定数Tを
大きくすることにより、連系点電圧VL の実効値VD
長時間平均値を伝達関数回路8から出力する。
As shown in the control block of FIG. 4, the interconnection point voltage V L is detected by a transformer (not shown), and the effective value V D of the interconnection point voltage V L is calculated by the arithmetic circuit 7. on the other hand,
The effective value V D of the interconnection point voltage V L obtained as described above
Is input to the transfer function circuit 8 and the time constant T of the transfer function is increased to output the long-term average value of the effective value V D of the interconnection point voltage V L from the transfer function circuit 8.

【0007】この連系点電圧VL の実効値VD の長時間
平均値を電圧制御指令値Vref として、この電圧制御指
令値Vref と実効値VD との誤差を減算回路9を介して
電圧制御伝達関数回路10に入力する。この電圧制御伝
達関数回路10では、電圧制御指令値Vref と実効値V
D との誤差を最小とするPI制御を実行する。
[0007] As long voltage average value control command value V ref of the effective value V D of the interconnection point voltage V L, the error between the voltage control command value V ref and the effective value V D via the subtraction circuit 9 Input to the voltage control transfer function circuit 10. In this voltage control transfer function circuit 10, the voltage control command value V ref and the effective value V
PI control that minimizes the error from D is executed.

【0008】この電圧制御伝達関数回路10の出力信号
T をサイリスタ点弧演算回路11に入力し、そのサイ
リスタ点弧演算回路11でサイリスタ点弧信号を生成
し、そのサイリスタ点弧信号に基づいてTCR2を位相
制御する。このサイリスタ点弧信号によるTCR2の位
相制御でもって、連系点電圧VL をほぼ一定電圧に維持
するようにしている。
The output signal S T of the voltage control transfer function circuit 10 is input to the thyristor firing arithmetic circuit 11, the thyristor firing arithmetic circuit 11 generates a thyristor firing signal, and based on the thyristor firing signal. Phase control of TCR2. By controlling the phase of the TCR 2 by the thyristor firing signal, the interconnection point voltage V L is maintained at a substantially constant voltage.

【0009】[0009]

【発明が解決しようとする課題】ところで、変動負荷6
が系統から分離した場合、その変動負荷6の抜けにより
連系点電圧VL が上昇するため、SVC1の電圧制御系
では、連系点電圧VL を降下させるためにTCR2の遅
相無効電力を増加させる動作をする。しかしながら、こ
の種の電圧制御系は、連系点電圧VL を検出してその検
出信号に基づいてTCR2の電流IT を調整することに
より前述の連系点電圧VL を制御するというフィードバ
ック制御となっているので、制御定数や系統条件によっ
ては応答遅れや制御回路と主回路とのインピーダンスの
マッチングがとれない不安定状態となって、連系点電圧
L を降下させるまでに過渡的にその連系点電圧VL
許容値以上に上昇して振動するような不安定状態が発生
する可能性があった。
By the way, the variable load 6
Is separated from the grid, the interconnection point voltage VL rises due to the loss of the variable load 6. Therefore, in the voltage control system of the SVC 1, the lagging reactive power of the TCR2 is reduced in order to reduce the interconnection point voltage VL. It works to increase. However, this type of voltage control system detects the interconnection point voltage V L and adjusts the current I T of the TCR 2 based on the detection signal to control the interconnection point voltage V L described above. Therefore, depending on the control constant and the system condition, the response delay or the impedance of the control circuit and the main circuit cannot be matched, resulting in an unstable state, and the transition point voltage VL is transiently lowered. There is a possibility that an unstable state occurs in which the interconnection point voltage V L rises above a permissible value and vibrates.

【0010】図5は二つの変動負荷6を用意し、一方の
変動負荷6を系統から分離させた場合のシュミレーショ
ンで、上段から順に、系統電圧VS 、連系点電圧VL
連系点電圧VL の実効値VD 、電圧制御伝達関数回路1
0の出力信号ST 、系統電流IS 、二つの負荷電流
L1,IL2、LCフィルタ電流IF 及びTCR電流IT
の各波形を示す。図示のごとく、一つの変動負荷6が抜
けた時点(負荷電流IL2がなくなった時点)で、連系点
電圧VL が上昇し(図中a部分)、振動しているような
不安定状態が発生しているのが明らかである。
FIG. 5 is a simulation in which two fluctuating loads 6 are prepared, and one fluctuating load 6 is separated from the system. The system voltage V S , the interconnection point voltage V L ,
Effective value V D of interconnection point voltage V L , voltage control transfer function circuit 1
0 output signal S T , system current I S , two load currents I L1 , I L2 , LC filter current I F and TCR current I T
Each waveform of is shown. As shown in the figure, at the time when one variable load 6 is removed (when the load current I L2 is lost), the interconnection point voltage V L rises (a portion in the figure) and an unstable state in which it is oscillating Is apparently occurring.

【0011】このように連系点電圧VL が許容値以上に
上昇すると、残存する変動負荷6に対して過電圧とな
り、それら変動負荷6が半導体素子などを使用している
場合には、過電圧による素子破壊が生じるという不具合
や負荷の耐圧的に問題があった。
When the interconnection point voltage V L rises above the allowable value in this way, the remaining variable loads 6 become overvoltages. When these variable loads 6 use semiconductor elements, etc. There were problems such as element breakdown and load withstand voltage.

【0012】そこで、本発明は上記問題点に鑑みて提案
されたもので、その目的とするところは、変動負荷の抜
けがあっても連系点電圧が上昇することを抑制し得る無
効電力補償装置の制御方法を提供することにある。
Therefore, the present invention has been proposed in view of the above problems, and an object of the present invention is to provide reactive power compensation capable of suppressing an increase in the interconnection point voltage even if a variable load is removed. It is to provide a control method of the device.

【0013】[0013]

【課題を解決するための手段】上記目的を達成するため
の技術的手段として、本発明は、TCRとLCフィルタ
との並列回路を系統母線に接続して系統電源と連系させ
たSVCにおいて、その連系点電圧を自動調整する制御
方法であって、連系点電圧を予め設定された所定の基準
電圧と比較し、前記系統電圧が基準電圧以上となった時
点でTCRを強制的にフル導通させるようにしたことを
特徴とする。
As a technical means for achieving the above object, the present invention relates to an SVC in which a parallel circuit of a TCR and an LC filter is connected to a system bus and is connected to a system power source. A control method for automatically adjusting the interconnection point voltage, in which the interconnection point voltage is compared with a preset predetermined reference voltage, and the TCR is forcibly full when the system voltage becomes equal to or higher than the reference voltage. It is characterized in that it is made conductive.

【0014】[0014]

【発明の実施の形態】本発明の実施形態を図1及び図2
に示して説明する。尚、図3乃至図5と同一部分には同
一参照符号を付す。
1 and 2 show an embodiment of the present invention.
Will be described. The same parts as those in FIGS. 3 to 5 are designated by the same reference numerals.

【0015】本発明のSVC1は、従来と同様、可変の
遅相無効電力を生成するTCR2と固定の進相無効電力
を生成するLCフィルタ3との並列回路を系統母線4に
接続して系統電源5と連系させた構造を有し、TCR2
に流れる電流IT を調整することにより、そのTCR2
に発生する遅相無効電力を負荷変動に伴う系統電圧V S
の変動に応じて増減してその電圧変動を抑制し、更に、
LCフィルタ3に発生する一定の進相無効電力により、
力率を改善しながら系統母線4での電圧降下を一律に抑
制する。
The SVC 1 of the present invention, like the conventional one, is variable.
TCR2 that generates lagging reactive power and fixed leading reactive power
A parallel circuit with the LC filter 3 for generating
It has a structure in which it is connected to and connected to the system power supply 5, and the TCR2
Current I flowing throughTBy adjusting its TCR2
Of the lagging reactive power generated in the S
The voltage fluctuation is suppressed by increasing or decreasing according to the fluctuation of
Due to the constant advanced reactive power generated in the LC filter 3,
Uniformly suppresses the voltage drop on the system bus 4 while improving the power factor.
Control.

【0016】ここで、本発明のSVC1では、連系点電
圧VL を一定電圧に制御するため、以下のような制御方
法を採用する。
Here, in the SVC 1 of the present invention, in order to control the interconnection point voltage V L to a constant voltage, the following control method is adopted.

【0017】変動負荷6の抜けがなく連系点電圧VL
上昇していない定常状態では、従来と同様、図1の制御
ブロックで示すように連系点電圧VL を変圧器(図示せ
ず)により検出し、その連系点電圧VL の実効値VD
演算回路7で算出する。一方、前述のようにして得られ
た連系点電圧VL の実効値VD を伝達関数回路8に入力
し、その伝達関数の時定数Tを大きくすることにより、
連系点電圧VL の実効値VD の長時間平均値を伝達関数
回路8から出力する。
[0017] In steady state interconnection point voltage V L is no omission of variable load 6 is not increased, conventional manner, the interconnection point voltage V L transformer (shown as indicated by the control block 1 And the effective value V D of the interconnection point voltage V L is calculated by the arithmetic circuit 7. On the other hand, by inputting the effective value V D of the interconnection point voltage V L obtained as described above into the transfer function circuit 8 and increasing the time constant T of the transfer function,
The transfer function circuit 8 outputs the long-term average value of the effective value V D of the interconnection point voltage V L.

【0018】この連系点電圧VL の実効値VD の長時間
平均値を電圧制御指令値Vref として、この電圧制御指
令値Vref と実効値VD との誤差を減算回路9を介して
電圧制御伝達関数回路10に入力する。この電圧制御伝
達関数回路10では、電圧制御指令値Vref と実効値V
D との誤差を最小とするPI制御を実行する。この時、
スイッチ12は端子Aに切り換えられた状態にあって電
圧制御伝達関数回路10がサイリスタ点弧演算回路11
と接続された状態にある。
[0018] a long time a voltage mean value control command value V ref of the effective value V D of the interconnection point voltage V L, the error between the voltage control command value V ref and the effective value V D via the subtraction circuit 9 Input to the voltage control transfer function circuit 10. In this voltage control transfer function circuit 10, the voltage control command value V ref and the effective value V
PI control that minimizes the error from D is executed. This time,
The switch 12 is switched to the terminal A, and the voltage control transfer function circuit 10 has the thyristor firing arithmetic circuit 11
Is connected to.

【0019】従って、この電圧制御伝達関数回路10の
出力信号ST がスイッチ12を介してサイリスタ点弧演
算回路11に入力され、そのサイリスタ点弧演算回路1
1でサイリスタ点弧信号を生成し、そのサイリスタ点弧
信号に基づいてTCR2を位相制御する。このサイリス
タ点弧信号によるTCR2の位相制御でもって、連系点
電圧VL をほぼ一定電圧に維持する。
Therefore, the output signal S T of the voltage control transfer function circuit 10 is input to the thyristor firing arithmetic circuit 11 via the switch 12, and the thyristor firing arithmetic circuit 1 is provided.
At 1, the thyristor firing signal is generated, and the TCR 2 is phase-controlled based on the thyristor firing signal. By the phase control of the TCR 2 by this thyristor firing signal, the interconnection point voltage V L is maintained at a substantially constant voltage.

【0020】一方、変動負荷6が系統から分離した場
合、その変動負荷6の抜けにより連系点電圧VL が上昇
した時、その上昇する連系点電圧VL の実効値VD が、
比較回路13により、予め設定された所定の基準電圧V
DUと比較される。この比較回路13により連系点電圧V
L の実効値VD と基準電圧VDUとを比較した結果、その
連系点電圧VL の実効値VD が基準電圧VDU以上となっ
た時点で、比較回路13の出力信号に基づいてスイッチ
12を端子Aから端子Bへ切り換える。
Meanwhile, if the variable load 6 is separated from the system, when the interconnection point voltage V L by omission of load fluctuation 6 rises, the effective value V D of the interconnection point voltage V L to its raised,
A predetermined reference voltage V set in advance by the comparison circuit 13
Compared to DU . This comparison circuit 13 causes the interconnection point voltage V
L result of the comparison between the effective value V D and the reference voltage V DU of, when the effective value V D of the interconnection point voltage V L is equal to or higher than the reference voltage V DU, on the basis of the output signal of the comparator circuit 13 Switch 12 is switched from terminal A to terminal B.

【0021】尚、比較回路13の一方の端子に入力され
る基準電圧VDUは、連系点電圧VLの変動の許容範囲を
±10%程度とすれば、系統電圧VS の110%程度相
当の電圧値に予め設定しておけばよい。
The reference voltage V DU input to one terminal of the comparison circuit 13 is about 110% of the system voltage V S when the allowable range of fluctuation of the interconnection point voltage V L is about ± 10%. It may be set in advance to a corresponding voltage value.

【0022】このスイッチ12の端子Bには、TCR2
をフル導通させるための信号(1pu)が予め付与され
ているため、その信号がスイッチ12を介してサイリス
タ点弧演算回路11に入力され、そのサイリスタ点弧演
算回路11でフル導通のサイリスタ点弧信号を生成し、
そのサイリスタ点弧信号に基づいてTCR2をフル導通
させる。
The terminal B of this switch 12 has a TCR2
Since a signal (1 pu) for fully conducting the thyristor is previously given, the signal is input to the thyristor firing arithmetic circuit 11 via the switch 12, and the thyristor firing arithmetic circuit 11 fully ignites the thyristor firing. Generate a signal,
Based on the thyristor firing signal, the TCR2 is fully turned on.

【0023】この強制的なTCR2のフル導通により、
TCR2で発生する遅相無効電力が増加して連系点電圧
L の進相無効電力を瞬時に減少させることができ、そ
の連系点電圧VL の上昇を抑制する。二つの変動負荷6
を用意し、一方の変動負荷6を系統から分離させた場合
のシュミレーションを示す図2でも明らかなように、従
来の場合と比較しても(図5参照)、一つの変動負荷6
が抜けた時点(負荷電流IL2がなくなった時点)で、T
CR2のフル導通により(図中b部分)、連系点電圧V
L の上昇が抑制され(図中c部分)、振動するような不
安定状態が発生することはない。
Due to this forced full conduction of TCR2,
The lagging reactive power generated in the TCR 2 increases and the leading reactive power of the interconnection point voltage V L can be instantaneously reduced, and the rise of the interconnection point voltage V L is suppressed. Two variable loads 6
As shown in FIG. 2 which shows a simulation in which one of the fluctuating loads 6 is separated from the system, one fluctuating load 6 is compared with the conventional case (see FIG. 5).
At the time when the load current has passed (when the load current I L2 has disappeared), T
Due to full conduction of CR2 (b part in the figure), the interconnection point voltage V
The rise of L is suppressed (part c in the figure), and an unstable state such as vibration does not occur.

【0024】[0024]

【発明の効果】本発明によれば、TCRとLCフィルタ
との並列回路を系統母線に接続して系統電源と連系させ
たSVCにおいて、その連系点電圧を自動調整する制御
方法であって、連系点電圧を予め設定された所定の基準
電圧と比較し、前記系統電圧が基準電圧以上となった時
点でTCRを強制的にフル導通させるようにしたから、
変動負荷の抜けが生じた場合であっても、連系点電圧の
上昇を瞬時にして抑制することができて安定した連系点
電圧を確保でき、過電圧による素子破壊等の事故を未然
に防止できて安全性に富んだ信頼性の高い無効電力補償
装置を提供できる。
According to the present invention, there is provided a control method for automatically adjusting the interconnection point voltage in an SVC in which a parallel circuit of a TCR and an LC filter is connected to a system bus and is connected to a system power supply. , The interconnection point voltage is compared with a preset predetermined reference voltage, and the TCR is forcibly brought into full conduction when the system voltage becomes equal to or higher than the reference voltage.
Even if the variable load is pulled out, the rise of the interconnection point voltage can be suppressed instantaneously, a stable interconnection point voltage can be secured, and accidents such as element destruction due to overvoltage can be prevented beforehand. It is possible to provide a highly reliable and highly reliable var compensator.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明方法の実施形態を示す制御ブロック図FIG. 1 is a control block diagram showing an embodiment of a method of the present invention.

【図2】本発明方法による負荷抜けを再現したシュミレ
ーションでの電圧又は電流信号を示す波形図
FIG. 2 is a waveform diagram showing a voltage or current signal in a simulation reproducing a load drop by the method of the present invention.

【図3】無効電力補償装置を系統に接続した主回路を示
す回路図
FIG. 3 is a circuit diagram showing a main circuit in which a reactive power compensator is connected to a grid.

【図4】従来方法を説明するための制御ブロック図FIG. 4 is a control block diagram for explaining a conventional method.

【図5】従来方法による負荷抜けを再現したシュミレー
ションでの電圧又は電流信号を示す波形図
FIG. 5 is a waveform diagram showing a voltage or current signal in a simulation in which load loss is reproduced by a conventional method.

【符号の説明】 1 無効電力補償装置(SVC) 2 サイリスタ位相制御リアクトル(TCR) 3 LCフィルタ 4 系統母線 5 系統電源 VL 連系点での系統電圧 VDU 基準電圧[Explanation of symbols] 1 Reactive power compensator (SVC) 2 Thyristor phase control reactor (TCR) 3 LC filter 4 System bus 5 System power supply V L System voltage at interconnection point V DU reference voltage

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 サイリスタ位相制御リアクトルとLCフ
ィルタとの並列回路を系統母線に接続して系統電源と連
系させた無効電力補償装置において、その連系点での系
統電圧を自動調整する制御方法であって、連系点での系
統電圧を予め設定された所定の基準電圧と比較し、前記
系統電圧が基準電圧以上となった時点でサイリスタ位相
制御リアクトルを強制的にフル導通させるようにしたこ
とを特徴とする無効電力補償装置の制御方法。
1. In a reactive power compensator in which a parallel circuit of a thyristor phase control reactor and an LC filter is connected to a system bus and is connected to a system power supply, a control method for automatically adjusting a system voltage at the connection point. The system voltage at the interconnection point is compared with a preset reference voltage, and the thyristor phase control reactor is forcibly brought into full conduction when the system voltage becomes equal to or higher than the reference voltage. A method of controlling a reactive power compensator, comprising:
JP8132279A 1996-05-27 1996-05-27 Control method for reactive power compensator Withdrawn JPH09322407A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8132279A JPH09322407A (en) 1996-05-27 1996-05-27 Control method for reactive power compensator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8132279A JPH09322407A (en) 1996-05-27 1996-05-27 Control method for reactive power compensator

Publications (1)

Publication Number Publication Date
JPH09322407A true JPH09322407A (en) 1997-12-12

Family

ID=15077575

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8132279A Withdrawn JPH09322407A (en) 1996-05-27 1996-05-27 Control method for reactive power compensator

Country Status (1)

Country Link
JP (1) JPH09322407A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100438256C (en) * 2006-11-03 2008-11-26 德力西集团仪器仪表有限公司 Power-less compensation control method

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100438256C (en) * 2006-11-03 2008-11-26 德力西集团仪器仪表有限公司 Power-less compensation control method

Similar Documents

Publication Publication Date Title
US5666275A (en) Control system for power conversion system
JPH04218818A (en) Ac power source
US4339705A (en) Thyristor switched inductor circuit for regulating voltage
JPH09322407A (en) Control method for reactive power compensator
JP6312558B2 (en) DC feeding system
JP4875547B2 (en) Reactive power compensator and control method thereof
JP2020188614A (en) Control method and control circuit of reactive power compensator
JPS6132915B2 (en)
JP3328039B2 (en) Static var compensator
JP3319169B2 (en) Static var compensator
JP3041317B2 (en) DC arc furnace power supply
JPH04313108A (en) Reactive power compensating device
JP2792085B2 (en) Control method of reactive power compensator
JPH07212979A (en) Controller of flicker handling equipment
JPH07245876A (en) Controller of system inverter
JPH086651A (en) Voltage stabilizing device
JP2768848B2 (en) Control device for static var compensator
JPH03122705A (en) Static type reactive power compensating device
JPS5856008A (en) Control system for reactive power compensating device
JPH0731301Y2 (en) Controller for reactive power compensator
JPH08214459A (en) Controller of reactive power compensating equipment
JP3319111B2 (en) Static var compensator
JPH08123564A (en) Reactive power compensator
JP2001197668A (en) Tandem compensation apparatus for power system
JPH08314557A (en) Controller for reactive power compensator

Legal Events

Date Code Title Description
A300 Withdrawal of application because of no request for examination

Free format text: JAPANESE INTERMEDIATE CODE: A300

Effective date: 20030805