JPH09312244A - Laminated semiconductor wafer and manufacture thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a laminated semiconductor wafer having an enlarged device forming area at an active layer and a manufacturing method not requiring CCR (etching of a wafer on a support board at chamfering faces) steps, etc. SOLUTION: Two wafers 11, 12 are prepared. The wafer 11 has a SiO2 film 11a on its mirror surface. By referring to V-shaped notches of the marginal edges of the wafers 11, 12, the oxide film is laminated on the mirror surface at the room temp. and heat treated. The active layer side wafer part 14 of the laminated wafer 13 is polished and the marginal edge is chamfered 3mm wide. Notch-chamfering is applied to the support board side wafer part 15, the active layer side wafer part 14 is ground and the ground surface is polished into a mirror surface. Thus a laminated wafer 13 having notches 16 only at the large-aperture support board 15 is obtained. The active layer part 14 surface is ground and polished.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a bonded semiconductor wafer and a method for manufacturing the same, and more particularly to a bonded semiconductor wafer having a notch and a method for manufacturing the same.

[0002]

2. Description of the Related Art A conventional method for manufacturing a notched laminated semiconductor wafer will be described below. As shown in FIG.
A sheet of mirror-finished silicon wafer (at least one of which has an oxide film) is prepared (A), and these mirror-finished surfaces are superposed at room temperature. Then, a predetermined bonded heat treatment is performed to obtain a bonded wafer (B). Then, one of the wafers (wafer forming the active layer) is polished to have a predetermined thickness, and at the same time, the outer peripheral surface thereof is also chamfered. For example, chamfering is performed within a range of 3 mm from the outer peripheral edge. Further, a second chamfer of the notch portion is applied to the outer peripheral surface. In this case, notch chamfering is performed not only on the substrate side wafer but also on the active layer side wafer (C). Then, after this, CCR (chemical corner ro), which is a chemical mirror surface treatment of the chamfered portion, is performed.
and the chamfered surface is etched. After this, the active layer wafer is further subjected to predetermined grinding / polishing (D). Then, a desired device is formed in this silicon active layer.

[0003]

However, in such a conventional bonded silicon wafer, the notch VN is formed up to the active layer wafer portion as shown in FIG. There was a problem that the effective area was reduced.

Further, in such a conventional method of manufacturing a bonded silicon wafer, since the wafer on the active layer side is also subjected to the notch chamfering, an etching (CCR) process on the chamfered surface of the wafer on the supporting base side is performed. It had the problem of needing it.

[0005]

OBJECTS OF THE INVENTION It is therefore an object of the present invention to provide a bonded silicon wafer which increases the effective area for device formation in the active layer. Another object of the present invention is to provide a method for manufacturing a bonded silicon wafer that does not require a CCR process.

[0006]

According to a first aspect of the present invention, an active layer wafer portion having a small diameter and a supporting substrate having a diameter larger than that of the active layer wafer portion are formed by laminating two semiconductor wafers. In the bonded semiconductor wafer having the wafer part (1), a notch is formed in a part of the outer peripheral edge of the wafer part for the supporting substrate.

The invention according to claim 2 is the bonded semiconductor wafer according to claim 1, wherein an insulating layer is provided between the active layer wafer portion and the supporting base wafer portion.

According to a third aspect of the present invention, a step of laminating two semiconductor wafers, a step of subjecting the superposed semiconductor wafers to a predetermined laminating heat treatment, and a semiconductor wafer portion on one side of the superposed semiconductor wafers are performed. A method for manufacturing a bonded semiconductor wafer, comprising: a step of chamfering an outer peripheral surface; and a step of forming a notch in the remaining semiconductor wafer portion of the bonded semiconductor wafer.

[0009]

In the bonded semiconductor wafer according to claim 1 or 2, since the notch is formed in the wafer portion for the supporting substrate, the entire wafer portion for the active layer should be used as a device formation region. You can The device formation region can be expanded as compared with the conventional one.

According to the third aspect of the present invention, first, for example, the mirror surfaces of two mirror-polished semiconductor wafers are superposed on each other. In this case, an insulating film may be formed on the surface of one of the semiconductor wafers. Next, the superposed semiconductor wafers are annealed, for example. As a result, a bonded semiconductor wafer is manufactured. Next, the outer peripheral surface of the semiconductor wafer portion on one side of this bonded semiconductor wafer is chamfered. Further, a notch is formed in the remaining semiconductor wafer portion on the other side. As a result, a notched laminated semiconductor wafer can be formed. In this case, the semiconductor wafer portion on the other side does not need notch chamfering, and the CCR process can be omitted.

[0011]

DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described below with reference to the drawings. 1 and 2 show a method for manufacturing a bonded semiconductor wafer according to the present invention. As shown in FIG. 1, first, two silicon wafers (PW) 11 and 12 are prepared, and a silicon dioxide film 11A is deposited on the mirror surface of one silicon wafer 11 (A). Further, each of the wafers 11 and 12 has a notch (V-shaped notch) 16 formed on the outer peripheral edge thereof. These silicon wafers 11, 12
The silicon dioxide film and the mirror surface are superposed on each other at room temperature with the notch as a reference (B). As a result, these silicon wafers 11 and 12 are bonded to each other and integrated, and a bonded wafer 13 is formed.
Further, a predetermined heat treatment for bonding is applied to the bonded wafer 13.

Next, in this bonded wafer 13, the wafer portion 14 on the active layer side is polished, and the outer peripheral edge portion thereof is chamfered with a width of 3 mm, for example (C). As a result, the notch of the wafer portion 14 on the active layer side is removed. Then, the notch 16 of the wafer portion 15 on the support base side is also chamfered (notch chamfering). Next, the wafer portion 14 on the active layer side is ground to form a desired thickness (D), and the ground surface is mechanochemically polished to be a mirror surface (E). As a result,
A desired bonded wafer 13 can be obtained. In this bonded wafer 13, notches 16 are formed only in the large-diameter support base portion 15. Since the notch 16 is formed only in the support base portion 15, the outer peripheral edge portion of the support base portion 15 is formed as a smooth chamfered surface by the notch chamfering, and the CCR (chemical
There is no need to apply corner rounding.
The notch chamfer may be unnecessary.

Next, the bonded wafer 13 is sequentially subjected to a grinding process (D) on the surface of the active layer portion 14 and a mechanochemical polishing process (E). As a result, the notched bonded wafer 13 having the active layer 14 having a predetermined thickness can be manufactured (F).

FIGS. 2A and 2B show the bonded wafer 13 thus produced. In this bonded wafer 13, the notch 16 is not formed on the active layer side 14, so that the entire surface can be effectively used as a device formation region.

[0015]

According to the present invention, the effective area for device formation in the active layer can be increased. Further, the mirror chamfering step (PCR / CCR) can be omitted in the manufacturing process of the bonded semiconductor wafer.

[Brief description of drawings]

FIG. 1 is a flow chart of steps showing a method for manufacturing a bonded semiconductor wafer according to an embodiment of the present invention.

FIG. 2 is a diagram showing a bonded semiconductor wafer according to an embodiment of the present invention.

FIG. 3 is a plan view showing a conventional bonded semiconductor wafer.

FIG. 4 is a process flow chart showing a conventional method for manufacturing a bonded semiconductor wafer.

[Explanation of symbols]

 11, 12 silicon wafer, 11A insulating film (silicon dioxide film), 13 bonded wafer, 14 active layer side wafer part, 15 support base side wafer part, 16 notch.

Claims (3)

[Claims] 1. A bonded semiconductor wafer, which is formed by bonding two semiconductor wafers together and has a small-diameter active layer wafer part and a support-base wafer part having a larger diameter than the active-layer wafer part, wherein A bonded semiconductor wafer in which a notch is formed in part of the outer peripheral edge of the base wafer portion. 2. The bonded semiconductor wafer according to claim 1, wherein an insulating layer is provided between the active layer wafer portion and the supporting substrate wafer portion. 3. A step of stacking two semiconductor wafers, a step of subjecting the stacked semiconductor wafers to a predetermined bonding heat treatment, and a step of chamfering an outer peripheral surface of a semiconductor wafer portion on one side of the bonded semiconductor wafers. And a step of forming a notch in the remaining semiconductor wafer portion on the other side of the bonded semiconductor wafers.