JPH09275429A - Path testing system - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce circuit scale by excluding a circuit not to be used excepting for a path test by providing plural fixed pattern generating means and performing the test of a line between a transmitter and a receiver while using fixed patterns. SOLUTION: Fixed pattern generation circuits from 2-1 to 2-n are provided for generating fixed pattern signals. At the fixed pattern generation circuits from 2-1 to 2-n, respectively arbitrary fixed pattern signals are generated and inputted to a selector circuit 3. At the selector circuit 3, any one of signals generated at the respective fixed pattern signal generation circuits from 2-1 to 2-n is selected and outputted. Thus, since the line between a transmitter 1 and a receiver 7 is tested not by a bit-by-bit system but by a system using the fixed patterns, a PN pattern generation circuit for generating a PN pattern for performing the test due to the bit-by-bit system and a PN pattern collation circuit for collating the arithmetic result bit by bit can be excluded.

Description

Detailed Description of the Invention

[0001]

TECHNICAL FIELD The present invention relates to a transmission device,
In particular, it relates to a path test method performed to confirm the normality of a line between a transmitter and a receiver.

[0002]

2. Description of the Related Art FIG. 2 is a block diagram showing an example of the configuration of a conventional path test system.

As shown in FIG. 2, this prior art example comprises a device 101 for transmitting data and a receiver 107 for receiving the data transmitted from the transmitter 101. , PN pattern generating circuit 110 for generating a PN pattern signal for testing by a bit-by-bit method, and selection for selecting and outputting one of a main signal 112 and a PN pattern signal generated in the PN pattern generating circuit 110 Circuit 103 and ITU-
Generates the path overhead specified in the T recommendation,
The overhead generation circuit 104 added to the signal selected by the selection circuit 103 and the BIP calculation of the signal with the path overhead added by the overhead generation circuit 104 are performed, and the calculation result is inserted into a byte at a specific position of the input signal. BIP operation circuit 105 and ITU
The frame generation circuit 106 that generates the section overhead specified by the −T recommendation, inserts it into the signal output from the BIP operation circuit 105, and outputs the section overhead is provided. A frame terminating circuit 108 for receiving the signal output from the frame terminating the frame synchronization of the received signal, and a frame terminating circuit 108.
The BIP calculation is performed on the signals synchronized with each other, the calculation result is compared with the calculation result in the BIP calculation circuit 105, and the transmitter 101 and the receiver 107 are compared based on the comparison result.
BIP termination circuit 109 for judging the normality of the line between
And a PN pattern matching circuit 111 that has the same number of PN pattern matching functions as the PN pattern generating circuit 110, performs a bit-by-bit matching when executing a path test, and outputs the result.

The operation of the path test system constructed as above will be described below.

In the PN pattern generation circuit 110, PN pattern signals of an arbitrary number of stages are generated, and the main signal 1
12 and the PN pattern generated by the PN pattern generation circuit 110 are input to the selection circuit 103.

In the selection circuit 103, the PN pattern signal generated in the PN pattern generation circuit 110 is selected only when the path test is performed, and normally the main signal 112 is selected.
Is selected.

Next, in the overhead generation circuit 104, the signal output from the selection circuit 103 is added to the ITU-T.
The path overhead specified in the recommendation is added,
The signal with the path overhead added is output.

Next, in the BIP calculation circuit 105, the BI of the signal output from the overhead generation circuit 104 is
The P operation is performed, the operation result is inserted into the byte at the specific position of the signal, and the signal in which the operation result is inserted is output.

Next, in the frame generation circuit 106,
The signal output from the BIP arithmetic circuit 105 is added to the ITU-T
The section overhead specified in the recommendation is inserted, and the signal with the section overhead inserted is output.

When the receiving device 107 receives the signal output from the frame generating circuit 106, the frame terminating circuit 108 synchronizes the received signal.

Next, in the BIP terminating circuit 109, the BIP of the signal synchronized by the frame terminating circuit 108.
Calculation is performed, the calculation result is compared with the calculation result in the BIP calculation circuit 105, and the transmitter 1 is calculated from the comparison result.
01 and the normality of the line between the receiving device 107 are determined.

Thereafter, in the PN pattern matching circuit 111, the calculation result in the BIP calculating circuit 105 and the calculation result in the BIP terminating circuit 109 are matched bit by bit, and the matching result is output.

[0013]

In the conventional path test method as described above, the test is performed by the bit-by-bit method. Therefore, in order to realize this, a PN pattern generating circuit and a PN pattern generating circuit for generating a PN pattern signal are provided. It is necessary to provide a PN pattern matching unit that performs bit-by-bit matching and outputs the result. However, in the PN pattern generation circuit and the PN pattern matching circuit, there is a problem that they are not used except during the path test, which is a disadvantageous material in terms of circuit scale reduction.

The present invention has been made in view of the problems of the conventional technique as described above, and the circuit scale can be reduced by deleting the circuits that are not used except during the path test. The purpose is to provide a path test method.

[0015]

In order to achieve the above object, the present invention comprises a transmitter for transmitting data and a receiver for receiving the data transmitted from the transmitter, and the transmitter. A path test method for judging normality of a line between the receiving device and the transmitting device, wherein the transmitting device generates a plurality of fixed pattern signals each generating a fixed pattern signal, and the fixed pattern generating device generates the fixed pattern signals. Selecting means for selecting and outputting one of the selected signals, an overhead generating means for generating a path overhead and adding it to the signal selected by the selecting means, and a path overhead added by the overhead generating means. BIP operation of a signal, BIP operation means for inserting the operation result into the input signal, and section overhead are generated, A frame terminating unit that inserts the signal output from the BIP calculating unit and outputs the frame, wherein the receiving device receives the signal output from the transmitting device and synchronizes the frame of the received signal. Means and the frame terminating means perform BIP operation on the synchronized signals, compare the operation result with the operation result in the BIP operation means, and check the normality of the line between the transmitter and the transmitter from the comparison result. And a BIP terminating means for judging.

The line formed by the transmitter and the receiver is ITU-T Recommendation G.264. 708 and G709 are characterized by having an interface function having a frame structure.

(Operation) In the present invention configured as described above, a plurality of fixed pattern generating means for generating a fixed pattern signal are provided, and the line between the transmitter and the receiver is tested by the bit-by-bit method. Since a fixed pattern is used instead of the method, a PN pattern generation circuit that generates a PN pattern and a bit-by-bit method for collating operation results are used for testing by the bit-by-bit method.
The N pattern matching circuit is deleted and the circuit scale is reduced.

[0018]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of the path test system of the present invention.

As shown in FIG. 1, this embodiment comprises a transmitter 1 for transmitting data and a receiver 7 for receiving the data transmitted from the transmitter 1.
Fixed pattern generation circuits 2-1 to 2-n (n is a natural number) for respectively generating arbitrary fixed pattern signals,
A selection circuit 3 that selects and outputs one of the signals generated by each of the fixed pattern generation circuits 2-1 to 2-n, and a selection circuit that generates a path overhead defined by the ITU-T recommendation. BIP operation for adding the overhead generation circuit 4 added to the signal selected in 3 and the signal added with the path overhead in the overhead generation circuit 4 and inserting the operation result into a byte at a specific position of the input signal Circuit 5 and ITU
A frame generation circuit 6 for generating the section overhead defined by the −T recommendation, inserting it into the signal output from the BIP operation circuit 5, and outputting the section overhead is provided. The frame output circuit 8 receives the signal output from the frame and performs the BIP operation on the signal synchronized in the frame end circuit 8 for synchronizing the frame of the received signal, and the operation result and the operation in the BIP operation circuit 5. BIP for comparing the result with the result and judging the normality of the line between the transmitting device 1 and the receiving device 7 from the comparison result.
A termination circuit 9 is provided.

The operation of the path test system constructed as above will be described below.

In the fixed pattern generation circuits 2-1 to 2-n, arbitrary fixed pattern signals are generated and input to the selection circuit 3.

In the selection circuit 3, one of the signals generated in each of the fixed pattern generation circuits 2-1 to 2-n is selected and output.

Next, in the overhead generation circuit 4, the path overhead defined by the ITU-T recommendation is added to the signal output from the selection circuit 3, and the signal with the path overhead added is output.

Next, in the BIP operation circuit 5, the signal output from the overhead generation circuit 4 is BIP operated, the operation result is inserted into a byte at a specific position of the signal, and the signal in which the operation result is inserted is output. To be done.

Next, in the frame generation circuit 6, BI
The section overhead specified by the ITU-T recommendation is inserted into the signal output from the P operation circuit 5, and the signal with the section overhead inserted is output.

When the signal output from the frame generating circuit 6 is received by the receiving device 7, the frame terminating circuit 8
At, the received signal is synchronized.

Next, in the BIP terminating circuit 9, the BIP operation of the signal synchronized in the frame terminating circuit 8 is performed, the operation result is compared with the operation result in the BIP arithmetic circuit 5, and the comparison result is obtained. Transmitter 1 and receiver 7
The normality of the line between and is judged.

[0029]

As described above, in the present invention,
Since a plurality of fixed pattern generation means for generating a fixed pattern signal are provided and the test of the line between the transmitter and the receiver is made to use the fixed pattern instead of the bit by bit method, the test by the bit by bit method is performed. In order to reduce the circuit scale, it is possible to delete a circuit that is not used except during a test of the PN pattern generation circuit that generates the PN pattern and the PN pattern matching circuit that collates the operation results by bit-by-bit. You can

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of a path test system of the present invention.

FIG. 2 is a block diagram showing a configuration example of a conventional path test system.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 transmitter 2-1 to 2-n fixed pattern generation circuit 3 selection circuit 4 overhead generation circuit 5 BIP operation circuit 6 frame generation circuit 7 reception device 8 frame termination circuit 9 BIP termination circuit

Claims (2)

[Claims] 1. A transmission device for transmitting data, and a reception device for receiving data transmitted from the transmission device,
A path test method for determining the normality of a line between the transmitting device and the receiving device, wherein the transmitting device includes a plurality of fixed pattern generating means for respectively generating arbitrary fixed pattern signals, and the fixed pattern. Selecting means for selecting and outputting one of the signals generated by the generating means, overhead generating means for generating a path overhead and adding it to the signal selected by the selecting means, and path overhead for the overhead generating means BIP calculation means for performing BIP calculation on the signal added with, and a frame generation means for generating a section overhead and inserting and outputting the section overhead into the signal output from the BIP calculation means. And the receiving device receives and receives the signal output from the transmitting device. A frame termination unit frame synchronization signal, BI synchronization taken signal in the frame terminator
A path test including a BIP terminating means for performing P operation, comparing the operation result with the operation result in the BIP operation means, and judging the normality of the line with the transmitting device from the comparison result. method. 2. The path test method according to claim 1, wherein a line formed by the transmitter and the receiver is ITU.
-T Recommendation G. A path test apparatus having an interface function having a frame structure defined by G.708 and G709.