JPH0927518A - Method of bonding electronic component - Google Patents
Method of bonding electronic componentInfo
- Publication number
- JPH0927518A JPH0927518A JP7173143A JP17314395A JPH0927518A JP H0927518 A JPH0927518 A JP H0927518A JP 7173143 A JP7173143 A JP 7173143A JP 17314395 A JP17314395 A JP 17314395A JP H0927518 A JPH0927518 A JP H0927518A
- Authority
- JP
- Japan
- Prior art keywords
- electronic component
- substrate
- anaerobic adhesive
- electrode
- bumps
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8319—Arrangement of the layer connectors prior to mounting
- H01L2224/83192—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
Landscapes
- Wire Bonding (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は、バンプを備えた電子部
品を接着剤を用いて基板に接着する電子部品の接着方法
に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electronic component bonding method for bonding an electronic component having bumps to a substrate using an adhesive.
【０００２】[0002]
【従来の技術】バンプを備えた電子部品を接着剤により
基板に接着させるにあたり、紫外線硬化樹脂（以下単に
「ＵＶ樹脂」という）を用いる工法が知られている。2. Description of the Related Art A method of using an ultraviolet curable resin (hereinafter simply referred to as "UV resin") is known for adhering an electronic component having bumps to a substrate with an adhesive.
【０００３】このものでは、まず基板にＵＶ樹脂を塗布
し、次に電子部品を加圧して基板に押しつけたまま、Ｕ
Ｖ（紫外線）を照射してＵＶ樹脂を硬化させるというも
のである。なお熱硬化性樹脂を基板に塗布し、次に電子
部品を加圧しながら加熱してこの樹脂を硬化させる方法
も知られている。In this device, UV resin is first applied to the substrate, and then the electronic parts are pressed and pressed against the substrate while U
The UV resin is irradiated to cure the UV resin. It is also known to apply a thermosetting resin to a substrate and then heat the electronic component while applying pressure to cure the resin.
【０００４】[0004]
【発明が解決しようとする課題】ところで、電子部品を
基板に接着させる際、バンプは、電子部品と基板との間
に挟まれた状態にある。したがって、バンプの周囲に塗
布されたＵＶ樹脂を硬化させるためには、基板の裏側か
らＵＶを照射して、ＵＶが基板を透過するようにする必
要がある。By the way, when the electronic component is bonded to the substrate, the bump is sandwiched between the electronic component and the substrate. Therefore, in order to cure the UV resin applied around the bumps, it is necessary to irradiate UV from the back side of the substrate so that the UV passes through the substrate.
【０００５】このため、基板として、たとえばガラスな
ど、透過性を有するものしか用いることができず、透過
性のない基板については、適用することができないとい
う問題点があった。また、ＵＶ樹脂を十分硬化させるよ
うにするために、３０秒以上の長い時間電子部品を基板
に押しつけながらＵＶを照射し続ける必要があり、接合
に要するタクトタイムが長いという問題点もあった。Therefore, there is a problem that only a substrate having transparency such as glass can be used as a substrate, and a substrate having no transparency cannot be applied. Further, in order to sufficiently cure the UV resin, it is necessary to continue irradiating UV while pressing the electronic component against the substrate for a long time of 30 seconds or more, and there is also a problem that the tact time required for bonding is long.
【０００６】そこで本発明は、透過性のない基板であっ
ても短時間に電子部品を接着できる電子部品の接着方法
を提供することを目的とする。Therefore, an object of the present invention is to provide an electronic component bonding method capable of bonding electronic components in a short time even on a non-transparent substrate.
【０００７】[0007]
【課題を解決するための手段】本発明の電子部品の接着
方法は、基板の表面に形成された電極を覆うように嫌気
性接着剤を塗布するステップと、嫌気性接着剤が塗布さ
れた電極に電子部品のバンプを押しつけて、基板と電子
部品との間の空間に低酸素状態を形成するステップとを
含む。An electronic component bonding method according to the present invention comprises a step of applying an anaerobic adhesive so as to cover an electrode formed on a surface of a substrate, and an electrode coated with the anaerobic adhesive. Pressing the bumps of the electronic component to form a hypoxic condition in the space between the substrate and the electronic component.
【０００８】[0008]
【作用】上記構成により、基板の電極に嫌気性接着剤が
塗布され、電子部品のバンプが電極に押しつけられるこ
とにより、基板と電子部品との嫌気性接着剤で満たされ
た状態となる。即ち、基板と電子部品の間の空間の空気
のほとんどが嫌気性接着剤によって外部へ押し出され、
この空間に低酸素状態が形成され、これをきっかけとし
て嫌気性接着剤の硬化が始まり、電子部品は基板に接着
される。With the above structure, the electrodes of the substrate are coated with the anaerobic adhesive, and the bumps of the electronic component are pressed against the electrodes, whereby the substrate and the electronic components are filled with the anaerobic adhesive. That is, most of the air in the space between the substrate and the electronic component is pushed out by the anaerobic adhesive,
A low oxygen state is formed in this space, which triggers the curing of the anaerobic adhesive, and the electronic component is bonded to the substrate.
【０００９】[0009]
【実施例】以下、本発明の実施例について図面を参照し
ながら説明する。Embodiments of the present invention will be described below with reference to the drawings.
【００１０】図１（ａ）〜（ｄ）は、本発明の一実施例
における電子部品の接着方法の工程説明図である。図１
において、１は基板（ガラスのように透過性を有するも
のでもよいし、透過性のないものでもよい）、２は基板
１の表面に形成された電極である。ここで、嫌気性接着
剤の硬化を促進する触媒としての作用を奏するようにす
るため、電極２は銅により構成してある。３は電極２を
覆うように塗布された嫌気性接着剤、４は基板１に接着
すべき電子部品、５は電子部品４の下面に突出するバン
プである。電極２と同様にバンプ５も銅から構成し、触
媒としての作用を奏するようにしている。FIGS. 1A to 1D are process explanatory diagrams of an electronic component bonding method in an embodiment of the present invention. FIG.
In FIG. 1, reference numeral 1 denotes a substrate (which may or may not be transparent like glass), and 2 is an electrode formed on the surface of the substrate 1. Here, the electrode 2 is made of copper in order to act as a catalyst for promoting the curing of the anaerobic adhesive. Reference numeral 3 is an anaerobic adhesive applied so as to cover the electrode 2, 4 is an electronic component to be bonded to the substrate 1, and 5 is a bump protruding from the lower surface of the electronic component 4. Like the electrode 2, the bump 5 is also made of copper so as to function as a catalyst.
【００１１】さて、図１（ａ）に示すように、基板１の
電極２を覆うように嫌気性接着剤３を塗布する。次い
で、図１（ｂ）に示すように、電子部品４を矢印方向に
押しつけ、バンプ５を電極２に強く圧着する。この圧着
の時間はおおむね１０秒以下でよい。そしてこの圧着に
より、バンプ５と電極２が強く押しつけられることによ
り、銅からなるバンプ５と電極２とが密着し、電極２上
の嫌気性接着剤３が基板１と電子部品４の間の空間へ押
しやられ、この空間は嫌気性接着剤３でほぼ満たされて
空気がない低酸素状態となる。この低酸素状態が形成さ
れると、嫌気性接着剤３は、電極２とバンプ５の触媒作
用によりこの電極２及びバンプ５に接する部分から先に
硬化しはじめる。そして図１（ｃ）の斜線で示すように
少なくとも電極２及びバンプ５に接する嫌気性接着剤３
が硬化するまでバンプ５を電極２へ押し付けた状態を維
持する。この圧着に必要な時間は１０秒以下の短い時間
で十分である。そして図１（ｃ）に示すように嫌気性接
着剤３が硬化したら圧着を解除する。バンプ５は硬化し
た嫌気性接着剤３によって電極２に密着した状態でしっ
かりと固定されているので、この時点で圧着を解除して
も何ら支障はない。その後嫌気性接着剤３全体が硬化す
るまで放置する。嫌気性接着剤３の一部で硬化が始まる
と、その硬化現象は周囲に波及し、図１（ｄ）に示すよ
うに、嫌気性接着剤全体が硬化する。Now, as shown in FIG. 1A, an anaerobic adhesive 3 is applied so as to cover the electrodes 2 of the substrate 1. Next, as shown in FIG. 1B, the electronic component 4 is pressed in the arrow direction, and the bumps 5 are strongly pressure-bonded to the electrodes 2. The pressure bonding time may be approximately 10 seconds or less. By this pressure bonding, the bumps 5 and the electrodes 2 are strongly pressed, so that the bumps 5 made of copper and the electrodes 2 come into close contact with each other, and the anaerobic adhesive 3 on the electrodes 2 causes a space between the substrate 1 and the electronic component 4. This space is pushed to the bottom, and this space is almost filled with the anaerobic adhesive 3 and becomes a hypoxic state with no air. When this low oxygen state is formed, the anaerobic adhesive 3 begins to cure from the portion in contact with the electrodes 2 and the bumps 5 by the catalytic action of the electrodes 2 and the bumps 5. The anaerobic adhesive 3 that is in contact with at least the electrode 2 and the bump 5 as indicated by the diagonal lines in FIG.
The state in which the bump 5 is pressed against the electrode 2 is maintained until is cured. A short time of 10 seconds or less is sufficient for this pressure bonding. Then, as shown in FIG. 1C, the pressure bonding is released when the anaerobic adhesive 3 is cured. Since the bump 5 is firmly fixed to the electrode 2 by the hardened anaerobic adhesive 3, there is no problem even if the pressure bonding is released at this point. After that, the anaerobic adhesive 3 is left until it is completely cured. When a part of the anaerobic adhesive 3 starts to be hardened, the hardening phenomenon spreads to the surroundings, and the entire anaerobic adhesive is hardened, as shown in FIG.
【００１２】ここで、図１に示す接着方法の各工程にお
いて、酸素を遮断した雰囲気中で行ってもよいが、特に
酸素を遮断しなくとも十分な接着を行うことができる。
図１（ｃ）に示すように、圧着終了後に電子部品にダメ
ージを与えない程度の温度で加熱を行い、図１（ｄ）に
示すように、嫌気性接着剤３の全体が硬化するまでの時
間を短縮するようにしてもよい。この際、嫌気性接着剤
３には熱触媒を添加しておくと一層好適である。Here, in each step of the bonding method shown in FIG. 1, it may be carried out in an atmosphere in which oxygen is blocked, but sufficient bonding can be carried out without particularly blocking oxygen.
As shown in FIG. 1C, heating is performed at a temperature that does not damage the electronic component after the pressure bonding is completed, and as shown in FIG. 1D, the entire anaerobic adhesive 3 is cured. The time may be shortened. At this time, it is more preferable to add a thermal catalyst to the anaerobic adhesive 3.
【００１３】[0013]
【発明の効果】本発明の電子部品の接着方法は、本実施
例では、電極２及びバンプ５を嫌気性接着剤３の硬化を
促進する触媒作用を有する金属（例えば銅、アルミニウ
ム等）で構成することにより、電極２とバンプ５に接す
る嫌気性接着剤３を先に硬化させてバンプ５を電極２に
固定することができ、結果的に電子部品４を基板１に接
着する作業時間を一段と短縮することができる。なお電
極２及びバンプ５が触媒作用をもたない材料で形成され
ていても従来使用していたＵＶ樹脂よりも嫌気性接着剤
３が硬化する時間は短くて済むので作業時間を短縮する
といった効果を損なうことはないので、ガラス基板だけ
でなく他の種類の基板についても、バンプを備えた電子
部品を基板に接着することができるし、従来の接着方法
に対して、短時間で接着を完了することができる。According to the method of bonding electronic components of the present invention, in this embodiment, the electrodes 2 and the bumps 5 are made of a metal (for example, copper, aluminum, etc.) having a catalytic action for promoting the curing of the anaerobic adhesive 3. By doing so, the anaerobic adhesive 3 contacting the electrodes 2 and the bumps 5 can be cured first to fix the bumps 5 to the electrodes 2, and as a result, the working time for adhering the electronic component 4 to the substrate 1 is further improved. It can be shortened. Even if the electrodes 2 and the bumps 5 are formed of a material having no catalytic action, the time required for the anaerobic adhesive 3 to cure is shorter than that of the UV resin used in the past, so that the working time is shortened. It can bond electronic components with bumps to the substrate not only on the glass substrate but also on other types of substrates. can do.
【図１】（ａ）本発明の一実施例における電子部品の接
着方法の工程説明図 （ｂ）本発明の一実施例における電子部品の接着方法の
工程説明図 （ｃ）本発明の一実施例における電子部品の接着方法の
工程説明図 （ｄ）本発明の一実施例における電子部品の接着方法の
工程説明図FIG. 1A is a process explanatory diagram of an electronic component bonding method according to an embodiment of the present invention. FIG. 1B is a process explanatory diagram of an electronic component bonding method according to an embodiment of the present invention. (D) Process explanatory drawing of electronic component bonding method in one example of the present invention
１ 基板 ２ 電極 ３ 嫌気性接着剤 ４ 電子部品 ５ バンプ 1 substrate 2 electrode 3 anaerobic adhesive 4 electronic component 5 bump
Claims (5)
嫌気性接着剤を塗布するステップと、前記嫌気性接着剤
が塗布された前記電極に電子部品のバンプを押しつけ
て、前記基板と前記電子部品との間の空間に低酸素状態
を形成するステップとを含むことを特徴とする電子部品
の接着方法。1. A step of applying an anaerobic adhesive so as to cover an electrode formed on a surface of a substrate, and a bump of an electronic component is pressed against the electrode coated with the anaerobic adhesive to form the substrate. Forming a low oxygen state in a space between the electronic component and the electronic component.
性接着剤が硬化するまで前記バンプを前記電極に押し付
けた状態を維持することを特徴とする請求項１記載の電
子部品の接着方法。2. The method for adhering an electronic component according to claim 1, wherein after the low oxygen state is formed, the state in which the bump is pressed against the electrode is maintained at least until the anaerobic adhesive is cured.
気性接着剤の硬化を促進する触媒作用を備えた金属で構
成されていることを特徴とする請求項１記載の電子部品
の接着方法。3. The method for adhering electronic components according to claim 1, wherein the bumps and / or the electrodes are made of metal having a catalytic action for promoting the curing of the anaerobic adhesive.
成されていることを特徴とする請求項１記載の電子部品
の接着方法。4. The method for adhering electronic components according to claim 1, wherein the bumps and / or the electrodes are made of copper.
つけられることを特徴とする請求項１記載の電子部品の
接着方法。5. The method for adhering an electronic component according to claim 1, wherein the bump is pressed against the electrode for 10 seconds or less.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7173143A JPH0927518A (en) | 1995-07-10 | 1995-07-10 | Method of bonding electronic component |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7173143A JPH0927518A (en) | 1995-07-10 | 1995-07-10 | Method of bonding electronic component |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0927518A true JPH0927518A (en) | 1997-01-28 |
Family
ID=15954916
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP7173143A Pending JPH0927518A (en) | 1995-07-10 | 1995-07-10 | Method of bonding electronic component |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0927518A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2009158890A (en) * | 2007-12-28 | 2009-07-16 | Fujitsu Ltd | Electronic apparatus manufacturing method |
-
1995
- 1995-07-10 JP JP7173143A patent/JPH0927518A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2009158890A (en) * | 2007-12-28 | 2009-07-16 | Fujitsu Ltd | Electronic apparatus manufacturing method |
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