JPH09233501A - Image processor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an image processor able to detect a fault with a simple configuration by detecting the fault based on an output of a phase comparator means that compares a phase of a synchronizing signal separated from a video signal with a phase of a basic clock to provide an output in response to the phase difference. SOLUTION: A synchronizing signal separated from a video signal from a camera 1 by a signal separator means 2 is given to a phase comparator 4, in which the phase of the synchronizing signal is compared with a phase of a basic clock from a voltage controlled oscillator 5 and provided an output of a VCO voltage in response to the phase difference and it is fed to the voltage controlled oscillator 5 and a CPU 7. The voltage controlled oscillator 5 generates the basic clock with a frequency in response to the VCO voltage and feeds back it to the phase comparator 4. When the VCO voltage reaches a voltage at the outside of a prescribed range and a prescribed time elapses, the CPU 7 discriminates it a fault and conducts processing at a synchronizing error. Thus, the image processor is obtained, in which a fault is detected with a simple configuration and normally without mis-detection due to a tentative defect or the like.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image processing device for processing a video signal from a camera.

[0002]

2. Description of the Related Art In order to perform image processing in synchronization with a video signal from a camera, a synchronization signal separated from a video signal is compared with a basic clock and a voltage (hereinafter referred to as VCO voltage) corresponding to a phase difference is compared. A method of generating and controlling the voltage controlled oscillator by this VCO voltage is generally used. An example of this type of device is shown, for example, in Transistor Technology SPECIAL No. 5, page 43, FIG. This is a PLL circuit (corresponding to a phase comparator)
The output signal (corresponding to the VCO voltage) from the VCO circuit is supplied to the VCO circuit (corresponding to the voltage controlled oscillator).
It controls the CO circuit.

[0003]

In the conventional image processing apparatus configured as described above, when a phase shift occurs due to, for example, disconnection of a video signal line or abnormality of circuit components, a correct image processing result can be obtained. Disappear. Therefore, for example, when the image processing apparatus is applied to a vehicle and the preceding vehicle or the white line is recognized, it is difficult to correctly recognize these and difficult to control the vehicle well.

In order to avoid such inconvenience, it is possible to add processing such as credibility determination to the image processing result. However, there is a problem that the process of making the credibility determination complicated and the processing time becomes long, or it may be difficult to make an accurate credibility determination.

The present invention has been made to solve the above problems, and an object of the present invention is to provide an image processing apparatus capable of detecting an abnormality with a simple structure.

Another object of the present invention is to provide an image processing apparatus capable of accurately detecting an abnormality.

[0007]

An image processing apparatus according to the present invention detects a video signal output from a camera and separates a sync signal from the video signal, and a phase separation between the sync signal and a basic clock. Phase comparison means for comparing and generating an output according to the phase difference, an oscillator for receiving an output of the phase comparison means and generating a basic clock having a frequency according to the output, and an abnormality based on the output of the phase comparison means And an abnormality detecting means for detecting.

The image processing apparatus according to the present invention further comprises a judging means for judging whether or not the output of the phase comparing means is within a predetermined range, and a judging means from the time when the output is judged to be outside the predetermined range. A time measuring unit for measuring an elapsed time, and an abnormality detecting unit for detecting an abnormality when a predetermined time has elapsed from the time when the output is determined to be outside the predetermined range.

[0009]

BEST MODE FOR CARRYING OUT THE INVENTION

Embodiment 1. FIG. 1 is a block diagram showing a configuration of the first embodiment. In the figure, 1 is a camera for picking up an image of an object and outputting a video signal including a sync signal and an image signal, 2 is a signal separating means for separating the sync signal and the image signal from the video signal, and 3 is used for image signal processing. It is a timing generating means for generating a basic clock. Reference numeral 4 is a phase comparator as a phase comparison means for generating an output according to the phase difference between the two signals, and 5 is a voltage controlled oscillator as an oscillator for generating a basic clock having a frequency according to the output of the phase comparator 4. . Here, the phase comparator 4 compares the synchronizing signal from the signal separating means 2 with the basic clock from the voltage controlled oscillator 5, and outputs a voltage corresponding to the phase difference, that is, a VCO voltage. This VCO voltage is supplied only to the voltage controlled oscillator in the conventional device, but is supplied to the voltage controlled oscillator 5 and the CPU described later in the first embodiment. In addition, the voltage controlled oscillator 5 uses the V from the phase comparator 4.
A basic clock having a frequency corresponding to the magnitude of the CO voltage is generated, and this basic clock is supplied to the phase comparator 4 and the image signal processing means described later. The phase comparator 4 and the voltage controlled oscillator 5 are included in the timing generation means 3. Reference numeral 6 is an image signal processing means for performing a predetermined signal processing on the image signal in synchronization with the basic clock generated by the timing generation means 3, and 7 is a built-in A / D converter for reading the VCO voltage from the phase comparator 4. Together with the image signal processing means 6
The CPU reads the image signal processing result from the CPU, and comprehensively judges the result and outputs appropriate information. The CPU 7 includes an abnormality detecting means.

FIG. 2 is a flow chart showing the operation of the first embodiment. In step 101, initialization is performed immediately after turning on the power of the apparatus, and initialization of a memory or a counter is performed. In step 102, the VCO voltage from the phase comparator 4 is read into the CPU 7 via the A / D converter. In the following step 103, it is determined whether or not the VCO voltage is within the normal range. This step 103 constitutes a judgment means.

When the device is operating normally, the VCO voltage is a value near a predetermined voltage value corresponding to the center frequency of the video signal. Therefore, the normal range in step 103 is set to a predetermined range centered on the predetermined voltage value.

If the VCO voltage is within the predetermined range in step 103, it is determined to be normal, and step 104
Then, the counter CNT is cleared to 0. If VC
If the O voltage is outside the predetermined range, the routine proceeds to step 105, where the value of the counter CNT is incremented by 1. Step 10
4 or step 106 after the processing of step 105
Proceed to. Here, it is determined whether the value of the counter CNT is a predetermined value A or more. Here, when the value of the counter CNT is equal to or larger than the predetermined value A, it means that the predetermined time has passed since the VCO voltage was out of the predetermined range. Therefore, if it is determined to be normal in step 103, or if it is determined to be abnormal in step 103 but the predetermined time has not yet elapsed, step 106 returns Y.
It is determined to be ES, image recognition processing is performed in step 107, and then the process returns to step 102.

If NO is determined in step 106, it means that the VCO voltage is out of the predetermined range for a predetermined time, and in this case, step 108 is performed.
Proceed to step (5) to perform processing when synchronization is abnormal. In the following step 109, the counter value is fixed at A in order to prevent the counter CNT from overflowing.

The predetermined time from when the VCO voltage is out of the predetermined range until the abnormality is detected is about 1 second, and the predetermined value A is preset with a numerical value corresponding to this. Also, in the flowchart of FIG.
Reference numerals 4, 105 and 106 constitute a time measuring means, and steps 101 to 106 and steps 108, 109 constitute an abnormality detecting means.

Therefore, according to the first embodiment, the abnormality is detected by taking in the VCO voltage, which was an existing signal, into the CPU 7 and determining whether the value is normal or not. The abnormality can be detected with a simple configuration, and the arithmetic processing of the CPU 7 is not significantly burdened.

Further, in the first embodiment, since the VCO voltage becomes abnormal and the state is continued for 1 second to detect the abnormality, the abnormality is not detected due to noise or transient failure. The accurate abnormality can be detected.

Further, since the image recognition processing is performed after it is confirmed that no abnormality has occurred, erroneous image recognition is suppressed.

When an abnormality is detected, the counter C
Since the value of NT is fixed to the predetermined value A, overflow of the counter CNT can be suppressed.

Embodiment 2. In the first embodiment, the phase comparator 4 outputs a voltage according to the phase difference between the two signals. However, the present invention is not limited to this, and a pulse having a time width corresponding to the phase difference between two signals may be output. In short, any device can be used as long as it outputs a signal corresponding to the phase difference between the two signals,
The signal may be monitored to detect an abnormality.

[0020]

As described above, according to the image processing apparatus of the present invention, the abnormality is generated based on the output of the phase comparison means for comparing the phases of the synchronization signal and the basic clock and generating the output corresponding to the phase difference. Since the above is detected, the abnormality can be detected with a simple configuration.

Further, according to the image processing apparatus of the present invention, the judging means for judging whether the output of the phase comparing means is within a predetermined range, and the time when the output is judged to be outside the predetermined range. Since the abnormality is detected when a predetermined time elapses from the time when the output is determined to be outside the predetermined range, it is possible to accurately detect the abnormality. .

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of a first embodiment.

FIG. 2 is a flowchart showing the operation of the first embodiment.

[Explanation of symbols]

1 camera, 2 signal separation means, 3 timing generation means, 4 phase comparator, 5 voltage controlled oscillator, 6 image signal processing device, 7 CPU

Claims (2)

[Claims] 1. A signal separating means for receiving a video signal output from a camera and separating a synchronizing signal from the video signal, and comparing the phases of the synchronizing signal and a basic clock with each other to generate an output according to the phase difference. Image processing including phase comparison means, an oscillator that receives an output of the phase comparison means and generates a basic clock having a frequency corresponding to the output, and an abnormality detection means that detects an abnormality based on the output of the phase comparison means apparatus. 2. The abnormality detecting means measures a judging means for judging whether or not the output of the phase comparing means is within a predetermined range, and an elapsed time from the time when the output is judged to be outside the predetermined range. 2. The image processing apparatus according to claim 1, further comprising a clocking unit for detecting an abnormality when a predetermined time elapses from the time when the output is determined to be outside the predetermined range.