JPH09232395A - Method and device for forming semiconductor carrier density evaluation structure - Google Patents

Abstract

PROBLEM TO BE SOLVED: To form a desired epitaxial layer pattern in a desired position with only one time of growth and to form the evaluation structure of high measurement precision by partially screening the growth surface of a substrate through the use of a metallic mask. SOLUTION: The metallic mask 1 of a high melting point and the low coefficient of thermal expansion, which is opened in the same form as a semiconductor carrier density evaluation pattern, is set just above the surface of the substrate, and the semiconductor carrier density evaluation pattern is formed on the surface of the substrate. The clean surface of the GaAs substrate which is immediately before epitaxial growth is covered by using the metallic mask 1 in which x-formed windows 2 are arranged at the intervals f 1mm, and which is made of materials (Mo and SVS) with thickness less than 1mm, the high melting point and the low coefficient of thermal expansion, for example, or the metallic mask 1 is fixed to a place near the clean surface. Then, the prescribed epitaxial layer structure is formed in a grown chamber and alloy ohmic electrodes of In are generated on the four corners of the x-formed epitaxial layers so as to form the evaluation structure using the Hall effect.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method and apparatus for forming an evaluation structure utilizing the Hall effect for evaluating the film quality of a semiconductor epitaxial growth film.

[0002]

2. Description of the Related Art Generally, a conventional method for forming a semiconductor carrier concentration evaluation structure utilizing the Hall effect for evaluating the film quality of a semiconductor epitaxial growth film (hereinafter referred to as an epitaxial layer) is as follows. First, an epitaxial layer to be evaluated is grown on a semi-insulating semiconductor substrate (hereinafter referred to as a substrate) having a diameter of 3 inches by the MBE method.

Next, in order to examine the in-plane distribution, as shown in FIG. 4, the central portion of the grown wafer 101 is cleaved into a total of nine square evaluation samples 102 in a vertical row and 8 mm square. 103 is an orientation flat (OF)
It is. As shown in FIG. 5A, the surface of each evaluation sample 102 is protected by a resist pattern 104, and the epitaxial film 105 other than the resist pattern 104 is removed by wet etching.

Next, as shown in FIG. 5B, alloy ohmic 107 is formed on the epitaxial film 106 at the four corners.
Then, a sample for measuring the semiconductor carrier concentration using the Hall effect is completed.

[0005]

However, in the above-mentioned conventional method for forming a sample, the steps of resist patterning, wet etching, resist removal, ohmic electrode formation and the like are very troublesome. In addition, since the resist pattern is formed by hand painting, it is difficult to guarantee the symmetry of the pattern, so that the measurement accuracy decreases.

As described above, when the evaluation score is large and the evaluation accuracy is required, the above-mentioned method cannot be said to be a satisfactory method for forming an evaluation structure. The present invention eliminates the above-mentioned problems, and partially shields the growth surface of a substrate by using a metal mask to form a desired epitaxial layer pattern at a desired position with only one growth and perform measurement. An object of the present invention is to provide a highly accurate method of forming a semiconductor carrier concentration evaluation structure and an apparatus for forming the same.

[0007]

In order to achieve the above object, the present invention provides: [1] In a method of forming a semiconductor carrier concentration evaluation structure, an opening having the same shape as a semiconductor carrier concentration evaluation pattern is formed right above a substrate surface. In addition, a step of setting a metal mask having a high melting point and a low coefficient of thermal expansion and a step of forming a semiconductor carrier concentration evaluation pattern on the substrate surface are performed.

Therefore, it is possible to easily obtain a semiconductor carrier concentration evaluation structure utilizing the Hall effect with good pattern symmetry and reproducibility. That is, by using the metal mask to partially shield the growth surface of the substrate, a desired epitaxial layer pattern can be formed at a desired position by only one growth. In addition, when it is necessary to take a large number of samples for examining the in-plane distribution, it can be manufactured efficiently and at low cost.

Further, a high degree of symmetry of the x-shaped evaluation pattern is required for the measurement accuracy of the semiconductor carrier concentration using the Hall effect. The problem of lack of symmetry of the epitaxial layer pattern can be solved. In particular, in the case of examining the in-plane distribution, the manufacturing error of each sample can be minimized and suppressed to the same level, and the evaluation accuracy of the in-plane distribution can be greatly improved.

Further, if an ohmic electrode is attached immediately after the growth of the epitaxial layer, the hole can be evaluated immediately. Therefore, the epitaxial layer is damaged by etching as in the conventional method, the surface modification of the epitaxial layer is caused by the residual resist film, and the epitaxial layer is epitaxially grown. It is possible to eliminate a factor that deteriorates the evaluation accuracy such as an influence at the layer / ohmic interface.

[2] In the method for forming a semiconductor carrier concentration evaluation structure described in [1] above, the semiconductor carrier concentration evaluation pattern has an epitaxial layer structure, and n-
The superlattice layer for x-ray evaluation is sandwiched between the GaAs layer and the p-GaAs buffer layer. In this way, the semiconductor carrier concentration is measured using the Hall effect as an evaluation of the electrical characteristics.
Since an epitaxial layer structure in which an InGaAs / GaAs superlattice layer is inserted is provided between the s layer and the substrate, it is possible to use the Hall effect at the same time as the x-shaped pattern for measuring the semiconductor carrier concentration, and at the same time, the diameter at several points in the plane. A circular pattern of r is formed, and the film thickness of the n-GaAs layer can be accurately grasped by evaluating the InGaAs / GaAs superlattice layer by x-rays through this circular pattern. If the result of this film thickness is used as feedback for the evaluation of the measurement pattern of the semiconductor carrier concentration using the nearby Hall effect, the in-plane evaluation of hole measurement with higher accuracy can be obtained.

[3] In the method of forming a semiconductor carrier concentration evaluation structure according to the above [1], in forming two or more kinds of epitaxial layer structures continuously on the same substrate as the semiconductor carrier concentration evaluation pattern, 1 The substrate is rotated every time the epitaxial layer structure is produced. Therefore, it is not necessary to take out the substrate from the growth chamber, and the semiconductor carrier concentration evaluation epitaxial layer pattern utilizing the Hall effect under two different conditions (different n concentrations) can be continuously grown on the same substrate. Substrate replacement time and chamber vacuuming time are omitted, and there is no change in the chamber atmosphere.
Evaluation of semiconductor carrier concentration using various types of Hall effect Epitaxial layer patterns can be formed. In particular, it is a very convenient and effective method for obtaining a concentration calibration curve using two hole evaluation points.

[4] In the method of forming a semiconductor carrier concentration evaluation structure according to the above [1], in forming two or more types of epitaxial layer structures continuously on the same substrate as the semiconductor carrier concentration evaluation pattern, n-
The metal mask is set on the substrate only when the GaAs layer is grown, and the substrate is rotated after the growth of each n-GaAs layer.

Therefore, since two evaluation points required for the concentration calibration curve can be obtained in the first growth, there is an effect of further shortening the manufacturing time. Further, since the semiconductor carrier concentration evaluation structure utilizing two Hall effects is formed in the same chamber atmosphere (vacuum degree, growth rate, substrate heating, etc.), epitaxial layers having the same film quality can be obtained.

[5] In a method for forming a semiconductor carrier concentration evaluation structure, in the method for forming a semiconductor carrier concentration evaluation structure according to the above [4], a rotary shutter for the metal mask is provided. Therefore, two types of hole evaluation epitaxial layer structures on the same substrate are
It can be grown at the same time by opening and closing the mask shutter.

[0016]

Embodiments of the present invention will be described below in detail with reference to the drawings. 1 is a plan view of a metal mask showing a first embodiment of the present invention, FIG. 2 is an enlarged plan view of a portion A of FIG. 1, and FIG. 3 is a sectional view of an epitaxial layer structure manufactured using the metal mask. is there.

First, as shown in FIG. 1, the x-shaped window 2 has a length of 1 m.
A metal mask 1 made of a material (Mo, SVS) having a thickness of 1 mm or less, a high melting point, and a low thermal expansion coefficient, which are arranged at m intervals, is used to cover a clean surface of a GaAs substrate immediately before epitaxial growth. Alternatively, the metal mask 1 is fixed near a clean surface. Then, an epitaxial layer structure is formed in the growth chamber.

That is, as shown in FIG. 3, the epitaxial layer structure 10 comprises an undoped GaA having a thickness of 1000Å to 5000Å on a substrate 11 (GaAs substrate wafer).
s buffer layer 12 having a thickness of 1000Å to 15000Å,
n-type impurity concentration is 1 × 10 ¹⁸ cm ^{−3 to} 5 × 10 ¹⁶ cm ⁻³
N-GaAs layer 13 having a thickness of 1000Å to 2000Å
The crystal growth of the undoped GaAs cap layer 14 is sequentially performed.

Then, an epitaxial layer (epitaxial film) having the same shape as the window is formed at the position of the x-shaped window on the GaAs substrate.
Is obtained. Next, similarly to the conventional method, by forming In alloy ohmic electrodes on four corners of each x-type epitaxial layer, an evaluation structure for measuring the semiconductor carrier concentration using the Hall effect can be formed. .

As described above, according to the first embodiment, as a method for obtaining a sample for evaluating the semiconductor carrier concentration utilizing the Hall effect with good pattern symmetry and reproducibility, the metal mask is used as described above. By partially shielding the growth surface of the substrate, a desired epitaxial layer pattern can be formed at a desired position with only one growth.

Therefore, complicated processing steps for the epitaxial layer such as cleavage of the epitaxial substrate, partial protection of the required epitaxial layer by a hand-painted resist, removal of the extra epitaxial layer by etching, removal of the resist of the protective layer, etc. are required. It can be simplified.
Therefore, when it is necessary to take a large number of samples for examining the in-plane distribution, it can be manufactured efficiently and at low cost.

Further, the measurement accuracy of the semiconductor carrier concentration using the Hall effect requires a high degree of symmetry of the x-shaped evaluation pattern, but if the method of this embodiment is used,
It is possible to solve the problem of lack of symmetry of the epitaxial layer pattern, which is conventionally secured by hand coating. In particular, when examining the in-plane distribution, the manufacturing error of each sample can be minimized to the same level, and the evaluation accuracy of the in-plane distribution can be greatly improved.

Further, in this embodiment, after the epitaxial layer is grown, if the ohmic electrode is attached in the "as-grown" state, the hole can be evaluated immediately. It is possible to eliminate factors that deteriorate the evaluation accuracy such as surface modification of the epitaxial layer due to the residual film and influence at the epitaxial layer / ohmic interface.

FIG. 6 is a plan view showing a metal mask showing a second embodiment of the present invention, and FIG. 7 is a sectional view of an epitaxial layer structure manufactured using the metal mask. First, FIG.
As shown in FIG. 3, a new circular window 21 having a diameter r (1 cm ≦ r ≦ 3 cm) is newly formed on the metal mask 1 used in the first embodiment.
The metal mask 1 provided with n (1 ≦ n ≦ 4) is coated on the clean surface of the substrate immediately before the growth. Alternatively, the metal mask 1 is fixed near a clean surface. Then, an epitaxial layer structure is formed in the growth chamber.

That is, as shown in FIG. 7, the epitaxial layer structure 30 is formed on a substrate (GaAs substrate wafer) 31 on an undoped GaAs layer having a thickness of 500Å to 2000Å.
Buffer layer 32, In having a thickness of 2000Å to 3000Å
GaAs / GaAs superlattice layer [(InxGa _1-x As)
m / (GaAs) n × T; x = 0.15 to 0.2, m≈
8Å, n≈165Å, T = 15 to 25 cycles] 33, an undoped GaAs spacer layer 34 having a thickness of 1000Å to 5000Å, a thickness of 1000Å to 15000Å, and an n-type impurity concentration of 1 × 10 ¹⁸ cm ^{−3 to} 5 × 10 ¹⁶ cm ^{-3 nG}
An aAs layer 35 and an undoped GaAs cap layer 36 having a thickness of 1000Å to 2000Å are sequentially grown. Next, as in the first embodiment, an ohmic electrode is attached to form a semiconductor carrier concentration evaluation structure (evaluation pattern) using the Hall effect.

As described above, according to the second embodiment, I is provided between the n-GaAs layer and the substrate where the semiconductor carrier concentration is measured by utilizing the Hall effect as an evaluation of the electrical characteristics.
Since the layer structure in which the nGaAs / GaAs superlattice layer is inserted is provided, at the same time as the x-shaped pattern for measuring the semiconductor carrier concentration using the Hall effect, a circular pattern having a diameter r is formed at several points in the plane. The film thickness of the n-GaAs layer can be accurately grasped by evaluating the InGaAs / GaAs superlattice layer by x-ray through the circular pattern. If the result of this film thickness is used as feedback for the evaluation of the measurement pattern of the semiconductor carrier concentration using the nearby Hall effect, the in-plane evaluation of hole measurement with higher accuracy can be obtained.

FIG. 8 is a plan view of the epitaxial layer pattern manufacturing process showing the third embodiment of the present invention. First, FIG.
As shown in FIG. 8A, a metal mask 41 having nine x-shaped windows 42 for measuring the semiconductor carrier concentration using the Hall effect and two circular windows 43 for x-ray measurement is shown in FIG.
As shown in (b), the epitaxial layer structure 30 shown in FIG. 7 is grown for the first time by fixing the substrate (GaAs substrate wafer) 51 immediately before formation at a position close to above the clean surface. 52 is an orientation flat (OF).

Then, as shown in FIG. 8C, the substrate 5 is rotated by the substrate rotating device while the metal mask 41 is fixed.
Only 1 is rotated by 90 °, and the second growth is performed with the n-GaAs layer having an impurity concentration different from that of the first growth. Then, as shown in FIG. 8D, if the substrate 51 is taken out from the growth chamber and ohmic electrodes are attached to all the x-shaped patterns 53 and 54 as in the first embodiment, the semiconductor carrier concentration utilizing the Hall effect is increased. An evaluation structure for evaluation (evaluation patterns A, B, C, D) is formed.

As described above, according to the third embodiment, it is not necessary to take out the substrate from the growth chamber, and two substrates can be formed on the same substrate.
Evaluation of semiconductor carrier concentration using the Hall effect under three different conditions (different n concentrations) Since the epitaxial layer pattern can be continuously grown, the substrate replacement time and the chamber vacuuming time are omitted, and It is possible to form an epitaxial layer pattern for evaluating semiconductor carrier concentration using two types of Hall effect having different n concentrations within an extremely short time without changing the chamber atmosphere. In particular, it is a very convenient and effective method for obtaining a concentration calibration curve by using two hole evaluation points.

Further, since the semiconductor carrier concentration evaluation structure utilizing the two Hall effects is formed on the same substrate, it leads to the saving of an expensive substrate and the shortening of the pre-growth process. Moreover, if the evaluation structure is on the same substrate, it is considered that there is no difference in the influence of the substrates on the electrical characteristics, and the evaluation accuracy can be improved. Further, the x-ray evaluation patterns A and B are used to evaluate the semiconductor carrier concentration using the Hall effect of the first growth, and the x-ray evaluation patterns C and
D is used as the film thickness evaluation structure for the hole evaluation of the second growth, and the evaluation accuracy can be improved as in the second embodiment.

FIG. 9 is a manufacturing process diagram of an epitaxial layer pattern showing a fourth embodiment of the present invention, and FIG. 10 shows a growth apparatus used for manufacturing the epitaxial layer pattern. FIG.
0, a substrate 71 having a rotatable mechanism 82 is set in the growth device 81, and a substrate heating device 83 is installed corresponding to the substrate 71. The heating state is detected by the thermocouple 84 and the temperature is controlled.

Further, the metal mask 61 has an opening / closing mechanism 85 (main shutter) capable of rotating the horizontal plane by 90 ° or more. The molecular beam sources 86 and 87 also have shutters 88 and
89 is installed. Further, thermocouples 90 and 91 are arranged in the molecular beam sources 86 and 87, respectively. Reference numeral 92 is a viewport capable of monitoring the growth state in the growth apparatus.
Therefore, first, a metal mask 61 as shown in FIG.
Is placed near the upper surface of the clean surface of the substrate (GaAs substrate) immediately before growth.

With the mask shutter opened from the beginning (the mask is away from the linear axis connecting the substrate and the cell), as shown in FIG. 9B, an undoped GaAs buffer layer 72 is formed on the substrate 71. InGaAs / GaAs
The superlattice layer 73 is sequentially grown, then the mask shutter is closed, and the first n-GaAs (for example, n = 1 × 10 ^{18) is formed.}
The cm ⁻³ ) layer 74 is grown.

Thereafter, as shown in FIG. 9C, the substrate 71 is rotated by 90 ° while the mask shutter is closed, and n-GaAs (for example, n =
A 2 × 10 ¹⁷ cm ⁻³ ) layer 75 is grown. Next, the mask shutter is opened again, and the undoped GaAs cap layer 76 is attached to the surface as shown in FIG.

Similar to the above, if electrodes (not shown) are attached, an epitaxial layer structure for measuring the semiconductor carrier concentration using the Hall effect is formed. As described above, according to the fourth embodiment, it is possible to simultaneously grow two types of hole evaluation epitaxial layer structures on the same substrate by opening and closing the mask shutter. Since two evaluation points required for the concentration calibration curve can be obtained by one-time growth, there is an effect of further shortening the production time.

Since the semiconductor carrier concentration evaluation structure utilizing the two Hall effects is formed in the same chamber atmosphere (vacuum degree, growth rate, substrate heating, etc.), epitaxial layers having the same film quality can be obtained. This allows the concentration calibration curve to be obtained more accurately. It should be noted that the present invention is not limited to the above embodiments, and various modifications are possible based on the gist of the present invention, and they are not excluded from the scope of the present invention.

[0037]

As described above, according to the present invention, the following effects can be obtained. [1] According to the first aspect of the present invention, it is possible to easily obtain a semiconductor carrier concentration evaluation structure utilizing the Hall effect with good pattern symmetry and reproducibility. That is, by using the metal mask to partially shield the growth surface of the substrate, a desired epitaxial layer pattern can be formed at a desired position by only one growth.

Further, when it is necessary to take a large number of samples for examining the in-plane distribution, it can be manufactured efficiently and at low cost. Further, the semiconductor carrier concentration measurement accuracy using the Hall effect requires a high degree of symmetry of the x-shaped evaluation pattern. The problem of lack of symmetry can be solved.
In particular, in the case of examining the in-plane distribution, the manufacturing error of each sample can be minimized and suppressed to the same level, and the evaluation accuracy of the in-plane distribution can be greatly improved.

Further, since hole evaluation can be performed immediately by attaching an ohmic electrode immediately after the growth of the epitaxial layer, the epitaxial layer is damaged by etching as in the conventional method, the surface modification of the epitaxial layer is caused by the residual resist film, and the epitaxial layer is epitaxially grown. It is possible to eliminate a factor that deteriorates the evaluation accuracy such as an influence at the layer / ohmic interface.

[2] According to the invention described in claim 2, between the n-GaAs layer and the substrate where the semiconductor carrier concentration is measured by utilizing the Hall effect as an evaluation of the electrical characteristics, I
Since the epitaxial layer structure in which the nGaAs / GaAs superlattice layer is inserted is provided, a circular pattern having a diameter r is formed at several points in the plane at the same time as the x-shaped pattern for measuring the semiconductor carrier concentration using the Hall effect. InGaAs / GaAs by x-ray through circular pattern
The film thickness of the n-GaAs layer can be accurately grasped by evaluating the superlattice layer. If the result of this film thickness is used as feedback for the evaluation of the measurement pattern of the semiconductor carrier concentration using the nearby Hall effect, the in-plane evaluation of hole measurement with higher accuracy can be obtained.

[3] According to the third aspect of the present invention, it is not necessary to take out the substrate from the growth chamber, and the semiconductor carrier concentration using the Hall effect under two different conditions (different n concentrations) on the same substrate. Since it is possible to continuously grow the epitaxial layer pattern, it is possible to omit the substrate replacement time and the chamber vacuum evacuation time, and the chamber atmosphere does not change. Evaluation of semiconductor carrier concentration using various types of Hall effect Epitaxial layer patterns can be formed. In particular, it is a very convenient and effective method for obtaining a concentration calibration curve using two hole evaluation points.

Further, since the structure for evaluating the semiconductor carrier concentration utilizing the two Hall effect is formed on the same substrate, the expensive substrate can be saved and the process of the growth pretreatment can be shortened. . Moreover, if the evaluation structure is on the same substrate, it is considered that there is no difference in the influence of the substrates on the electrical characteristics, and the evaluation accuracy can be improved.

Further, the x-ray evaluation patterns A and B are used for the evaluation of the semiconductor carrier concentration using the Hall effect of the first growth, and the x-ray evaluation patterns C and D are the hole evaluation of the second growth, respectively, as a film thickness evaluation structure. It is used, and the evaluation accuracy can be improved as in the second embodiment. [4] According to the invention of claim 4, two evaluation points required for the concentration calibration curve can be obtained in the first growth.
This has the effect of further shortening the manufacturing time.

Since the semiconductor carrier concentration evaluation structure utilizing the two Hall effects is formed in the same chamber atmosphere (vacuum degree, growth rate, substrate heating, etc.), epitaxial layers having the same film quality can be obtained. This allows the concentration calibration curve to be obtained more accurately. [5] According to the invention of claim 5, two types of hole evaluation epitaxial layer structures on the same substrate can be grown simultaneously by opening and closing a mask shutter.

[Brief description of drawings]

FIG. 1 is a plan view of a metal mask showing a first embodiment of the present invention.

FIG. 2 is an enlarged plan view of a portion A in FIG.

FIG. 3 is a sectional view of an epitaxial layer structure manufactured using a metal mask showing a first embodiment of the present invention.

FIG. 4 is an explanatory view (No. 1) of a conventional method for forming a semiconductor carrier concentration evaluation structure.

FIG. 5 is an explanatory view (No. 2) of the conventional method for forming the semiconductor carrier concentration evaluation structure.

FIG. 6 is a plan view of a metal mask showing a second embodiment of the present invention.

FIG. 7 is a cross-sectional view of an epitaxial layer structure manufactured using a metal mask showing a second embodiment of the present invention.

FIG. 8 is a plan view of the manufacturing process of the epitaxial layer pattern showing the third embodiment of the present invention.

FIG. 9 is a manufacturing process drawing of an epitaxial layer pattern showing a fourth embodiment of the present invention.

FIG. 10 is a configuration diagram of an epitaxial layer pattern growth apparatus showing a fourth embodiment of the present invention.

[Explanation of symbols]

 1, 41, 61 Metal mask 2, 42 x-type window 10, 30, 42 Epitaxial layer structure 11, 31, 51, 71 Substrate 12, 32, 72 Undoped GaAs buffer layer 13, 35, 74, 75 n-GaAs layer 14 , 36,76 undoped GaAs cap layer 21,43 circular window 32 undoped GaAs buffer layer 33,73 InGaAs / GaAs superlattice layer 34 undoped GaAs spacer layer 35 n-GaAs layer 53,54 x-shaped pattern 76 undoped GaAs cap layer 81 growth Device 82 Rotatable mechanism 83 Substrate heating device 84, 90, 91 Thermocouple 85 Rotatable opening / closing mechanism (main shutter) 86, 87 Molecular beam source 88, 89 Shutter 92 Viewport

Claims (5)

[Claims] 1. A method of forming a semiconductor carrier concentration evaluation structure, comprising the step of: (a) setting a metal mask having a high melting point and a low coefficient of thermal expansion, which is opened in the same shape as the semiconductor carrier concentration evaluation pattern, directly above the substrate surface; (B) a step of forming a semiconductor carrier concentration evaluation pattern on the surface of the substrate, and a step of forming a semiconductor carrier concentration evaluation structure. 2. The method for forming a semiconductor carrier concentration evaluation structure according to claim 1, wherein the semiconductor carrier concentration evaluation pattern has an epitaxial layer structure, and n-GaA is used.
A method of forming a semiconductor carrier concentration evaluation structure, which has a structure in which a superlattice layer for x-ray evaluation is sandwiched between an s layer and a p-GaAs buffer layer. 3. The method for forming a semiconductor carrier concentration evaluation structure according to claim 1, wherein the semiconductor carrier concentration evaluation pattern is formed once when two or more types of epitaxial layer structures are continuously formed on the same substrate. A method for forming a semiconductor carrier concentration evaluation structure, characterized in that the substrate is rotated each time an epitaxial layer structure is produced. 4. The method of forming a semiconductor carrier concentration evaluation structure according to claim 1, wherein, as the semiconductor carrier concentration evaluation pattern, two or more kinds of epitaxial layer structures are continuously formed on the same substrate, each of n− GaA
A method of forming a semiconductor carrier concentration evaluation structure, wherein the metal mask is set on the substrate only when the s layer is grown, and the substrate is rotated after the growth of each n-GaAs layer. 5. A semiconductor carrier concentration evaluation structure forming apparatus according to claim 4, wherein a rotating shutter for the metal mask is provided in the method for forming a semiconductor carrier concentration evaluation structure according to claim 4. Forming equipment.