JPH09232308A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

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Publication number
JPH09232308A
JPH09232308A JP3522696A JP3522696A JPH09232308A JP H09232308 A JPH09232308 A JP H09232308A JP 3522696 A JP3522696 A JP 3522696A JP 3522696 A JP3522696 A JP 3522696A JP H09232308 A JPH09232308 A JP H09232308A
Authority
JP
Japan
Prior art keywords
gas
substrate
insulating film
siof
fluorine
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP3522696A
Other languages
Japanese (ja)
Other versions
JP3641866B2 (en
Inventor
Junichi Sato
淳一 佐藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP03522696A priority Critical patent/JP3641866B2/en
Publication of JPH09232308A publication Critical patent/JPH09232308A/en
Application granted granted Critical
Publication of JP3641866B2 publication Critical patent/JP3641866B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Chemical Vapour Deposition (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Formation Of Insulating Films (AREA)

Abstract

PROBLEM TO BE SOLVED: To form a silicon oxide based insulating film with a practical deposition rate which film is free from contamination and contains fluorine, by using a CVD method material gas whose main component is compound composed of silane based gas, oxidizing gas, rare gas atoms and fluorine atoms. SOLUTION: A substrate 11 to be treated is constituted by forming a wiring layer 3 composed of Al based metal constituted of line and space of specified width, on an interlayer insulating film 2 on a semiconductor substrate 1 of Si or the like. The substrate 11 is mounted on the stage of a CVD equipment. A silicon oxide based insulating film(SIOF) containing fluorine is formed on the substrate 11 to be treated, by a CVD method using material gas whose main component is compound composed of silane based gas, oxydizing gas, rare gas atoms and fluorine atoms. Thereby an interlayer insulating film 4 is formed with a practical deposition rate which film is excellent in step coverage and composed of SiOF free from contamination of carbon and sulfur.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明の属する技術分野】本発明は半導体装置の製造方
法に関し、さらに詳しくは、フッ素を含む低誘電率の酸
化シリコン系絶縁膜を形成する工程を有する半導体装置
の製造方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device, and more particularly, to a method of manufacturing a semiconductor device having a step of forming a low dielectric constant silicon oxide insulating film containing fluorine.

【0002】[0002]

【従来の技術】LSI等の半導体装置の高集積化が進展
するに伴い、多層配線構造においては同一配線層内の隣
り合う配線間の層間絶縁膜の幅が狭まるとともに、異な
る配線層間の層間絶縁膜の厚さも薄くなっている。かか
る配線間隔の縮小により、配線間容量の上昇が問題とな
りつつある。このため半導体装置の実動作速度は1/K
(Kは縮小率)のスケーリング則に合わなくなり、高集
積化のメリットを充分に享受することができない。配線
間容量の上昇防止は、高集積度半導体装置の高速動作、
低消費電力および低発熱等の諸要請に応えるためには、
是非とも解決しなければならない要素技術の1つであ
る。
2. Description of the Related Art With the progress of high integration of semiconductor devices such as LSI, in a multi-layer wiring structure, the width of an interlayer insulating film between adjacent wirings in the same wiring layer is narrowed, and the interlayer insulation between different wiring layers is also increased. The film is also thin. Due to the reduction of the wiring interval, an increase in inter-wiring capacitance is becoming a problem. Therefore, the actual operating speed of the semiconductor device is 1 / K
Since the scaling rule of (K is a reduction ratio) is not met, the merit of high integration cannot be fully enjoyed. Preventing the increase in inter-wiring capacitance is for high-speed operation of highly integrated semiconductor
To meet various demands such as low power consumption and low heat generation,
It is one of the elemental technologies that must be resolved by all means.

【0003】高集積度半導体装置の配線間容量の低減方
法として、例えば特開昭63−7650号公報に開示さ
れているように、低誘電率材料の層間絶縁膜への採用が
有効である。低誘電率材料としては、フッ素を含む酸化
シリコン系絶縁膜(以下SiOFと記す)等の無機系材
料が代表的であるが、この他にもシロキサン結合を有す
る有機SOG(Spin On Glass)、ポリイ
ミド、ポリパラキシリレン(商品名パリレン)、ポリナ
フタレン等の有機高分子材料や、フレア(アライドシグ
ナル社商品名)あるいはパーフルオロ基含有ポリイミド
やフッ化ポリアリルエーテル等のフッ素樹脂系の有機高
分子材料がある。これら低誘電率材料については、例え
ば日経マイクロデバイス誌1995年7月号p.105
に紹介されている。
As a method of reducing the capacitance between wirings of a highly integrated semiconductor device, for example, as disclosed in Japanese Patent Application Laid-Open No. 63-7650, it is effective to use a low dielectric constant material for an interlayer insulating film. As the low dielectric constant material, an inorganic material such as a silicon oxide insulating film containing fluorine (hereinafter referred to as SiOF) is representative, but in addition to this, an organic SOG (Spin On Glass) having a siloxane bond, polyimide , Polyparaxylylene (trade name parylene), polynaphthalene and other organic polymer materials, flare (trade name of Allied Signal Co.), perfluoro group-containing polyimide, fluororesin organic polymers such as fluorinated polyallyl ether There is material. For these low dielectric constant materials, see, for example, Nikkei Microdevice Magazine, July 1995 issue, p. 105
Has been introduced.

【0004】これら比誘電率が3.5以下の低誘電率材
料層を、隣り合う配線間はもとより、異なるレベルの配
線層間にも適用し、しかも低誘電率材料層をSiO
2 (比誘電率4)、SiON(比誘電率4〜6)やSi
3 4 (比誘電率6)等の膜質に優れた絶縁膜により挟
み込む構造の積層絶縁膜を、本願出願人は特願平7−3
727号明細書に提案し、低誘電率と高信頼性を合わせ
持つ層間絶縁膜を有する半導体装置の可能性を示した。
[0004] These low dielectric constant material layers having a relative dielectric constant of 3.5 or less are applied not only between adjacent wirings but also between wiring layers of different levels.
2 (dielectric constant 4), SiON (dielectric constant 4 to 6), Si
The applicant of the present invention applied for a laminated insulating film having a structure sandwiched between insulating films having excellent film quality such as 3 N 4 (relative dielectric constant 6) by the applicant of the present invention.
No. 727, the possibility of a semiconductor device having an interlayer insulating film having both low dielectric constant and high reliability was shown.

【0005】低誘電率材料のうち、SiOFはその成膜
プロセスがSiO2 等従来の無機系層間絶縁膜の成膜プ
ロセスと整合性があることから、現用の製造設備でも容
易に採用できるので注目されている。すなわち、一般的
には特開平6−333919号公報に開示されているよ
うに、酸化シリコン系絶縁膜を形成するSiH4 等の原
料ガスをSiF4 等のフルオロシラン系ガスに変更して
CVDを施すことによりSi−F結合を酸化シリコン系
絶縁膜中に取り込み、SiOFを形成することができ
る。しかしながらSiF4 はプラズマ中での解離率が小
さいことから、Si−F結合を充分に取り込むことは困
難である。
Of the low dielectric constant materials, SiOF has attracted attention because its film formation process is compatible with the film formation process of conventional inorganic interlayer insulating films such as SiO 2, and can be easily adopted even in current production equipment. Have been. That is, generally, as disclosed in Japanese Patent Laid-Open No. 6-333919, the source gas such as SiH 4 for forming the silicon oxide based insulating film is changed to a fluorosilane based gas such as SiF 4 to perform the CVD. By doing so, Si—F bonds can be incorporated into the silicon oxide insulating film to form SiOF. However, since SiF 4 has a small dissociation rate in plasma, it is difficult to sufficiently incorporate Si—F bonds.

【0006】一方、NH3 等の塩基性ガスを添加してプ
ラズマ中の原料ガスの解離を促進する方法を本願出願人
は特開平6−295907号公報に開示した。この方法
によれば、酸化シリコン系絶縁膜中の水酸基濃度の低減
に卓越した効果が見られるが、比誘電率低減の効果は少
ない。
On the other hand, the applicant of the present application disclosed a method of adding a basic gas such as NH 3 to accelerate the dissociation of the raw material gas in the plasma in Japanese Patent Laid-Open No. 6-295907. According to this method, an excellent effect can be seen in reducing the hydroxyl group concentration in the silicon oxide-based insulating film, but the effect of reducing the relative dielectric constant is small.

【0007】またフッ素原子の供給源として、例えば特
開平7−90589号公報に開示されているようにCF
4 やC2 6 等のフッ化炭素系ガスを採用すれば比誘導
率低減の効果は得られるものの、炭素原子の混入による
コンタミネーションの問題が残る。
As a source of fluorine atoms, for example, as disclosed in JP-A-7-90589, CF
If a fluorocarbon-based gas such as 4 or C 2 F 6 is used, the effect of reducing the specific inductivity can be obtained, but the contamination problem due to the mixing of carbon atoms remains.

【0008】そこで、SF6 ガスをフッ素原子の供給源
としてCVDの反応系から不要な炭素原子を排除する試
みが、第56回応用物理学会学術講演会(1995年秋
季年会)講演予稿集p590、講演番号26p−ZB−
2に報告されている。これは、TEOS(Tetra
Ethyl Ortho Silicate)と酸化剤
とを原料ガスとし、これにSF6 を添加したプラズマC
VDによりSiOFを形成するものである。この結果、
比誘導率は3.3に迄低下する。しかしながら、SF6
の解離によりプラズマ中に大量に発生するF* (Fラジ
カル)によるエッチング反応が堆積と競合して発生する
ために、デポジションレートが飽和する現象やイオウに
よるコンタミネーションの問題が見られる。
Therefore, an attempt to eliminate unnecessary carbon atoms from the CVD reaction system by using SF 6 gas as a source of fluorine atoms has been conducted in the proceedings of the 56th Annual Meeting of the Society of Applied Physics (Autumn Annual Meeting 1995) p590. , Presentation number 26p-ZB-
2 reported. This is TEOS (Tetra
And from Ethyl Ortho Silicate) and an oxidizing agent as a raw material gas, was added to SF 6 to the plasma C
SiOF is formed by VD. As a result,
The specific induction rate drops to 3.3. However, SF 6
Since a large amount of F * (F radicals) is generated in the plasma due to the dissociation of Al, an etching reaction occurs in competition with the deposition, so that the phenomenon that the deposition rate is saturated and the contamination by sulfur are seen.

【0009】[0009]

【発明が解決しようとする課題】本発明は上述した従来
技術の問題点に鑑み、フッ素を含む低誘電率の酸化シリ
コン系絶縁膜を形成する工程を有する半導体装置の製造
方法であって、誘導率が充分に低減され、しかも添加ガ
スによるコンタミネーションのない、フッ素を含む酸化
シリコン系絶縁膜を形成する工程を有する半導体装置の
製造方法を提供することを課題とする。
SUMMARY OF THE INVENTION In view of the above-mentioned problems of the prior art, the present invention is a method of manufacturing a semiconductor device including a step of forming a low dielectric constant silicon oxide insulating film containing fluorine. An object of the present invention is to provide a method of manufacturing a semiconductor device having a step of forming a silicon oxide-based insulating film containing fluorine that has a sufficiently reduced rate and is free from contamination by an added gas.

【0010】[0010]

【課題を解決するための手段】本発明の半導体装置の製
造方法は、上述の課題を解決するために提案するもので
あり、シラン系ガス、酸化性ガス、および希ガス原子と
フッ素原子から構成される化合物を主体とする原料ガス
を用いたCVD法により、被処理基板上にフッ素を含む
酸化シリコン系絶縁膜を形成する工程を有することを特
徴とする。
A method of manufacturing a semiconductor device of the present invention is proposed to solve the above-mentioned problems, and is composed of a silane-based gas, an oxidizing gas, and a rare gas atom and a fluorine atom. The method is characterized by including a step of forming a silicon oxide insulating film containing fluorine on the substrate to be processed by a CVD method using a source gas mainly containing the compound described above.

【0011】本発明で採用する希ガス原子とフッ素原子
から構成される化合物は、ArF、KrF、XeF2
よびNeF等が例示される。これらのガスは周知のよう
に、少なくともいずれか一方が励起状態の希ガスとF2
との結合により得られる化合物であり、この他にもXe
4 、XeF6 、KrF2 等が知られているが、これら
の化合物を採用してもよい。シラン系ガスとしては、無
機シラン系ガスおよび有機シラン系ガスのうちのいずれ
でもい。本発明の一実施態様においては、被処理基板に
超音波を印加しつつ、フッ素を含む酸化シリコン系絶縁
膜を形成することが望ましい。
Examples of the compound composed of a rare gas atom and a fluorine atom used in the present invention include ArF, KrF, XeF 2 and NeF. As is well known, these gases include rare gas and F 2 which are excited in at least one of them.
It is a compound obtained by binding to
F 4 , XeF 6 , KrF 2 and the like are known, but these compounds may be adopted. The silane-based gas may be either an inorganic silane-based gas or an organic silane-based gas. In one embodiment of the present invention, it is desirable to form a silicon oxide-based insulating film containing fluorine while applying ultrasonic waves to a substrate to be processed.

【0012】次に作用の説明に移る。本発明において
は、SiOFのCVD法による成膜おけるフッ素供給源
ガスとして、コンタミネーションとなる元素を含まず、
プラズマ中での解離にも優れたフッ素化合物として、希
ガス原子とフッ素原子から構成される化合物を採用す
る。Ar、KrあるいはXe等の希ガスは不活性元素で
あり、炭素やイオウ等の活性元素と異なりSiOF中に
取り込まれる虞れは少ない。またこれらのフッ素化合物
1分子あたり供給されるフッ素系化学種の量は、フッ素
原子に換算して1原子あるいは2原子であるので、SF
6 の場合のように過剰のF* によりエッチング反応が進
みデポジションレートが飽和することはない。
Next, the operation will be described. In the present invention, the fluorine supply source gas in the film formation by the CVD method of SiOF does not contain an element which becomes contamination,
As a fluorine compound which is also excellent in dissociation in plasma, a compound composed of a rare gas atom and a fluorine atom is adopted. Noble gases such as Ar, Kr, and Xe are inert elements, and unlike active elements such as carbon and sulfur, they are less likely to be incorporated into SiOF. Further, since the amount of the fluorine-based chemical species supplied per molecule of these fluorine compounds is 1 atom or 2 atoms in terms of fluorine atom, SF
As in the case of 6 , the excess F * does not promote the etching reaction and saturate the deposition rate.

【0013】さらに、CVD反応系に超音波振動を印加
することにより、被処理基板の振動エネルギや、原料ガ
ス分子の並進ないしは回転等の振動エネルギレベルが高
まり、原料ガスの解離反応や、中間生成物の被処理基板
上でのマイグレーションが活性化される。このため、従
来より低温でも効率良く、ステップカバレッジのよい成
膜が可能となる。
Further, by applying ultrasonic vibration to the CVD reaction system, the vibration energy of the substrate to be processed and the vibration energy level such as translation or rotation of the raw material gas molecules are increased, and the dissociation reaction of the raw material gas and intermediate generation Migration of an object on a substrate to be processed is activated. For this reason, it is possible to efficiently form a film with good step coverage even at a lower temperature than before.

【0014】これらの作用により、コンタミネーション
のないSiOFを実用的なデポジションレートで形成す
ることが可能となる。
Due to these actions, it is possible to form SiOF without contamination at a practical deposition rate.

【0015】なお、本発明に類似の先願として、基板支
持具あるいは反応空間に超音波振動を印加しつつSiO
2 膜を形成する方法が特開平5−44037号公報に開
示されている。これはO3 /TEOS系による熱分解C
VDによるものであり、またコンタミネーションのない
低誘電率の酸化シリコン系絶縁膜形成については、具体
的な記述は見当たらない。
As a prior application similar to the present invention, SiO 2 is applied while applying ultrasonic vibration to the substrate support or the reaction space.
A method for forming two films is disclosed in Japanese Patent Application Laid-Open No. 5-44037. This is the thermal decomposition C by O 3 / TEOS system.
No specific description can be found for the formation of a low dielectric constant silicon oxide-based insulating film due to VD and without contamination.

【0016】[0016]

【実施例】以下、本発明の具体的実施例につき図面を参
照しながら説明する。始めに本発明の各実施例で一例と
して用いる枚葉式プラズマCVD装置の構成例および動
作につき、図2に示す概略断面図を参照して説明する。
Embodiments of the present invention will be described below with reference to the drawings. First, a configuration example and operation of a single-wafer plasma CVD apparatus used as an example in each embodiment of the present invention will be described with reference to a schematic sectional view shown in FIG.

【0017】図2に示す装置は、その基本構成は平行平
板型プラズマCVD装置である。すなわち、SiOFを
形成すべき被処理基板11は、ヒータ13を内蔵する接
地電位の基板ステージ12上にセッティングする。ガス
導入孔16に導入する原料ガスは、ガス拡散板15で拡
散され、被処理基板11に対向して多孔板状のガス吹き
出し孔を有するガスシャワーヘッド14を経由して被処
理基板11表面に均一に噴出する。符号17は被処理基
板の外周上面に配設したガスリングであり多数のガス噴
出孔をもつ中空円環状のノズル部材であり、必要に応じ
て原料ガスの1部や、希釈ガス等を添加するものであ
る。符号18は図示しない真空ポンプに接続されたガス
排出孔、符号19は上部電極を兼ねるガスシャワーヘッ
ド14にRFパワーを供給するRF電源である。なおガ
スシャワーヘッド14と基板ステージ12の上下関係を
逆にした構成、すなわち被処理基板11を下向きに背面
保持するフェースダウン構成とすれば、被処理基板11
表面へのパーティクル付着が防止される。
The apparatus shown in FIG. 2 has a basic configuration of a parallel plate type plasma CVD apparatus. That is, the substrate 11 on which SiOF is to be formed is set on the substrate stage 12 having a built-in heater 13 at a ground potential. The raw material gas introduced into the gas introduction holes 16 is diffused by the gas diffusion plate 15, and passes through the gas shower head 14 having a perforated plate-shaped gas blowout hole facing the substrate 11 to be processed. Spouts evenly. Reference numeral 17 denotes a gas ring disposed on the outer peripheral upper surface of the substrate to be processed, which is a hollow annular nozzle member having a large number of gas ejection holes, and a part of the raw material gas, a diluent gas or the like is added as necessary. It is a thing. Reference numeral 18 denotes a gas exhaust hole connected to a vacuum pump (not shown), and reference numeral 19 denotes an RF power supply for supplying RF power to the gas shower head 14 also serving as an upper electrode. If the vertical relationship between the gas shower head 14 and the substrate stage 12 is reversed, that is, if the face-down structure in which the substrate 11 to be processed is held downward on the back surface, the substrate 11 to be processed is
Particles are prevented from adhering to the surface.

【0018】本プラズマCVD装置の特徴部分は、超音
波振動印加手段20A、20Bおよび20Cである。こ
のうち、超音波振動印加手段20Aは基板ステージ12
内に組み込み、被処理基板11を直接に励振するもので
ある。超音波振動印加手段20Bは、ガス拡散板15に
組み込み、ガスシャワーヘッド14から噴出する原料ガ
スを励振する。超音波振動印加手段20Bはガスシャワ
ーヘッド14やガス導入孔16、あるいはガスリング1
7に取りつけてもよい。また超音波振動印加手段20C
はCVDチャンバ内壁に取りつけ、被処理基板11上面
の原料ガスを励振するものである。超音波振動印加手段
20Cは、被処理基板11近傍の原料ガスを効果的に励
振するため、ホーンを取りつけ超音波の指向性を高めて
いる。これはスピーカシステムにおけるホーンツィータ
のごときものである。超音波振動印加手段20Cは、エ
ッチングチャンバ内壁に複数個取りつけることが望まし
い。超音波振動印加手段としては、圧電素子、磁歪素
子、磁気回路とコイルによる動電型等、各種の電気/音
響変換器を任意に用いてよい。
Characteristic portions of the present plasma CVD apparatus are ultrasonic vibration applying means 20A, 20B and 20C. Among them, the ultrasonic vibration applying means 20A is provided on the substrate stage 12
And directly excites the substrate 11 to be processed. The ultrasonic vibration applying means 20B is incorporated in the gas diffusion plate 15, and excites the raw material gas ejected from the gas shower head 14. The ultrasonic vibration applying means 20B includes the gas shower head 14, the gas introduction hole 16, or the gas ring 1
7 may be attached. Also, the ultrasonic vibration applying means 20C
Is mounted on the inner wall of the CVD chamber to excite the source gas on the upper surface of the substrate 11 to be processed. The ultrasonic vibration applying means 20C is provided with a horn to enhance the directivity of the ultrasonic wave in order to effectively excite the source gas near the substrate 11 to be processed. This is like a horn tweeter in a speaker system. It is desirable that a plurality of ultrasonic vibration applying means 20C be attached to the inner wall of the etching chamber. As the ultrasonic vibration applying means, various electric / acoustic converters such as a piezoelectric element, a magnetostrictive element, and an electrodynamic type using a magnetic circuit and a coil may be arbitrarily used.

【0019】実施例1 次に、SiOFの形成工程の具体的実施例を説明する。
本実施例は、Al系金属配線上にSiOFからなる低誘
電率層間絶縁膜を、SiH4 、O2 およびArFを原料
ガスとしてプラズマCVDにより形成した例であり、こ
れを図1(a)〜(b)を参照して説明する。
Example 1 Next, a specific example of the step of forming SiOF will be described.
This embodiment is an example in which a low dielectric constant interlayer insulating film made of SiOF is formed on an Al-based metal wiring by plasma CVD using SiH 4 , O 2 and ArF as source gases, and this is shown in FIG. This will be described with reference to (b).

【0020】まずSi等の半導体基板1上の層間絶縁膜
2上に例えば0.35μm幅のラインアンドスペースか
らなるAl系金属からなる配線層3を形成し、これを被
処理基板とする。これを図1(a)に示す。
First, a wiring layer 3 made of an Al-based metal having a line-and-space width of 0.35 μm, for example, is formed on the interlayer insulating film 2 on the semiconductor substrate 1 made of Si or the like, and is used as a substrate to be processed. This is shown in FIG.

【0021】次にSiH4 とN2 Oをソースガスとした
通常のプラズマCVDにより、薄い下層絶縁膜(図示せ
ず)をコンフォーマルに形成する。この下層絶縁膜は次
工程で堆積するSiOFの膜質を補完するために形成す
るが、必要がなければ成膜を省略してもよい。
Then, a thin lower insulating film (not shown) is conformally formed by ordinary plasma CVD using SiH 4 and N 2 O as source gases. This lower insulating film is formed to complement the quality of the SiOF film deposited in the next step, but the film formation may be omitted if not necessary.

【0022】続けて図2に示したCVD装置の基板ステ
ージ12にこの被処理基板11を載置し、本実施例の要
部であるSiOFのプラズマCVDを一例として下記条
件により施す。 SiH4 50 sccm O2 50 sccm ArF 30 sccm ガス圧力 27 Pa RF電源パワー 0.08 W/cm2 (13.56MHz) 基板温度 300 ℃
Subsequently, the substrate 11 to be processed is placed on the substrate stage 12 of the CVD apparatus shown in FIG. 2 and the plasma CVD of SiOF, which is the essential part of this embodiment, is performed under the following conditions. SiH 4 50 sccm O 2 50 sccm ArF 30 sccm Gas pressure 27 Pa RF power supply power 0.08 W / cm 2 (13.56 MHz) Substrate temperature 300 ° C.

【0023】SiOF膜の厚さは、Al系金属配線上部
で例えば0.3μmの厚さとなるまで形成した。この結
果、図1(b)に示すようにステップカバレッジが良
く、炭素やイオウのコンタミネーションのないSiOF
からなる層間絶縁膜4が実用的なデポジションレートで
形成された。層間絶縁膜4の比誘導率は3.3であっ
た。この後、再びSiH4 とN2 Oをソースガスとした
通常のプラズマCVDにより、薄い上層絶縁膜(図示せ
ず)を必要に応じて形成してもよい。このような積層構
造をとることにより、耐湿性にすぐれた信頼性の高い低
誘電率の層間絶縁膜を得ることができる。
The SiOF film was formed to a thickness of, for example, 0.3 μm above the Al-based metal wiring. As a result, as shown in FIG. 1 (b), SiOF has good step coverage and no carbon or sulfur contamination.
The inter-layer insulating film 4 made of was formed at a practical deposition rate. The relative dielectric constant of the interlayer insulating film 4 was 3.3. After that, a thin upper layer insulating film (not shown) may be formed again as required by ordinary plasma CVD using SiH 4 and N 2 O as source gases. By adopting such a laminated structure, it is possible to obtain a highly reliable interlayer insulating film having a low dielectric constant and excellent moisture resistance.

【0024】実施例2 本実施例はArFの替わりにKrFを用いた他は、実施
例1に準じたものである。本実施例によっても、実用的
な成膜速度で比誘導率3.3を有するSiOFがステッ
プカバレッジよく、またコンタミネーションなく形成さ
れた。
Example 2 This example is the same as Example 1 except that KrF was used instead of ArF. Also in this example, SiOF having a specific dielectric constant of 3.3 was formed at a practical film formation rate with good step coverage and without contamination.

【0025】実施例3 本実施例は、被処理基板に超音波を印加しつつSiOF
を形成した例である。本実施例で採用した被処理基板
は、実施例1において図1(a)で示したものと同じで
あるので、重複する説明は省略する。この被処理基板1
1を図2に示したCVD装置の基板ステージ12に載置
し、SiOFのプラズマCVDを一例として下記条件に
より施す。なお超音波振動は、基板ステージ12に組み
込んだ超音波振動印加手段20Aを用いて印加した。励
振用の電力は一例として100Wとしたが、被処理基板
11の直径や重量、電気/音響変換器の変換効率により
最適値は変動する。 SiH4 50 sccm O2 50 sccm XeF2 30 sccm ガス圧力 27 Pa RF電源パワー 0.08 W/cm2 (13.56MHz) 超音波振動(連続的) 100 W(200kHz) 基板温度 300 ℃
Embodiment 3 In this embodiment, SiOF is applied to a substrate to be processed while applying ultrasonic waves.
This is an example in which is formed. Since the substrate to be processed used in this example is the same as that shown in FIG. 1A in Example 1, duplicate description will be omitted. This substrate 1 to be processed
1 is placed on the substrate stage 12 of the CVD apparatus shown in FIG. 2, and plasma CVD of SiOF is performed under the following conditions as an example. The ultrasonic vibration was applied using the ultrasonic vibration applying means 20A incorporated in the substrate stage 12. The power for excitation was set to 100 W as an example, but the optimum value varies depending on the diameter and weight of the substrate 11 to be processed and the conversion efficiency of the electric / acoustic converter. SiH 4 50 sccm O 2 50 sccm XeF 2 30 sccm Gas pressure 27 Pa RF power supply power 0.08 W / cm 2 (13.56 MHz) Ultrasonic vibration (continuous) 100 W (200 kHz) Substrate temperature 300 ° C.

【0026】SiOF膜の厚さは、Al系金属配線上部
で0.3μmの厚さとなるまで形成した。この結果、図
1(b)に示すようにステップカバレッジが良く、炭素
やイオウのコンタミネーションのないSiOFからなる
層間絶縁膜4が実用的なデポジションレートで形成され
た。層間絶縁膜4の比誘導率は、XeF2 の解離が超音
波印加により向上し、効率的にフッ素原子が膜中に取り
込まれたことから、3.2の値が得られた。
The SiOF film was formed to a thickness of 0.3 μm above the Al-based metal wiring. As a result, as shown in FIG. 1B, the step coverage was good, and the interlayer insulating film 4 made of SiOF free from carbon or sulfur contamination was formed at a practical deposition rate. The relative dielectric constant of the interlayer insulating film 4 was 3.2 because the dissociation of XeF 2 was improved by the application of ultrasonic waves and the fluorine atoms were efficiently incorporated into the film.

【0027】実施例4 本実施例は、ガスシャワーヘッド14から噴出する原料
ガスに超音波を印加しつつSiOFを形成した例であ
る。かかる構成をとることにより、プラズマ空間および
被処理基板の双方に超音波振動エネルギを与えることが
できる。本実施例で採用した被処理基板は、実施例1に
おいて図1(a)で示したものと同じであり、重複する
説明は省略する。この被処理基板11を図2に示したC
VD装置の基板ステージ12に載置し、SiOFのプラ
ズマCVDを一例として下記条件により施す。なお超音
波振動は、ガスシャワーヘッド14内のガス拡散板15
に組み込んだ超音波振動印加手段20Bを用いて印加し
た。励振用の電力は一例として100Wとしたが、ガス
拡散板15の直径や重量、電気/音響変換器の変換効率
あるいはガス流量等により最適値は変動する。 SiH4 50 sccm O2 50 sccm KrF 30 sccm ガス圧力 27 Pa RF電源パワー 0.08 W/cm2 (13.56MHz) 超音波振動(連続的) 100 W(200kHz) 基板温度 300 ℃
Embodiment 4 This embodiment is an example in which SiOF is formed while applying ultrasonic waves to the raw material gas ejected from the gas shower head 14. With this configuration, ultrasonic vibration energy can be applied to both the plasma space and the substrate to be processed. The substrate to be processed used in this example is the same as that shown in FIG. 1A in Example 1, and duplicate description is omitted. The substrate 11 to be processed is referred to as C shown in FIG.
The substrate is placed on the substrate stage 12 of the VD apparatus, and plasma CVD of SiOF is performed under the following conditions as an example. The ultrasonic vibration is generated by the gas diffusion plate 15 in the gas shower head 14.
It was applied using the ultrasonic vibration applying means 20B incorporated in. The power for excitation was 100 W as an example, but the optimum value varies depending on the diameter and weight of the gas diffusion plate 15, the conversion efficiency of the electric / acoustic converter, the gas flow rate, and the like. SiH 4 50 sccm O 2 50 sccm KrF 30 sccm Gas pressure 27 Pa RF power supply power 0.08 W / cm 2 (13.56 MHz) Ultrasonic vibration (continuous) 100 W (200 kHz) Substrate temperature 300 ° C.

【0028】SiOF膜の厚さは、Al系金属配線上部
で0.3μmの厚さとなるまで形成した。この結果、図
1(b)に示すようにステップカバレッジが良く、炭素
やイオウのコンタミネーションのないSiOFからなる
層間絶縁膜4が実用的なデポジションレートで形成され
た。層間絶縁膜4の比誘導率は、KrFの解離が超音波
印加により向上し、効率的にフッ素原子が膜中に取り込
まれたことから、3.2の値が得られた。
The SiOF film was formed to a thickness of 0.3 μm above the Al-based metal wiring. As a result, as shown in FIG. 1B, the step coverage was good, and the interlayer insulating film 4 made of SiOF free from carbon or sulfur contamination was formed at a practical deposition rate. The specific dielectric constant of the interlayer insulating film 4 was 3.2 because the dissociation of KrF was improved by the application of ultrasonic waves and the fluorine atoms were efficiently incorporated into the film.

【0029】以上、本発明を4例の実施例により説明し
たが、本発明はこれら実施例に何ら限定されるものでは
ない。
Although the present invention has been described above with reference to the four examples, the present invention is not limited to these examples.

【0030】例えばシラン系ガスとしてSiH4 を採用
したが、Si2 6 等無機高次シラン系ガスであっても
よい。また有機シラン系ガスとしてTEOSをはじめと
し、Octa Methyl Cyclo Tetra
Siloxane(OMCTS)、Tetra Pr
opoxy Silane(TPOS)、TetraM
ethyl Cyclo Tetra Siloxan
e(TMCTS)、Tetramethyl Orth
osilicate(TMOS)、Diacetoxy
Ditertialybutoxy Silane
(DADBS)、Tetraethyl Silane
(TES)、TetramethylSilane(T
MS)等、他の有機シラン系ガスを適宜使用することが
できる。またこれら有機シラン系ガスにSiH4 、Si
2 6 等無機系のシランガスを混合して用いてもよい。
For example, SiH 4 is used as the silane-based gas, but an inorganic high-order silane-based gas such as Si 2 H 6 may be used. In addition, TEOS is used as an organic silane-based gas, and Octa Methyl Cyclo Tetra
Siloxane (OMCTS), Tetra Pr
opoxy Silane (TPOS), TetraM
Ethyl Cyclo Tetra Siloxan
e (TMCTS), Tetramethyl Orth
Oscillate (TMOS), Diacetoxy
Dietarybutyxy Silane
(DADBS), Tetraethyl Silane
(TES), TetramethylSilane (T
Other organic silane-based gases such as MS) can be used as appropriate. In addition, SiH 4 , Si
An inorganic silane gas such as 2 H 6 may be mixed and used.

【0031】酸化性ガスとしてO2 を用いたが、勿論他
の酸化性ガスであるO3 、N2 O、NO2 、H2 OやH
2 2 を用いたり、混合してもよい。その他、希釈ガス
としてHe、Ar、Xe等の希ガスやN2 を混合して用
いてもよい。
Although O 2 is used as the oxidizing gas, other oxidizing gases such as O 3 , N 2 O, NO 2 , H 2 O and H are of course used.
2 O 2 may be used or mixed. In addition, a rare gas such as He, Ar, or Xe or N 2 may be mixed and used as a diluent gas.

【0032】実施例中では超音波を基板ステージ12に
組み込んだ超音波振動印加手段20Aおよびガス拡散板
15に組み込んだ超音波印加手段20Bを用いて印加し
たが、チャンバ壁に直接取りつけた超音波印加手段20
Cを用いてもよい。また超音波印加は、間欠的に印加し
てもよい。その周波数も200kHz以外でもよく、複
数の周波数を切り替えて印加したり、周波数や出力をス
ィープして印加してもよい。
In the embodiment, ultrasonic waves are applied using the ultrasonic vibration applying means 20A incorporated in the substrate stage 12 and the ultrasonic applying means 20B incorporated in the gas diffusion plate 15, but the ultrasonic waves directly attached to the chamber wall. Applying means 20
C may be used. The ultrasonic wave may be applied intermittently. The frequency may be other than 200 kHz, and a plurality of frequencies may be switched and applied, or the frequency or output may be swept and applied.

【0033】プラズマCVD法を用いる場合には、上記
実施例で用いた平行平板型の装置の他に、マイクロ波C
VD装置、ECR−CVD装置、さらにはヘリコン波プ
ラズマや誘導結合プラズマ(ICP)等の高密度プラズ
マソースを用いることも可能である。また低圧Hgラン
プ等のUV光線の利用は原料ガスの解離の促進や、基板
ダメージ低減に有用である。またLP−CVDや常圧C
VD法を採用することも可能である。この場合には、従
来のこれらCVD装置の基板ステージやガスノズルある
いはCVDチャンバ等に、適宜超音波印加手段を付設し
て用いてもよい。
In the case of using the plasma CVD method, in addition to the parallel plate type apparatus used in the above embodiment, the microwave C
It is also possible to use a VD apparatus, an ECR-CVD apparatus, or a high density plasma source such as helicon wave plasma or inductively coupled plasma (ICP). Further, the use of UV rays such as a low pressure Hg lamp is useful for promoting dissociation of raw material gas and reducing substrate damage. LP-CVD and atmospheric pressure C
It is also possible to adopt the VD method. In this case, ultrasonic wave applying means may be appropriately attached to the substrate stage, gas nozzle, CVD chamber, or the like of these conventional CVD apparatuses.

【0034】前述の各実施例は、Al系金属配線上の層
間絶縁膜を形成する場合について例示したが、他の配線
材料層を用いる場合や、最終パッシベーション膜として
用いる場合、さらにはトレンチアイソレーション等をボ
イドの発生なく平坦に埋め込む場合等に適用することも
できることは言うまでもない。
In each of the above-mentioned embodiments, the case of forming the interlayer insulating film on the Al-based metal wiring has been exemplified. However, the case of using another wiring material layer, the case of using it as the final passivation film, and the trench isolation. It is needless to say that the above can also be applied to the case where the above is buried flat without generating voids.

【0035】[0035]

【発明の効果】以上の説明から明らかなように、本発明
によれば原料ガスの構成成分である炭素やイオウ等によ
るコンタミネーションのないSiOFからなる低誘電率
を、実用的なデポジションレートで形成することが可能
となる。したがって、配線間容量による信号遅延が問題
となるマイクロプロセッサや高集積度メモリ等の半導体
装置を信頼性よく製造することが可能となる。
As is apparent from the above description, according to the present invention, the low dielectric constant of SiOF, which is free from contamination by carbon, sulfur, etc., which are the constituents of the raw material gas, can be achieved at a practical deposition rate. Can be formed. Therefore, it is possible to reliably manufacture a semiconductor device such as a microprocessor or a highly integrated memory in which signal delay due to the capacitance between wirings becomes a problem.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の実施例1ないし3のプラズマCVDプ
ロセスを説明する概略断面図であり、(a)は層間絶縁
膜上に配線層を形成した状態、(b)は低誘電率酸化シ
リコン系絶縁膜からなる層間絶縁膜を形成した状態であ
る。
FIG. 1 is a schematic cross-sectional view illustrating a plasma CVD process of Examples 1 to 3 of the present invention, in which (a) is a state in which a wiring layer is formed on an interlayer insulating film, and (b) is a low dielectric constant silicon oxide. This is a state in which an interlayer insulating film made of a system insulating film is formed.

【図2】本発明の実施例1ないし3で用いた枚葉式プラ
ズマCVD装置の一構成例を示す概略断面図である。
FIG. 2 is a schematic cross-sectional view showing a configuration example of a single-wafer plasma CVD apparatus used in Examples 1 to 3 of the present invention.

【符号の説明】[Explanation of symbols]

1…半導体基板、2…層間絶縁膜、3…配線層、4…層
間絶縁膜 11…被処理基板、12…基板ステージ、13…ヒー
タ、14…ガスシャワーヘッド、15…ガス拡散板、1
6…ガス導入孔、17…ガスリング、18…ガス排出
孔、19…RF電源、20A,20B,20C…超音波
振動印加手段
DESCRIPTION OF SYMBOLS 1 ... Semiconductor substrate, 2 ... Interlayer insulating film, 3 ... Wiring layer, 4 ... Interlayer insulating film 11 ... Substrate to be processed, 12 ... Substrate stage, 13 ... Heater, 14 ... Gas shower head, 15 ... Gas diffusion plate, 1
6 gas introduction hole, 17 gas ring, 18 gas discharge hole, 19 RF power supply, 20A, 20B, 20C ultrasonic wave applying means

Claims (4)

【特許請求の範囲】[Claims] 【請求項1】 シラン系ガス、酸化性ガス、および希ガ
ス原子とフッ素原子から構成される化合物を主体とする
原料ガスを用いたCVD法により、被処理基板上にフッ
素を含む酸化シリコン系絶縁膜を形成する工程を有する
ことを特徴とする半導体装置の製造方法。
1. A silicon oxide insulating material containing fluorine on a substrate to be processed by a CVD method using a silane-based gas, an oxidizing gas, and a source gas mainly containing a compound composed of a rare gas atom and a fluorine atom. A method of manufacturing a semiconductor device, comprising the step of forming a film.
【請求項2】 希ガス原子とフッ素原子から構成される
化合物は、ArF、KrF、XeF2 およびNeFのう
ちの少なくともいずれか一種であることを特徴とする請
求項1記載の半導体装置の製造方法。
2. The method of manufacturing a semiconductor device according to claim 1, wherein the compound composed of a rare gas atom and a fluorine atom is at least one of ArF, KrF, XeF 2 and NeF. .
【請求項3】 シラン系ガスは、無機シラン系ガスおよ
び有機シラン系ガスのうちの少なくともいずれか一種で
あることを特徴とする請求項1記載の半導体装置の製造
方法。
3. The method of manufacturing a semiconductor device according to claim 1, wherein the silane-based gas is at least one of an inorganic silane-based gas and an organic silane-based gas.
【請求項4】 被処理基板に超音波を印加しつつ、フッ
素を含む酸化シリコン系絶縁膜を形成することを特徴と
する請求項1記載の半導体装置の製造方法。
4. The method for manufacturing a semiconductor device according to claim 1, wherein the silicon oxide insulating film containing fluorine is formed while applying ultrasonic waves to the substrate to be processed.
JP03522696A 1996-02-22 1996-02-22 Manufacturing method of semiconductor device Expired - Fee Related JP3641866B2 (en)

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Application Number Priority Date Filing Date Title
JP03522696A JP3641866B2 (en) 1996-02-22 1996-02-22 Manufacturing method of semiconductor device

Publications (2)

Publication Number Publication Date
JPH09232308A true JPH09232308A (en) 1997-09-05
JP3641866B2 JP3641866B2 (en) 2005-04-27

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Country Link
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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6187662B1 (en) 1998-01-19 2001-02-13 Nec Corporation Semiconductor device with low permittivity interlayer insulating film and method of manufacturing the same
JP2007208134A (en) * 2006-02-03 2007-08-16 Sumitomo Electric Ind Ltd How to produce compound semiconductor optical device
CN116837354A (en) * 2023-09-01 2023-10-03 上海陛通半导体能源科技股份有限公司 Semiconductor heating device and vapor deposition apparatus

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6187662B1 (en) 1998-01-19 2001-02-13 Nec Corporation Semiconductor device with low permittivity interlayer insulating film and method of manufacturing the same
JP2007208134A (en) * 2006-02-03 2007-08-16 Sumitomo Electric Ind Ltd How to produce compound semiconductor optical device
CN116837354A (en) * 2023-09-01 2023-10-03 上海陛通半导体能源科技股份有限公司 Semiconductor heating device and vapor deposition apparatus
CN116837354B (en) * 2023-09-01 2023-11-24 上海陛通半导体能源科技股份有限公司 Semiconductor heating device and vapor deposition apparatus

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