JP4015510B2 - Multilayer wiring interlayer insulating semiconductor integrated circuit film and manufacturing method thereof - Google Patents

Multilayer wiring interlayer insulating semiconductor integrated circuit film and manufacturing method thereof Download PDF

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JP4015510B2
JP4015510B2 JP2002262304A JP2002262304A JP4015510B2 JP 4015510 B2 JP4015510 B2 JP 4015510B2 JP 2002262304 A JP2002262304 A JP 2002262304A JP 2002262304 A JP2002262304 A JP 2002262304A JP 4015510 B2 JP4015510 B2 JP 4015510B2
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insulating film
gas
film
silicon
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JP2004103752A (en )
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文紀 尾崎
直人 辻
聡 高橋
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日本エー・エス・エム株式会社
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    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
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    • H01L21/3205Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321After treatment
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    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
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    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
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    • H01L21/76835Combinations of two or more different dielectric layers having a low dielectric constant
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    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
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    • H01L21/7684Smoothing; Planarisation

Description

【0001】 [0001]
【発明の属する技術分野】 BACKGROUND OF THE INVENTION
本発明は、半導体集積回路の多層配線用層間絶縁膜及びその製造方法に関し、特に、Cu多層配線に使用するためのポリッシングストッパ膜及びその製造方法に関する。 The present invention relates to a multilayer wiring interlayer insulating film and the manufacturing method thereof of a semiconductor integrated circuit, particularly to a polishing stopper film and a manufacturing method thereof for use in the Cu multilayer interconnection.
【0002】 [0002]
【従来技術】 [Prior art]
半導体集積回路は、これまで高速化及び高機能化を目指し、微細化が進んできた。 The semiconductor integrated circuit has hitherto aims to speed and high functionality, has progressed miniaturization. 従来、半導体集積回路の多層配線材料としてAlが使用されてきたが、配線が微細かつ長距離になるにつれ、電流密度の増大で発生するエレクトロマイグレーションによる断線事故及びAlの抵抗率及び絶縁膜の誘電率に起因する信号遅延といった点が問題になってきた。 Conventionally, Al has been used as a multilayer wiring material of a semiconductor integrated circuit, as the wire is fine and long distance, the resistivity and the insulating film of accidental disconnection and Al due to electromigration occurring at an increased current density dielectric points such as signal delay due to the rate becomes a problem.
【0003】 [0003]
次世代の多層配線材料として注目されているのがCuである。 What is attracting attention as a multilayer wiring material of the next generation is Cu. Cuは断線事故に対して強く、抵抗もAlに比べて小さい。 Cu is strongly against disconnection accident, resistance is also small compared to Al. 1997年に、IBMとMotorolaによって、デュアルダマシン(Dual-Damascene)と呼ばれる技術が開発された。 In 1997, by IBM and Motorola, technology called dual damascene (Dual-Damascene) has been developed. 従来は、Al膜をエッチングで凸状に加工して配線を形成し、その後層間を絶縁膜で埋め込んでいた。 Conventionally, processed in a convex shape the Al film is etched to form a wiring, followed embeds an interlayer with an insulating film. これに対してダマシン配線技術は、平坦な層間絶縁膜に配線パターンの溝をエッチングで形成し、全面にCu薄膜を堆積させた後、化学機械研磨(CMP)によって研磨し、溝部分にのみCuを残して配線とするものである(例えば、非特許文献1参照)。 Damascene wiring technique contrast, formed by etching a trench in the wiring pattern on a flat interlayer insulating film, after depositing the Cu film on the whole surface, polished by chemical mechanical polishing (CMP), only the groove portions Cu it is an leaving wiring (for example, see non-Patent Document 1).
【0004】 [0004]
【非特許文献1】 Non-Patent Document 1]
「次世代ULSIプロセス技術」株式会社リアライズ社、平成12年2月29日、p.558−565 "Next-generation ULSI process technology", Ltd. Realize Inc., 2000 February 29, p.558-565
【0005】 [0005]
このダマシン配線技術では、低誘電率絶縁膜の適用が必須である。 This damascene wiring technique, the application of the low dielectric constant insulating film is essential. 低誘電率絶縁膜として、スピンコート法による無機SOG膜、材料ガスとしてCxFyHzを用いたプラズマCVD法によるaC:F膜、材料ガスとしてシリコン系炭化水素を用いたプラズマCVD法によるSixCyOz膜等が知られている。 As the low dielectric constant insulating film, aC an inorganic SOG film, a plasma CVD method using CxFyHz as a material gas by spin coating: F film, SixCyOz film or the like by a plasma CVD method using the silicon-containing hydrocarbon as the material gas is known It is.
【0006】 [0006]
【発明が解決しようとする課題】 [Problems that the Invention is to Solve
ダマシン配線技術のCMP工程では、研磨布と研磨液(スラリー)を用いて研磨を行うが、絶縁膜の機械的強度が低いとCu配線部分より絶縁膜部分が凹んでしまうディッシングと呼ばれる問題が生じる。 The CMP process damascene wiring technique, but is polished with a polishing cloth polishing liquid (slurry), there is a problem called dishing mechanical strength of the insulating film will dented is the insulating film portion lower the Cu wiring portion . これは、研磨レートの異なる材料が同一研磨面内に混在する(例えば、金属配線及び層間絶縁膜)場合、研磨布が変形可能であることから、研磨レートの大きな材料が余計に研磨されるために発生する現象である。 This is different materials polishing rate are mixed in the same polishing plane (e.g., a metal wiring and an interlayer insulating film) case, since the polishing cloth is deformable, since a large material in the polishing rate is unnecessarily polished is a phenomenon that occurs. ダマシン配線技術で最も有望な低誘電率膜であるSixCyOz膜は、膜中に-CHx結合を多く含み多孔質であるため機械的強度が低く、ディッシングの問題が生じる。 SixCyOz film is the most promising low dielectric constant film in the damascene wiring technique, since the mechanical strength is low is porous rich in -CHx bonds in the film, dishing problems.
【0007】 [0007]
ディッシングの問題を解決するために後処理用の装置を用意すると、装置スペース及びコストの面で問題となるばかりか、装置間の移動の際に生じるパーティクル汚染も問題となる。 When providing a device for post-processing in order to solve the dishing problem, not only a problem in terms of equipment space and cost, also a problem particle contamination occurring during movement between devices.
【0008】 [0008]
したがって、本発明の目的は、ダマシン配線技術のCMP工程でディッシングが生じないような層間絶縁膜を製造する方法を与えることである。 Accordingly, an object of the present invention is to provide a method of manufacturing an interlayer insulating film that does not cause dishing in the CMP process of the damascene wiring technique.
【0009】 [0009]
本発明の他の目的は、別の装置を一切必要としない低コストの層間絶縁膜を製造する方法を与えることである。 Another object of the present invention is to provide a method of manufacturing a low cost of an interlayer insulating film which does not require any separate device.
【0010】 [0010]
【課題を解決するための手段】 In order to solve the problems]
上記課題を解決するために、本発明に係る層間絶縁膜を製造する方法は以下の工程から成る。 In order to solve the above problems, a method of manufacturing an interlayer insulating film according to the present invention comprises the following steps.
【0011】 [0011]
半導体集積回路の多層配線用層間絶縁膜の製造方法は、 Method for manufacturing a multilayer wiring interlayer insulating film of a semiconductor integrated circuit,
シリコン系炭化水素を材料ガスとして用いてプラズマCVD法により、第1の絶縁膜を形成する工程と、 By a plasma CVD method using the silicon-containing hydrocarbon as the material gas, forming a first insulating film,
第1の絶縁膜を形成した後、in-situで連続的にシリコン系炭化水素ガス及び酸化性ガスを材料ガスとして用いてプラズマCVD法により、第1の絶縁膜上に第2の絶縁膜を形成する工程と、 After forming the first insulating film by a plasma CVD method using a continuous silicon-containing hydrocarbon gas and oxidative gas in in-situ as a material gas, a second insulating film on the first insulating film a step of forming,
から成る。 Consisting of.
【0012】 [0012]
好適には、酸化性ガスの流量はシリコン系炭化水素ガスの流量の1.2〜100倍である。 Preferably, the flow rate of the oxidizing gas is from 1.2 to 100 times the flow rate of the silicon-containing hydrocarbon gas.
【0013】 [0013]
本発明で使用するシリコン系炭化水素は、一般式Si α O α -1 (R) 2 α - β +2 (OC n H 2n+1 )で表され、 Silicon-containing hydrocarbon used in the present invention have the general formula Si α O α -1 (R) 2 α - represented by β +2 (OC n H 2n + 1),
ここで、α=1〜3の整数、β=0〜2の整数、n=1〜3の整数及びR=Siに結合されたC 1-6炭化水素である。 Here, an alpha = 1 to 3 integers, beta = 0 to 2 integer, n = 1 to 3 integers and R = C 1-6 hydrocarbons that is coupled to Si.
【0014】 [0014]
具体的には、シリコン系炭化水素は、ジメチル・ジメトキシシランを含む。 Specifically, the silicon-containing hydrocarbon include dimethyl dimethoxy silane.
【0015】 [0015]
また具体的には、酸化性ガスは、酸素、亜酸化窒素、オゾン、過酸化酸素、二酸化炭素、アルコール類の少なくとも1つから成る。 Further specifically, the oxidizing gas is composed of oxygen, nitrous oxide, ozone, peroxide oxygen, carbon dioxide, from at least one alcohol.
【0016】 [0016]
一方、半導体集積回路の多層配線用層間絶縁膜は、 On the other hand, the multilayer wiring interlayer insulating film of a semiconductor integrated circuit,
シリコン系炭化水素を材料ガスとして用いてプラズマCVD法により形成された、第1の絶縁膜と、 Formed by a plasma CVD method using the silicon-containing hydrocarbon as the material gas, a first insulating film,
第1の絶縁膜を形成した後、in-situで連続的にシリコン系炭化水素ガス及び酸化性ガスを材料ガスとして用いてプラズマCVD法により、第1の絶縁膜上に形成された第2の絶縁膜と、 After forming the first insulating film by a plasma CVD method using continuously the silicon-containing hydrocarbon gas and an oxidizing gas as a material gas in-situ, a second formed on the first insulating film an insulating film,
から成る。 Consisting of.
【0017】 [0017]
【発明の実施の態様】 [Aspect of the implementation of the invention]
以下、図面を参照しながら本願発明を詳細に説明する。 Hereinafter, the present invention will be described in detail with reference to the drawings. 図1は、本発明に係る半導体集積回路の多層配線用層間絶縁膜の製造方法に使用するプラズマCVD装置の略示図である。 Figure 1 is a schematic view of a plasma CVD apparatus used in a method for manufacturing a multilayer wiring interlayer insulating film of a semiconductor integrated circuit according to the present invention.
【0018】 [0018]
プラズマCVD装置1は反応チャンバ6を含む。 The plasma CVD apparatus 1 comprises a reaction chamber 6. 反応チャンバ6内側には半導体ウエハ4を載置するためのサセプタ3が設けられている。 Susceptor 3 for placing the semiconductor wafer 4 is provided inside the reaction chamber 6. サセプタ3はヒータ2によって支持され、該ヒータ2は半導体ウエハ4を所定の温度(350〜450℃)に維持する。 The susceptor 3 is supported by a heater 2, the heater 2 maintains the semiconductor wafer 4 to a predetermined temperature (350 to 450 ° C.). サセプタ3はプラズマ放電のための一方の電極を兼ねており、反応チャンバ6を通じて接地11されている。 The susceptor 3 also serves as one of electrodes for plasma discharge, and is grounded 11 through the reaction chamber 6. 反応チャンバ6の内側天井部にはサセプタ3と平行に対向して、シャワーヘッド9が設けられている。 The inner ceiling of the reaction chamber 6 in parallel to face the susceptor 3, the showerhead 9 is provided. シャワーヘッド9は底面に多くの細孔を有しており、そこから以下に説明する材料ガスが半導体ウエハ4に向かって均一に噴出される。 Shower head 9 has many pores on the bottom, the material gas described from there below is uniformly ejected toward the semiconductor wafer 4. シャワーヘッド9の中央部には材料ガス導入口5が設けられ、材料ガスはガスライン(図示せず)を通じてシャワーヘッド9に導入される。 The central portion of the shower head 9 provided with a material gas inlet 5, a material gas is introduced into the shower head 9 via the gas line (not shown). ガス導入口5は反応チャンバ6から電気的に絶縁されている。 Gas inlet 5 is electrically insulated from the reaction chamber 6. シャワーヘッド9はプラズマ放電のためのもう一方の電極を兼ねており、材料ガス導入口5を通じて外部の第1の高周波電源7及び第2の高周波電源8に接続されている。 Shower head 9 is connected to a first high-frequency power source 7 and the second high-frequency power source 8 also serves as the other electrode, the external through the gas feed port 5 for plasma discharge. これによって、半導体ウエハ4の近傍にプラズマ反応場が生成される。 Thus, the plasma reaction field is generated near the semiconductor wafer 4. 反応チャンバ6の底部には排気口10が設けられ、外部の真空ポンプ(図示せず)と連結されている。 An exhaust port 10 provided at the bottom of the reaction chamber 6 is connected to an external vacuum pump (not shown).
【0019】 [0019]
次に、本発明に係る半導体集積回路の多層配線用層間絶縁膜の製造方法について説明する。 Next, a method for manufacturing a multilayer wiring interlayer insulating film of a semiconductor integrated circuit according to the present invention. 本発明に係る多層配線用層間絶縁膜の製造方法は、シリコン系炭化水素を材料ガスとして用いてプラズマCVD法により、第1の絶縁膜を形成する工程を含む。 Method for manufacturing a multilayer wiring interlayer insulating film according to the present invention, by a plasma CVD method using the silicon-containing hydrocarbon as the material gas, comprising the step of forming the first insulating film. ここで材料ガスは、一般式Si α O α -1 (R) 2 α - β +2 (OC n H 2n+1 )(ここで、α=1〜3の整数、β=0〜2の整数、n=1〜3の整数及びR=Siに結合されたC 1-6炭化水素)で表されるシリコン系炭化水素であり、好適にはDM-DMOS(ジメチル・ジメトキシシラン)である。 Here the material gas is represented by the general formula Si α O α -1 (R) 2 α - β +2 (OC n H 2n + 1) ( where, alpha = 1 to 3 integers, beta = 0 to 2 integer a silicon-containing hydrocarbon represented by C 1-6 hydrocarbon) coupled to the integer and R = Si of n = 1 to 3, preferably a DM-DMOS (dimethyl dimethoxysilane). 他に副原料ガスとして、CO 2 、アルコール類、少なくとも1つの不飽和結合を含む炭化水素、またはN 2を含むことができる。 As other auxiliary material gas, CO 2, alcohol can comprise a hydrocarbon or N 2, comprising at least one unsaturated bond. Si/O比を制御する必要がある場合には副原料ガスとしてさらにO 2若しくはN 2 Oを付加することもできる。 It can also be further added to O 2 or N 2 O as an auxiliary material gas when it is necessary to control the Si / O ratio. さらに添加ガスとして、Ar及び/またはHeのような不活性ガスを含むこともできる。 Furthermore as an additive gas it may also include inert gases such as Ar and / or He.
【0020】 [0020]
外部真空ポンプ(図示せず)によって真空排気した後、材料ガスは、ガス導入口5からシャワーヘッド9を通じて反応チャンバ6内部に導入される。 Was evacuated by an external vacuum pump (not shown), material gas is introduced from the gas inlet 5 into the reaction chamber 6 through the shower head 9. 続いて、第1の高周波電源7及び第2の高周波電源8によって励起高周波パワーが印加され、半導体基板4近傍にプラズマ反応場が形成される。 Subsequently, the applied excitation frequency power by the first high-frequency power source 7 and the second high-frequency power source 8, the plasma reaction space is formed in the semiconductor substrate 4 vicinity. ここで、第1の高周波電源7の周波数は2MHz以上であり、重畳する第2の高周波電源8の周波数は2MHz以下である。 Here, the frequency of the first high-frequency power supply 7 is at 2MHz or more, the frequency of the second high-frequency power source 8 to be superimposed is 2MHz or less. 選択的に、第1の高周波電源7のみを用いることも可能である。 Alternatively, it is also possible to use only the first high frequency power supply 7. プラズマ中で分解した材料ガス原子が化学反応を起こし、組成SixCyOzの第1の絶縁膜が半導体ウエハ4上に堆積する。 Material gas atoms decomposed in the plasma react chemically, the first insulating film composition SixCyOz is deposited on the semiconductor wafer 4.
【0021】 [0021]
また、本発明に係る多層配線用層間絶縁膜の製造方法は、第1の絶縁膜を形成した後、in-situで連続的にシリコン系炭化水素ガス及び酸化性ガスを材料ガスとして用いてプラズマCVD法により、第1の絶縁膜上に第2の絶縁膜を形成する工程を含む。 A method of manufacturing a multilayer wiring interlayer insulating film according to the present invention uses after forming the first insulating film, a continuous silicon-containing hydrocarbon gas and oxidative gas in in-situ as a material gas plasma by CVD, comprising the step of forming a second insulating film over the first insulating film. ここで材料ガスとして用いるシリコン系炭化水素は、一般式Si α O α -1 (R) 2 α - β +2 (OC n H 2n+1 )(ここで、α=1〜3の整数、β=0〜2の整数、n=1〜3の整数及びR=Siに結合されたC 1-6炭化水素)で表されるシリコン系炭化水素であり、好適にはDM-DMOS(ジメチル・ジメトキシシラン)である。 Silicon-containing hydrocarbon used here as material gas is represented by the general formula Si α O α -1 (R) 2 α - β +2 (OC n H 2n + 1) ( where, alpha = 1 to 3 integers, beta = an integer of 0 to 2, a silicon-containing hydrocarbon represented by n = 1 to 3 integers and R = Si the combined C 1-6 hydrocarbons), preferably DM-DMOS (dimethyl dimethoxy it is a silane). また材料ガスとして用いる酸化性ガスは、酸素、亜酸化窒素、オゾン、過酸化酸素、二酸化炭素、アルコール類の少なくとも1つから成る。 The oxidizing gas used as the material gas is composed of oxygen, nitrous oxide, ozone, peroxide oxygen, carbon dioxide, from at least one alcohol. 以下に詳細に説明するように、鋭意研究を重ねた結果、酸化性ガスの流量をシリコン系炭化水素ガスの流量の1.2〜100倍に制御することにより、第2の絶縁膜がポリッシングストッパ膜としての機能を果たすことがわかった。 As described in detail below, the results of extensive studies, by controlling the flow rate of the oxidizing gas to from 1.2 to 100 times the flow rate of the silicon-containing hydrocarbon gas, the second insulating film polishing stopper it was found that serve as a film.
【0022】 [0022]
第1の絶縁膜が形成された後、in-situで連続的に材料ガスをガス導入口5からシャワーヘッド9を通じて反応チャンバ6内に導入する。 After the first insulating film is formed, is introduced into the reaction chamber 6 continuously material gas in-situ from the gas inlet 5 through the shower head 9. この際、酸化性ガスの流量はシリコン系炭化水素ガスの流量の1.2〜100倍に制御する。 In this case, the flow rate of the oxidizing gas is controlled to 1.2 to 100 times the flow rate of the silicon-containing hydrocarbon gas. 続いて、第1の高周波電源7及び第2の高周波電源8によって励起高周波パワーが印加され、半導体ウエハ4近傍にプラズマ反応場が形成される。 Subsequently, the applied excitation frequency power by the first high-frequency power source 7 and the second high-frequency power source 8, the plasma reaction field is formed on the semiconductor wafer 4 neighbors. ここで、第1の高周波電源7の周波数は2MHz以上であり、重畳する第2の高周波電源8の周波数は2MHz以下である。 Here, the frequency of the first high-frequency power supply 7 is at 2MHz or more, the frequency of the second high-frequency power source 8 to be superimposed is 2MHz or less. 選択的に、第1の高周波電源7のみを用いることも可能である。 Alternatively, it is also possible to use only the first high frequency power supply 7. プラズマ中で分解した材料ガス原子が化学反応を起こし、組成SiO 2の第2の絶縁膜が半導体基板4上に堆積する。 Material gas atoms decomposed in the plasma chemically react, a second insulating film of the composition SiO 2 is deposited on the semiconductor substrate 4.
【0023】 [0023]
第1の絶縁膜の特徴は誘電率が低いことである。 Features of the first insulating film is that the dielectric constant is low. これは、主原料ガス(シリコン系炭化水素)中のSi-C結合がそのまま膜中に取り込まれ、膜の密度が疎となるためである。 This is the main raw material gas Si-C bonds (silicon-containing hydrocarbon) in is directly incorporated in the film so that the sparse density of the membrane. しかし、第1の絶縁膜は膜中に-CHx結合を多く含み多孔質であるため機械的強度が低いという欠点を有する。 However, the first insulating film has the disadvantage that the mechanical strength is low because it is porous rich in -CHx bond in the film. 本発明者らはこの点に着目し、第1の絶縁膜の欠点を補うべく、機械的強度の高い第2の絶縁膜を第1の絶縁膜上に形成する方法を発明するに至った。 The present inventors have focused on this point, in order to compensate for the shortcomings of the first insulating film, a high second insulating film mechanical strength leading to the invention a method of forming on the first insulating film. 第2の絶縁膜の特徴は機械的強度が高いことである。 Feature of the second insulating film is that the mechanical strength is high. これは、酸化性ガスを過剰に流すことによって、膜中にCが入らず、膜が緻密となるためであると考えられる。 This can be accomplished by passing an excess of oxidizing gas, C is not enter into the film, considered film is because becomes dense.
【0024】 [0024]
【実施例】 【Example】
以下、本発明に係る層間絶縁膜の製造方法で形成した絶縁膜の評価実験を行ったので説明する。 Hereinafter, description will evaluation experiments of the insulating film formed by the manufacturing method of the interlayer insulating film according to the present invention was performed. 実験では、主原料ガスとしてDM-DMOS及び1,3ジメトキシテトラメチルジシロキサンを用い、それぞれの場合について第2の絶縁膜の単独評価及び第1の絶縁膜と組み合わせた場合のダマシン構造のCMP研磨試験を行った。 In the experiment, the main raw material gas using a DM-DMOS and 1,3-dimethoxy-tetramethyldisiloxane as, CMP polishing damascene structure when combined in each case with the second insulating film alone evaluation and the first insulating film test was carried out.
(実験1) (Experiment 1)
プラズマCVD装置:Eagle 12(日本エー・エス・エム社製) Plasma CVD apparatus: Eagle 12 (manufactured by ASM Japan Co., Ltd.)
第1の絶縁膜の成膜条件: Film-forming conditions of the first insulating film:
主原料ガス:DM-DMOS 200sccm The main raw material gas: DM-DMOS 200sccm
添加ガス:He 400sccm Additive gas: He 400sccm
第1のRF周波数: 27.12MHz 2.8W/cm 2 The first RF frequency: 27.12MHz 2.8W / cm 2
第2の絶縁膜の成膜条件: The deposition conditions of the second insulating film:
主原料ガス:DM-DMOS 100sccm The main raw material gas: DM-DMOS 100sccm
酸化性ガス:O 2 Oxidizing gas: O 2
第1のRF周波数: 27.12MHz The first RF frequency: 27.12MHz
その他の第2の絶縁膜の成膜条件は表1の通りである。 Other film forming conditions of the second insulating film are shown in Table 1.
【0025】 [0025]
【表1】 [Table 1]
【0026】 [0026]
この条件で、まず第2の絶縁膜を1μm成膜し、単独での膜厚分布、屈折率及び硬度を評価した。 In this condition, the second insulating film is 1μm deposited first, the film thickness distribution alone was evaluated with respect to refractive index and hardness. 表2は評価結果を示したものである。 Table 2 shows the evaluation results.
【0027】 [0027]
【表2】 [Table 2]
【0028】 [0028]
CMPのポリッシングストッパとして好適な硬度は6GPa以上である。 Suitable hardness as a CMP polishing stopper is at least 6 GPa. この実験結果から、第2の絶縁膜の好適な成膜条件は、酸化性ガス/主原料ガスの流量比=1.2〜100、圧力100〜400Pa、第1RF高周波パワー=0.5〜1.5W/cm 2であることがわかった。 From the experimental results, suitable conditions for forming the second insulating film, the flow rate ratio of the oxidizing gas / primary feed gas = 1.2 to 100, the pressure 100~400Pa, the 1RF RF power = 0.5 to 1.5 / it was found to be cm 2.
【0029】 [0029]
次に、CMP試験を行ったので説明する。 Next, a description will CMP tests were made. まず、上記装置及び成膜条件で第1の絶縁膜を1μm形成した。 First, a first insulating film in the apparatus and the film forming conditions were 1μm formed. その後表1の成膜条件に従いin-situで連続的に第2の絶縁膜を0.1μm形成した。 It was continuously second insulating film in-situ to 0.1μm formed in accordance with the film formation conditions of the subsequent Table 1. ダマシン構造をCMPで研磨したところ、表1のすべての条件でディッシングは検出されなかった。 A damascene structure was polished by CMP, dishing at all conditions in Table 1 were detected.
【0030】 [0030]
【効果】 【effect】
本発明に係る層間絶縁膜の製造方法によれば、ダマシン配線技術のCMP工程においてポリッシングストッパとして機能する絶縁膜を与えることができた。 According to the manufacturing method of the interlayer insulating film according to the present invention, it was able to give an insulating film functioning as a polishing stopper in the CMP process of the damascene wiring technique. その結果、低誘電率絶縁膜であるSixCyOz膜のディッシングの問題は解決された。 As a result, the dishing problem of SixCyOz film as the low dielectric constant insulating film has been solved.
【0031】 [0031]
また、本発明に係る層間絶縁膜の製造方法によれば、従来のプラズマCVD装置をそのまま使用することができるため、後処理用の付加的な装置は一切不要となり、装置スペース及びコストを増大させることはない。 According to the manufacturing method of the interlayer insulating film according to the present invention, it is possible to use the conventional plasma CVD apparatus as an additional device for post-processing at all unnecessary, increase the device space and cost it is not.
【図面の簡単な説明】 BRIEF DESCRIPTION OF THE DRAWINGS
【図1】図1は、本発明に従う半導体集積回路の多層配線用層間絶縁膜の製造方法に使用するプラズマCVD装置の略示図である。 [1] Figure 1 is a schematic view of a plasma CVD apparatus used in a method for manufacturing a multilayer wiring interlayer insulating film of a semiconductor integrated circuit according to the present invention.
【符号の説明】 DESCRIPTION OF SYMBOLS
1 プラズマCVD装置 1 plasma CVD apparatus
2 ヒータ 2 heater
3 サセプタ 3 susceptor
4 半導体ウエハ 4 semiconductor wafer
5 材料ガス導入口 5 material gas inlet
6 反応チャンバ 6 reaction chamber
7 第1高周波電源 7 the first high-frequency power source
8 第2高周波電源 8 and the second high-frequency power supply
9 シャワーヘッド 9 shower head
10 排気口 10 exhaust port
11 接地 11 ground

Claims (6)

  1. 半導体集積回路の多層配線用層間絶縁膜の製造方法であって、 A method of manufacturing a multilayer wiring interlayer insulating film of a semiconductor integrated circuit,
    シリコン系炭化水素を材料ガスとして用いてプラズマCVD法により、第1の絶縁膜を形成する工程と、 By a plasma CVD method using the silicon-containing hydrocarbon as the material gas, forming a first insulating film,
    前記第1の絶縁膜を形成した後、in-situで連続的にシリコン系炭化水素ガス及び酸化性ガスを材料ガスとして用いてプラズマCVD法により、前記第1の絶縁膜上に第2の絶縁膜を形成する工程と、 After forming the first insulating film by a plasma CVD method using a continuous silicon-containing hydrocarbon gas and oxidative gas in in-situ as a material gas, a second insulating on the first insulating film forming a film,
    から成り、 It consists of,
    前記シリコン系炭化水素は、ジメチル・ジメトキシシランまたは1,3ジメトキシテトラメチルジシロキサンである、ところの方法。 The silicon-containing hydrocarbon is a dimethyl dimethoxysilane, or 1,3-dimethoxy-tetramethyldisiloxane, where methods.
  2. 請求項1に記載の方法であって、前記酸化性ガスの流量は前記シリコン系炭化水素ガスの流量の1.2〜100倍である、ところの方法。 The method of claim 1, the flow rate of the oxidizing gas is from 1.2 to 100 times the flow rate of the silicon-containing hydrocarbon gas, where the method.
  3. 請求項1に記載の方法であって、前記酸化性ガスは、酸素、亜酸化窒素、オゾン、過酸化酸素、二酸化炭素、アルコール類の少なくとも1つから成る、ところの方法。 The method according to claim 1, wherein the oxidizing gas, oxygen, nitrous oxide, ozone, peroxide oxygen, carbon dioxide, comprises at least one alcohol, at the method.
  4. 半導体集積回路の多層配線用層間絶縁膜であって、 A multi-layer wiring interlayer insulating film of a semiconductor integrated circuit,
    シリコン系炭化水素を材料ガスとして用いてプラズマCVD法により形成された、第1の絶縁膜と、 Formed by a plasma CVD method using the silicon-containing hydrocarbon as the material gas, a first insulating film,
    前記第1の絶縁膜を形成した後、in-situで連続的にシリコン系炭化水素ガス及び酸化性ガスを材料ガスとして用いてプラズマCVD法により、前記第1の絶縁膜上に形成された第2の絶縁膜と、 After forming the first insulating film by a plasma CVD method using a continuous silicon-containing hydrocarbon gas and oxidative gas in in-situ as a material gas, which is formed on the first insulating film first and a second insulating film,
    から成り、 It consists of,
    前記シリコン系炭化水素は、ジメチル・ジメトキシシランまたは1,3ジメトキシテトラメチルジシロキサンである、ところの多層配線用層間絶縁膜。 The silicon-containing hydrocarbon is a dimethyl dimethoxysilane, or 1,3-dimethoxy-tetramethyldisiloxane, at the multi-layer wiring interlayer insulation film.
  5. 請求項4に記載の多層配線用層間絶縁膜であって、前記酸化性ガスの流量は前記シリコン系炭化水素ガスの流量の1.2〜100倍である、ところの多層配線用層間絶縁膜。 A multi-layer wiring interlayer insulation film according to claim 4, wherein the flow rate of the oxidizing gas is from 1.2 to 100 times the flow rate of the silicon-containing hydrocarbon gas, where the multi-layer wiring interlayer insulation film.
  6. 請求項4に記載の多層配線用層間絶縁膜であって、前記酸化性ガスは、酸素、亜酸化窒素、オゾン、過酸化酸素、二酸化炭素、アルコール類の少なくとも1つから成る、ところの多層配線用層間絶縁膜。 A multi-layer wiring interlayer insulation film according to claim 4, wherein the oxidizing gas, oxygen, nitrous oxide, ozone, peroxide oxygen, carbon dioxide, comprises at least one alcohol, where the multi-layer wiring use the interlayer insulating film.
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