JPH09219449A - Manufacture of semiconductor device and semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To ensure stability of processes by forming the shape of a contact hole in burying a wiring material layer into the contact hole by high-pressure reflow so that an aperture width of an aperture shoulder portion of the contact hole is gradually reduced in the direction of depth. SOLUTION: In a first process, a part of an interlayer insulating film 13 is etched to form a contact hole 14 in the interlayer insulating film 13. Then, by sputter-etching the interlayer insulating film 13 from the surface thereof, an aperture shoulder portion B of the contact hole 14 is intensively removed by etching so as to increase the radius of curvature of the aperture shoulder portion B. In a second process, an underlaying metal film 15 is formed on the interlayer insulating film 13 including inner walls of the contact hole 14, and then a wiring material layer 16 is formed on the underlying metal layer 15 in such a manner as to close the contact hole 14. In a third process, a part of the wiring material layer 16 is pushed into the contact hole 14 so as to bury the wiring material layer 16 into the contact hole 14. In this case, since the aperture shoulder portion B of the contact hole 14 has a large radius of curvature and small frictional resistance, the substrate heating temperature for ensuring reflow characteristics and the pressure in a ref1ow atmosphere may be restrained to low levels.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a semiconductor device and a method for manufacturing a semiconductor device in which a wiring material is embedded in a connection hole by a high pressure reflow method.

[0002]

2. Description of the Related Art As device structures have become finer with higher integration and higher functionality of semiconductor devices, contact holes such as contact holes and via holes formed in an interlayer insulating film have a narrow opening width. Get deeper. However, if the wiring material layer is embedded in the contact hole having such a high aspect ratio by the sputter deposition method, the shadow wing effect affects the coverage of the portion close to the bottom surface of the contact hole. However, there is a problem that a disconnection occurs at this connecting portion. Therefore, in the manufacturing process of the semiconductor device, a high pressure reflow method is performed as an alternative method to the sputter film forming method.

A method of manufacturing a semiconductor device to which the above high pressure reflow method is applied will be described below. First, as shown in FIG. 4A, for example, the lower layer wiring 12 is formed on the substrate 11,
An interlayer insulating film 13 is formed on the substrate 11 so as to cover the lower layer wiring 12. By using a resist pattern (not shown) formed by the lithography method as a mask, etching is performed to form a connection hole 14 reaching the lower layer wiring 12 in the interlayer insulating film 13. Next, as shown in FIG. 4B, a base metal film 15 is formed by a sputter film formation method while covering the interlayer insulating film 12 including the inner wall of the connection hole 14. After that, the wiring material layer 16 is formed on the interlayer insulating film 13 by sputtering. At this time, the wiring material layer 16 forms a bridge shape above the connection hole 14, the opening of the connection hole 14 is closed by the wiring material layer 16, and the wiring A is formed inside the connection hole 14. The material layer 16 is formed.

Next, as shown in FIG. 4C, the wiring material layer 16 is heated to a temperature not lower than the recrystallization temperature and not higher than the melting point to be softened, and the wiring material layer 16 is heated by a high pressure atmosphere filled with an inert gas. The wiring material layer 16 fills the inside of the connection hole 14 by a so-called high-pressure reflow method in which a part of the connection material is pushed into the connection hole 14.

[0005]

However, the above-mentioned method of manufacturing a semiconductor device has the following problems. That is, in the connection hole 14 formed by etching the interlayer insulating film 13 shown in FIG. 4A, the opening shoulder B formed by the side wall and the surface of the interlayer insulating film 13 is substantially vertical. Then, as shown in FIG. 4B, when the underlying metal film 15 is formed by sputtering so as to cover the inner wall of the connection hole 14, the connection hole 14 is formed by the shadow wing effect.
The portion of the underlying metal film 15 that covers the opening shoulder portion B of FIG. 2 has a shape that is projected more inward than the portion that covers the sidewall of the connection hole 14. Therefore, as shown in FIG. 4C, when the wiring material layer 16 is pushed into the connection hole 14 by the high pressure reflow, the friction at the opening shoulder B becomes large. In such a case,
In order to secure the filling characteristics of the wiring material layer 16, it is necessary to perform reflow at a higher temperature and a higher pressure. For example, in the case of the wiring material layer 16 containing Al (aluminum) as a main component, it is necessary to set the reflow temperature to 450 ° C. or higher and the reflow atmosphere pressure to 10 ⁶ Pa or higher. As a result, there is a problem in that the processing apparatus becomes large-scaled, or degassing occurs from the interlayer insulating film 13 during processing at a high temperature, and the stability of the process is impaired.

[0006]

Therefore, according to the present invention, in a method of manufacturing a semiconductor device in which a wiring material layer is embedded in a connection hole by high-pressure reflow, the opening width of an opening shoulder portion gradually decreases in the depth direction. Forming a connection hole in a shape in the interlayer insulating film on the substrate, or gradually decreasing the opening width of the opening shoulder portion of the connection hole in the depth direction on the interlayer insulating film including the inner wall of the connection hole. Forming the underlying metal film in this state is used as a means for solving the above problems.

In the above manufacturing method, when the wiring material layer is embedded in the connection hole by high pressure reflow, the shape of the connection hole is such that the opening width of the opening shoulder portion becomes gradually smaller in the depth direction. The frictional resistance at the opening shoulder is reduced. Therefore, the wiring material layer is embedded by setting the substrate temperature and the pressure during the high pressure reflow to lower values.

[0008]

BEST MODE FOR CARRYING OUT THE INVENTION A semiconductor device manufacturing method and a semiconductor device according to the present invention will be described below with reference to the drawings. FIG.
(1) to (3) are manufacturing process diagrams illustrating an example of a method for manufacturing a semiconductor device according to the present invention, and the first embodiment of the method for manufacturing a semiconductor device will be described with reference to these drawings. First,
In the first step shown in FIG. 1A, a lower layer wiring (wiring) 12 is formed on a substrate 11 made of, for example, silicon. Next, an interlayer insulating film 13 made of silicon oxide is formed on the substrate 11 in a state of covering the lower layer wiring 12. afterwards,
A contact hole 14 reaching the lower wiring 12 is formed in the interlayer insulating film 13 by the lithography method and the etching method. As an example, the opening width of the connection hole 14 is 0.35 μm.
m, the aspect ratio is about 2.

After performing the above steps in the same manner as in the conventional method,
The surface of the interlayer insulating film 13 is sputter-etched, and the interlayer insulating film 13 portion of the opening shoulder B of the connection hole 14 is intensively removed by etching. As a result, the radius of curvature of the opening shoulder portion B of the connection hole 14 is increased, and the opening width in the upper portion of the connection hole 14 is gradually reduced in the depth direction. Also, in this sputter etching, the connection hole 1
Etching cleaning of the 4 bottom surface is also performed at the same time.

An example of the sputter etching conditions will be shown below. Sputtering gas and flow rate: Ar (argon gas) = 100 sccm where sccm is standard cubic centimeter / min. Pressure in etching atmosphere: 0.4 Pa RF voltage: 1 kV Substrate heating temperature: 300 ° C. Etching time: 3 min

Next, in a second step shown in FIG. 1B, a base metal film 15 is formed on the interlayer insulating film 13 including the inner wall of the connection hole 14 for preventing disconnection defects due to tres migration and improving wettability. To do. As an example of the base metal film 15, a structure in which Ti 20 nm and TiN 50 nm are sequentially stacked from the lower layer is used.

An example of film forming conditions for the base metal film 15 is shown below. Ti film forming condition Sputtering gas and flow rate: Ar = 100 sccm Film forming atmosphere pressure: 0.4 Pa DC power: 5 kW Substrate heating temperature: 300 ° C. TiN film forming condition Sputtering gas and flow rate: Ar = 30 sccm N ₂ (nitrogen gas) = 80 sccm Pressure in film forming atmosphere: 0.4 Pa DC power: 5 kW Substrate heating temperature: 300 ° C.

The material used for the underlying metal film 15 is not limited to the above, but may be TiW (titanium-tungsten), W.
Any material such as (tungsten) that has a redundancy effect on reliability and wettability with respect to the wiring material layer 16 to be formed next is applicable.

Next, the wiring material layer 1 is formed on the underlying metal film 15.
6 is deposited by sputtering. At this time, the wiring material layer 16 forms a bridge shape on the connection hole 15 so that the connection hole 14
The thickness of the wiring material layer 16 is larger than at least the opening width of the connection hole 14 so that the inside is closed with the wiring material layer 16 and the void A is formed inside the connection hole 14, for example, 0.5 μm. Set the film thickness to about the same. Further, here, as the wiring material layer 16, for example, 0.5 wt% of Cu is used.
Al containing (copper) is used. As the wiring material layer 17, in addition to the above, a normal wiring material containing Al or Al as a main component, or Cu or a wiring material containing Cu as a main component is used. Also, when using the above-mentioned Al containing Cu, the content of Cu is not limited to the above.

An example of the above film forming conditions is shown below. Sputtering gas and flow rate: Ar = 100 sccm Pressure in film forming atmosphere: 0.4 Pa DC power: 20 kW Substrate heating temperature: 400 ° C. In the above sputter deposition, the substrate heating temperature is 40
By setting the temperature as high as 0 ° C., the wiring material layer 16 is likely to have a bridge shape above the connection hole 14.

Next, in the third step, as shown in FIG. 1C, heat treatment is performed in an inert gas atmosphere at a high pressure to fluidize the wiring material layer 1 while preventing oxidation.
A so-called high-pressure reflow treatment is performed in which a part of 6 is pushed into the connection hole 14 at a high pressure in an inert gas atmosphere. An example of the high pressure reflow conditions will be shown below. Reflow atmosphere pressure: 10 ⁴ Pa or more (Ar atmosphere) Substrate heating temperature: 420 ° C. Heating time: 1 minute

According to the method of manufacturing a semiconductor device described above, FIG.
In the first step described using (1), the opening width of the opening shoulder portion B of the connection hole 14 is gradually reduced in the depth direction by the sputter etching of the interlayer insulating film 13. Therefore, when the underlying metal film 15 is formed by sputtering in the second step described with reference to FIG. 1B, the shadow wing effect is less likely to occur, and the underlying metal film 15 on the opening shoulder B of the connection hole 14 is less likely to occur. Does not become particularly thick. Therefore, when the high pressure reflow is performed in the third step described with reference to FIG. 1C, the connection hole 14 is maintained in a shape in which the opening width of the opening shoulder portion B gradually decreases in the depth direction. The frictional resistance at the opening shoulder B is reduced. Therefore, during high pressure reflow, the substrate heating temperature can be lowered from the conventional 450 ° C. to 420 ° C., and the lower limit of the internal pressure of the reflow atmosphere can be lowered from 10 ⁶ Pa to 10 ⁴ Pa. Further, since only the opening shoulder B of the connection hole 14 is formed to have a round shape, the opening width of the upper portion becomes too wide as in the case where the side wall of the connection hole is formed into a tapered shape, and the wiring material is formed. The layers do not easily become bridge-shaped.

The substrate heating temperature at the time of the high pressure reflow is set at a lower limit of the pressure in the reflow atmosphere to be higher than that in the above embodiment, so that the recrystallization temperature of the wiring material layer 16 (here, 350 ° C.). It is possible to lower it to. However, preferably, the temperature is set to a temperature range higher than the film formation temperature of the wiring material layer 16 (400 ° C. in this embodiment).

Next, a second embodiment of the semiconductor device of the present invention will be described with reference to FIG. First, the first shown in FIG.
In the step, the connection hole 14 is formed in the interlayer insulating film 13 in the same manner as described with reference to FIG. 1A in the first embodiment.
However, here, the step of sputter etching the interlayer insulating film 13 from the surface is not performed. Next, after performing etching cleaning on the bottom surface of the connection hole 14, in a second step shown in FIG. 2B, the interlayer insulating film 13 including the inner wall of the connection hole 14 is formed.
A base metal film 15 made of the same material as that of the first embodiment is formed on top. However, the base metal film 15 is formed by the high temperature sputtering method in which the substrate heating temperature is set in the range of 350 ° C to 550 ° C. The substrate heating temperature is preferably within the above range, considering the applicability to the material used and the process, and is preferably lower layer wiring 12
Is set to a value that ensures the reliability of the above and prevents the silicon forming the substrate 11 from being silicidized.

An example of film forming conditions for the base metal film 15 by high temperature sputtering film formation will be shown below. The following steps are performed in the same manner as the first embodiment.

According to the method of manufacturing a semiconductor device described above, FIG.
In the second step described using (2), since the underlying metal film 15 is formed by the high temperature sputtering method, the underlying metal film 15 is formed while migrating the film forming material on the film formation surface. become. Therefore, as compared with the case where the base metal film is formed by the normal sputtering method, the base metal film 15 portion covering the opening shoulder portion B of the connection hole 14 has a large radius of curvature, and the opening of the connection hole 14 is large. The shape is such that the opening width of the shoulder B is gradually reduced in the depth direction. Therefore, similar to the first embodiment, in the third step described with reference to FIG. 2C, the frictional resistance in the opening shoulder B is reduced when the wiring material layer 16 is subjected to the high pressure reflow treatment, It is possible to lower the lower limits of the substrate heating temperature and the pressure in the reflow atmosphere.

Next, a third embodiment of the semiconductor device of the present invention will be described with reference to FIG. The difference between the method of manufacturing the semiconductor device described here and the method described in the second embodiment is that when the base metal film 15 is formed in the second step shown in FIG. There is a point to do.
Then, except for this step, it is performed in the same manner as the second embodiment.

An example of film forming conditions for the base metal film 15 by bias sputtering film formation is shown below.

In the above-mentioned sputtering film formation method, film formation is performed while re-sputtering the underlying metal film material adhered particularly to the opening shoulder portion B of the connection hole 14 by Ar ions incident on the substrate 11 to which a DC voltage is applied. proceed. Therefore, the base metal film 15 formed here is compared with the base metal film formed by the normal sputtering method in the opening shoulder portion B of the connection hole 14.
The radius of curvature of the portion of the underlying metal film 15 that covers the upper portion increases,
The shape is such that the opening width of the connection hole 14 is gradually reduced in the depth direction. Therefore, as in the first and second embodiments, in the third step described with reference to FIG. 3C, the opening shoulder portion B of the connection hole 14 is subjected to the high pressure reflow treatment of the wiring material layer 16. And the lower limit of the substrate heating temperature and the reflow atmosphere internal pressure can be lowered.

Each of the embodiments described above is a combination of the first embodiment and at least one of the second embodiment and the third embodiment, or the second embodiment and the third embodiment. It is also possible to carry out in combination. As described above, according to the method implemented by combining the embodiments, the radius of curvature of the opening shoulder portion of the connection hole is further increased as compared with the case where the above embodiments are implemented alone, and the high pressure reflow process is performed. The lower limits of the substrate heating temperature and the pressure in the reflow atmosphere can be further reduced.
Further, the connection hole 14 may reach the diffusion layer formed on the front surface side of the substrate 11. However, in this case, in order to secure the barrier property between the substrate and the wiring material layer, the diffusion layer is covered with a barrier metal, or a material having a barrier property is used as the base metal film.

[0026]

As described above, according to the method of manufacturing a semiconductor device of the present invention, the shape of the connection hole when the wiring material layer is embedded in the connection hole by the high pressure reflow is changed to the opening width of the opening shoulder portion. By gradually decreasing in the depth direction, the frictional resistance at the opening shoulder is reduced, and the substrate temperature and pressure during high-pressure reflow are set to lower values to embed the wiring material layer. Can be done. Therefore, it is possible to reduce the size of the semiconductor device manufacturing apparatus and ensure process stability.

[Brief description of drawings]

FIG. 1 is a manufacturing process diagram illustrating a first embodiment.

FIG. 2 is a cross-sectional view illustrating a second embodiment.

FIG. 3 is a cross-sectional view illustrating a third embodiment.

FIG. 4 is a manufacturing process diagram illustrating a conventional example.

[Explanation of symbols]

13 Interlayer Insulating Film 14 Connection Hole 15 Base Metal Film 16 Wiring Material Layer B Opening Shoulder

Claims (5)

[Claims] 1. A semiconductor in which a wiring material layer is formed on an interlayer insulating film in which a connection hole is formed so as to close the inside of the connection hole, and a part of the wiring material layer is pressed into the connection hole by high pressure reflow. The method of manufacturing a semiconductor device according to claim 1, wherein the connection hole is formed in a shape in which an opening width of an opening shoulder portion thereof gradually decreases in a depth direction. 2. The method of manufacturing a semiconductor device according to claim 1, wherein the connection hole is formed by etching a portion of the interlayer insulating film in a substantially vertical direction by etching, and thereafter, the surface of the interlayer insulating film is sputter-etched. A method of manufacturing a semiconductor device, which is formed by: 3. A wiring material layer, in which a base metal film is formed on the interlayer insulating film including an inner wall of a connection hole formed in the interlayer insulating film, and then the connection hole is closed on the base metal film. In the method for manufacturing a semiconductor device in which a part of the wiring material layer is pressed into the connection hole by high-pressure reflow after forming a film, the base metal film has an opening width of an opening shoulder portion of the connection hole in a depth direction. A semiconductor device characterized in that the semiconductor device is formed in a shape that gradually decreases toward the front. 4. The method of manufacturing a semiconductor device according to claim 3, wherein the base metal film is formed by a high temperature sputtering method. 5. The method of manufacturing a semiconductor device according to claim 3, wherein the base metal film is formed by a bias sputtering method.