JPH09213917A - Optical semiconductor integrated circuit device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent a photo diode deteriorated in frequency characteristic due to a parasitic capacitance and adjacent photo diodes from malfunctioning by forming a reverse conductivity type epitaxial layer on a semiconductor substrate and dielectric isolation region piercing the epitaxial layer to the substrate. SOLUTION: A p-type semiconductor substrate 11 uses a Si single crystal substrate to mechanically support a semiconductor integrated circuit device. An n-type epitaxial layer 12 is laminated on the substrate 11 and dielectric isolation region 13 is composed of trenches 17 extending from the surface of the epitaxial layer 12 to the substrate 11, wall oxide film 18, and dielectric layer 19. This region 13 perfectly surrounds and isolates island regions 20 which form an optical semiconductor device. Thus, the frequency characteristic can be greatly improved to realize a high speed operation. Mutual interference due to flow-in of carriers generated by isolation at the p-n junction is completely avoided and this contributes to the elevation of the degree of integration.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an optical semiconductor integrated circuit device incorporating an optical semiconductor device such as a photodiode using dielectric isolation.

[0002]

2. Description of the Related Art A monolithic optical semiconductor integrated circuit device in which a photodiode, which is a light receiving element, and its peripheral circuit are integrated is manufactured separately, and a significant cost reduction can be realized as compared with a hybridized integrated circuit device. It also has a strong advantage against external noise caused by electromagnetic fields.

As a conventional optical semiconductor integrated circuit device, for example, one disclosed in Japanese Patent Publication No. 1-205564 is known. A conventional optical semiconductor integrated circuit device will be described with reference to FIGS. In FIG. 8, (1) is P
Type semiconductor substrate, (2) is an N-type epitaxial layer,
(3) is a P + type lower isolation region, (4) is a P + type upper isolation region, (5) is an N + type cathode extraction diffusion region,
(6) is a cathode electrode, and (7) is a silicon oxide film.

In such a structure, the PN junction formed between the semiconductor substrate (1) and the epitaxial layer (2) surrounded by the upper isolation region (4) and the lower isolation region (3) is used as a photodiode. Used. In this photodiode, carriers generated by light incident on the epitaxial layer (2) are detected as current from the cathode electrode (6) in ohmic contact with the cathode extraction diffusion region (5) and used.

FIG. 9 shows the detection circuit. The detection resistor R and the photodiode PD are connected in series between the DC power source E,
The potential of the connection node between the photodiode PD and the detection resistor R is detected by the operational amplifier OP. The capacitor C connected in parallel to the photodiode PD is a depletion layer shown by a dotted line in FIG. 8 formed by a reverse bias potential between the upper and lower isolation regions (3) and (4) and the epitaxial layer (2). It is the parasitic capacitance due to (8).

Further, in FIG. 8, two adjacent photodiodes are shown. The detection circuits shown in FIG. 9 are connected to the respective photodiodes, and they are naturally integrated in the same integrated circuit device.

[0007]

However, in the optical semiconductor integrated circuit device having such a structure, a parasitic capacitance is inevitably formed by the depletion layer (8), so that a time constant circuit is formed with the detection resistor R shown in FIG. The larger the parasitic capacitance formed, the worse the frequency characteristics of the photodiode PD, and there is the problem of impeding high-speed operation.

When a plurality of photodiodes PD are arranged adjacent to each other as shown in FIG.
When light is incident on the separation regions (3) and (4) separating between D, carriers excited by the light flow into both adjacent photodiodes PD. Therefore, there is a problem that even the photodiode PD, which does not want the light to enter, is detected to have the light to enter. In order to prevent this, the integration degree is lowered due to the restriction of forming the isolation regions (3) and (4) sufficiently larger than the spot of incident light or arranging the photodiodes PD completely independently. There was also a problem that caused it.

[0009]

SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned conventional problems, and by separating the functional epitaxial layer surrounding the photodiode with a dielectric isolation region,
(EN) An optical semiconductor integrated circuit device which prevents deterioration of frequency characteristics due to parasitic capacitance and malfunction of an adjacent photodiode.

According to the present invention, since the dielectric isolation region is used, the depletion layer is not generated by the reverse bias potential between the dielectric isolation region and the epitaxial layer, the parasitic capacitance due to the depletion layer is not present, and the frequency of the photodiode is reduced. It is possible to eliminate deterioration of characteristics and realize high-speed operation. According to the present invention,
When multiple adjacent photodiodes are formed, the photodiodes are separated by the dielectric isolation region, so even if light is incident on the dielectric isolation region, carriers excited by the light from the dielectric isolation region Is not generated, and malfunction between adjacent photodiodes can be prevented.

[0011]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below in detail with reference to the drawings. FIG. 1 is a sectional view showing an optical semiconductor integrated circuit device according to the present invention. FIG. 2 is a plan view showing an optical semiconductor integrated circuit device according to the present invention. In FIG.
(11) is a P-type semiconductor substrate, (12) is an N-type epitaxial layer, (13) is a dielectric isolation region, (14) is an N + type cathode extraction diffusion region, (15) is a cathode electrode, (16) ) Is a silicon oxide film.

A silicon single crystal substrate is used as the P-type semiconductor substrate (11), and when the semiconductor integrated circuit device is completed,
It has a specific resistance of 00 to 1500 Ω · cm, and since it mechanically supports the semiconductor integrated circuit device, it is formed as thick as 300 μm or more. The N 1 -type epitaxial layer (12) is grown on the semiconductor substrate (11) by phosphorus (P) doping by a vapor phase growth method, and is laminated to have a thickness of 4 to 10 μm. This thickness is selected to be optimum depending on the incident light.

The dielectric isolation region (1
3) is a trench (17) extending from the surface of the epitaxial layer (12) to the semiconductor substrate (11), and a wall oxide film (18) of about 3000 Å formed by oxidizing the surface and polycrystalline silicon filling the trench (17). And other dielectric material layers (19). In the present invention, an island region (20) forming an optical semiconductor device such as a photo diode is formed.
Is characterized in that it is completely surrounded by this dielectric isolation region (13). Therefore, as shown in FIG. 1, when a plurality of optical semiconductor devices are formed adjacent to each other, the island regions (20) of both optical semiconductor devices are completely separated by the dielectric isolation region (13).

N-type cathode extraction diffusion region (1
4) is formed on the upper surface of the epitaxial layer (12) at the same time as the emitter diffusion of the NPN transistor by the selective diffusion method. The cathode extraction diffusion region (1
4) is provided with an aluminum cathode electrode (15) in ohmic contact. The above-described optical semiconductor device according to the present invention may be incorporated alone in a semiconductor integrated circuit device, or as shown in FIG. 2, a plurality of optical semiconductor devices may be arranged in a line and incorporated. In such an optical semiconductor device, a P-type semiconductor substrate (11) forms a common anode region, and N-type epitaxial layers (12) individually separated by a dielectric isolation region (13) form a cathode region. , The PN junction formed by the semiconductor substrate (11) and the N-type epitaxial layer (12) is the P of each optical semiconductor device.
It forms an N junction.

As the detection circuit of the optical semiconductor device according to the present invention, a circuit similar to that shown in FIG. 9 is used, and when there are a plurality of optical semiconductor devices, the detection circuit is individually provided. Naturally, this detection circuit is integrated in the epitaxial layer (12) near the optical semiconductor device. In such an optical semiconductor device according to the present invention, since the epitaxial layer (12) is electrically isolated by the dielectric isolation region (13), a reverse bias potential for isolation is applied to the dielectric isolation region (13). The application becomes unnecessary and the depletion layer due to the reverse bias generated at the time of PN separation is completely eliminated. Therefore, no parasitic capacitance is generated by the depletion layer, and the time constant circuit formed by the detection resistor R of the detection circuit shown in FIG. 9 can be eliminated. As a result, the frequency characteristics of an optical semiconductor device such as a photodiode can be significantly improved and high speed operation can be realized.

When a plurality of optical semiconductor devices such as photodiodes are arranged adjacent to each other in series as shown in FIG. 2, light spots (2
Since 1) is usually larger than the width of the separation region, this spot (21) is surely incident over both optical semiconductor devices when it moves to the adjacent optical semiconductor device. Since the dielectric isolation region (13) is adopted in the present invention, even if the spot (21) is incident on the dielectric isolation region (13), it is excited from the dielectric isolation region (13) by the incidence of this light. Since the generated carriers are not generated, the spot (2
0) can detect an optical semiconductor device with a large incidence,
Mutual interference due to carrier inflow that occurs in the conventional PN junction separation can be completely prevented.

Next, a method of manufacturing an optical semiconductor integrated circuit device according to the present invention will be described below with reference to FIGS.
First, in FIG. 3, N- is formed on the P-type semiconductor substrate (11).
A mold epitaxial layer (12) is laminated. In this step, an N-type epitaxial layer (12) having a thickness of about 0.5 Ω · cm is laminated to a thickness of about 4 to 10 μm by a known vapor phase growth method. The thickness of the epitaxial layer (12) is usually controlled by the time, and a thickness suitable for the incident light is selected. The surface of the epitaxial layer (12) is formed by thermal oxidation of the first silicon oxide film (31).

In FIG. 4, the epitaxial layer (12) is shown.
A trench (17) is formed so as to pass through. A silicon nitride film (32) of about 1000 Å is deposited on the first silicon oxide film (31) by a low pressure CVD method. Then, about 5000 Å phosphorous glass (PSG) layer (33)
Are attached by a low pressure CVD method. After baking
The first silicon oxide film (3) on the planned trench (17)
1), silicon nitride film (32) and phosphorous glass layer (3)
3) Planned trench (1) for selective etching of
7) Cover with photoresist layer (34) except on top. Subsequently, the phosphorus glass layer (3
3), the silicon nitride film (32) and the first silicon oxide film (31) are removed in this order, and the exposed epitaxial layer (12) of silicon is anisotropically dry-etched to obtain a semiconductor substrate (11). Trench reaching up to (17)
To form

In FIG. 5, the photoresist layer (34).
Then, the trench (17) is filled with a polycrystalline silicon layer (36) which is a dielectric material. First, a thin dummy oxide film (not shown) with a thickness of about 1000Å is formed by dummy oxidation in the side surface of the trench (17) at 900 ° C in a steam atmosphere. Oxidized inside, about 3000Å
A wall oxide film (18) is formed. Next, non-doped polycrystalline silicon is applied to the entire surface under reduced pressure C to a thickness of about 1.5 μm.
It is deposited by the VD method and the inside of the trench (17) is filled with a dielectric material layer (19).

In FIG. 6, the polycrystalline silicon deposited on the surface is etched back by anisotropic etching and removed, leaving only the polycrystalline silicon in the trench (17). Next, using the silicon nitride film (32) as a mask, selective oxidation is performed to form a cap oxide film (35) of about 2500 Å on the upper surface of the polycrystalline silicon layer (19) of the trench (17).
To form After that, the silicon nitride film (32) is removed,
At the same time, the cap oxide film (35) is also removed, so that a flat upper surface is formed.

In FIG. 7, on the surface of the island region (20) formed of the epitaxial layer (12) surrounded by the dielectric isolation region (13), an N + type cathode extraction diffusion region (14) is formed by a selective diffusion method. ) Is formed. For example, the cathode extraction diffusion region (14) is often formed at the same time as the emitter diffusion of the NPN transistor. After that, the silicon oxide film (1
After forming a contact hole in 6), an aluminum layer is deposited on the entire surface by sputtering, and dry etching is performed in a predetermined shape to form a cathode electrode (15).

Assuming that the surface of the epitaxial layer (12) of the photodiode PD is a square with one side Lμ and the thickness of the epitaxial layer (12) is tμ,
The stray capacitance Cpn of the photodiode PD in the conventional upper and lower PN junction isolation structure shown in FIG.

[0023]

[Equation 1]

Here, d is the width (μm) of the depletion layer (8), which is a function of the voltage applied to the PN junction isolation, and therefore can be regarded as a constant under the same use conditions. S is a surface area (μm × μm) including the side surface of the photodiode PD, which can also be expressed by Expression 2.

[0025]

[Equation 2]

On the other hand, in the photodiode PD having the dielectric isolation according to the present invention, the stray capacitance on the side wall is so small as to be negligible, so that the stray capacitance can be expressed by the equation 3.

[0027]

(Equation 3)

Therefore, the stray capacitance of the photodiode of the present invention can be reduced more than that of the conventional photodiode PD by the amount of the equation 4 which is the difference between the equation 1 and the equation 3.

[0029]

(Equation 4)

Specifically, L is 100 μ square, t is 5 μ,
If the voltage applied to the PN junction isolation is 1 V, then Table 1 is obtained.

[0031]

[Table 1]

FIG. 10 shows the characteristics of the stray capacitance Cpn of the photodiode PD of the related art and the present invention. From FIG. 10, the photodiode PD of the present invention can be reduced by about 30% from the stray capacitance of the conventional photodiode PD of the same size. Further, if the size of the photodiode PD is reduced, the ratio (Cpn / Ctr) of the stray capacitances of the related art and the present invention increases. That is, the ratio of the stray capacitance can be expressed by Equation 5.

[0033]

(Equation 5)

This ratio is shown in FIG. This indicates that the PN junction area on the lower surface of the photodiode PD becomes smaller and the effect of the present invention becomes more remarkable. Therefore, when condensed into a small spot like a photodiode for receiving a laser beam, the photodiode naturally has a small area, and the effect of reducing the stray capacitance by the structure of the present invention is significantly increased.

Therefore, in the detection circuit shown in FIG. 9, the cutoff frequency fc is given by the equation 6, and the photodiode P
The cut-off frequency fc is determined by the stray capacitance Ctr of D. FIG. 12 shows a characteristic diagram comparing the characteristics of the cutoff frequency fc between the conventional structure and the structure of the present invention.

[0036]

(Equation 6)

On the other hand, since the sensitivity of the photodiode PD is naturally proportional to its area, the sensitivity of the conventional invention is obtained if the area is the same. However, in the structure of the present invention, the stray capacitance Ct
Higher speed operation is possible because r can be reduced. Finally, in the structure of the present invention, when a plurality of photodiodes PD are arranged adjacent to each other, the carriers are not excited here even if light is incident on the dielectric isolation region (13), so that the photo-incidence is not desired. Even when a photodiode that is incident light is located next to the diode PD and the incident light also reaches the dielectric isolation region (13) between the two, a photodiode PD that does not want the incident light is detected. It is possible to completely prevent the conventional defect that malfunctions are caused by the carriers excited in the separated portion. Therefore, a plurality of photodiodes P
The arrangement of Ds is free, and they can be arranged closer to each other than in the conventional case, which can contribute to the improvement of the degree of integration.

[0038]

As described above, according to the present invention, the frequency characteristics of an optical semiconductor device such as a photodiode can be greatly improved and high speed operation can be realized. Further, when a plurality of photodiodes are arranged adjacent to each other, mutual interference due to carrier inflow that occurs in the conventional PN junction separation can be completely prevented, so that the plurality of photodiodes PD can be arranged freely. Further, since they can be arranged closer to each other than the conventional one, there is an advantage that they can contribute to the improvement of the degree of integration.

[Brief description of drawings]

FIG. 1 is a sectional view for explaining an optical semiconductor integrated circuit device of the present invention.

FIG. 2 is a plan view for explaining an optical semiconductor integrated circuit device of the present invention.

FIG. 3 is a cross-sectional view for explaining the manufacturing method of the optical semiconductor integrated circuit device of the present invention.

FIG. 4 is a cross-sectional view for explaining the manufacturing method of the optical semiconductor integrated circuit device of the present invention.

FIG. 5 is a cross-sectional view for explaining the manufacturing method of the optical semiconductor integrated circuit device of the present invention.

FIG. 6 is a cross-sectional view for explaining the manufacturing method of the optical semiconductor integrated circuit device of the present invention.

FIG. 7 is a cross-sectional view for explaining the method for manufacturing the optical semiconductor integrated circuit device of the present invention.

FIG. 8 is a cross-sectional view for explaining a conventional optical semiconductor integrated circuit device.

FIG. 9 is a circuit diagram illustrating a detection circuit of an optical semiconductor device used in the related art and the present invention.

FIG. 10 is a characteristic diagram showing a stray capacitance Cpn of a photodiode.

FIG. 11 is a characteristic diagram showing a ratio of stray capacitances.

FIG. 12 is a characteristic diagram showing a cutoff frequency.

Claims (7)

[Claims] 1. A semiconductor substrate of one conductivity type, a reverse conductivity type epitaxial layer formed on the semiconductor substrate, and a dielectric isolation region penetrating the epitaxial layer and reaching at least the semiconductor substrate, An optical semiconductor integrated circuit device, wherein an optical semiconductor device using the epitaxial layer surrounded by the dielectric isolation region is formed. 2. A semiconductor substrate of one conductivity type, an epitaxial layer of an opposite conductivity type formed on the semiconductor substrate, and a dielectric isolation region penetrating the epitaxial layer and reaching at least the semiconductor substrate. An optical semiconductor integrated circuit device comprising an optical semiconductor device using a PN junction formed of the semiconductor layer and the epitaxial layer surrounded by the dielectric isolation region. 3. The optical semiconductor integrated device according to claim 1, wherein the dielectric isolation region is formed of a trench reaching the semiconductor substrate and polycrystalline silicon filling the trench. Circuit device. 4. The optical semiconductor integrated circuit device according to claim 1, wherein the optical semiconductor device is a photodiode. 5. A semiconductor substrate of one conductivity type, an epitaxial layer of opposite conductivity type formed on the semiconductor substrate, and a dielectric isolation region penetrating the epitaxial layer and reaching at least the semiconductor substrate. An optical semiconductor integrated circuit device comprising: a plurality of optical semiconductor devices using a plurality of the epitaxial layers which are surrounded by the dielectric isolation region and are adjacent to each other. 6. The optical semiconductor integrated circuit device according to claim 4, wherein the dielectric isolation region is formed of a trench reaching the semiconductor substrate and polycrystalline silicon filling the trench. 7. The optical semiconductor integrated circuit device according to claim 5, wherein the optical semiconductor device is a photodiode.