JP2957837B2 - Photo detector and photo detector with built-in circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a structure for increasing the response speed of a light receiving element, particularly a light receiving element having a built-in signal processing circuit.

[0002]

2. Description of the Related Art Light receiving elements with built-in circuits are widely used in optical sensors, photocouplers, and the like.

FIG . 8 is a schematic sectional view showing the structure of an example of a conventional general light receiving element with a built-in circuit.
854.

[0006] A portion shown in FIG. 1A is provided with a PIN photodiode, and a portion shown in FIG. 1B is provided with an NPN transistor as an example of a signal processing circuit. This structure is manufactured by the following method.

First, an N-type high resistivity epitaxial layer 3 is grown on the surface of a first conductivity type, for example, an N-type semiconductor substrate 1. Next, a bottom layer 5 for element isolation containing a high-concentration second conductivity type, for example, a P-type impurity is formed in the signal processing circuit formation region on the N-type high resistivity epitaxial layer 3 by ion implantation or thermal diffusion. I do. Next, an N-type buried diffusion layer 6 is formed on a part of the inside of the element isolation bottom layer 5, and a P-type buried element isolation layer is formed in a region corresponding to an end of the element isolation bottom layer 5. The diffusion layer 7-1 is formed.

[0006] Thereafter, N is grown by epitaxial growth.
An N-type high-resistivity epitaxial layer 12 is laminated on the P-type high-resistivity epitaxial layer 3 and a P-type buried element isolation diffusion layer 7 is formed.
A P-type element isolation diffusion layer 8-1 is formed from the surface of the N-type high resistivity epitaxial layer 12 in a portion corresponding to −1.

Here, since the N-type high resistivity epitaxial layer 12 has a high resistivity, if the signal processing circuit portion is left as it is, an increase in V _CE (at the time of saturation) of the NPN transistor and an increase in the frequency characteristic will occur. In order to make the impurity concentration of the N-type high-resistivity epitaxial layer 12 in the signal processing circuit portion suitable for the signal processing circuit, ion implantation or thermal diffusion method is used. Performs N-type diffusion from the surface of N-type high resistivity epitaxial layer 12.

Next, a P-type diffusion layer 8 serving as an anode of a photodiode is formed from the surface of the N-type epitaxial layer 12 at the portion shown in FIG. A diffusion layer 9, a base P-type diffusion layer 10,
When an N-type diffusion layer 11 serving as an emitter is sequentially formed, FIG.
Is completed.

[0009]

However, the above-mentioned conventional light receiving element with a built-in circuit has the following problems.

Normally, when optimizing the structure of a photodiode as shown in FIG.
The thickness of the N-type high resistivity epitaxial layers 3 and 12 existing between the lower end of the P-type diffusion layer 8 serving as the anode and the N-type semiconductor substrate 1 depends on the reverse bias condition applied to the photodiode and the N-type high resistivity. It is determined from the impurity concentration of the resistive epitaxial layers 3 and 12. This is because the reverse bias applied to the photodiode completely depletes the high resistivity portion. If the N-type high-resistivity epitaxial layer is thick and the high-resistivity portion is not completely depleted, the high-resistivity portion increases the series resistance of the photodiode and reduces the responsiveness of the photodiode. Would. Further, carriers generated in the high resistivity portion that has not been depleted move to the end of the depletion layer due to diffusion, thereby lowering the responsiveness of the photodiode. Conversely, when the high resistivity epitaxial layer is thin, the depletion layer is insufficiently expanded, so that the junction capacitance of the photodiode is increased and the response of the photodiode is reduced.

For example, when the reverse bias applied to the photodiode is 3 V and the specific resistance of the N-type high-resistivity epitaxial layer is 100 Ωcm, the width of the depletion layer is about 10 μm. Layer 8
Has a diffusion depth of 1 μm, and has an N-type semiconductor substrate 1 formed by heat treatment.
It can be understood that the total thickness of the n-type high-resistivity epitaxial layer 3 and the N-type high-resistivity epitaxial layer 12 should be about 18 μm, assuming that the rise of the impurity from the substrate is 7 μm.

However, the frequency characteristic of the photodiode when a laser light having a wavelength of 830 nm is modulated is incident on the photodiode having such a structure, for example, as shown in FIG. 830n
The laser beam of m is 18 μm from the surface of the N-type high resistivity epitaxial layer 12 and is absorbed by about 80% to generate electron-hole pairs in the depletion layer, while the remaining 20% is the N-type semiconductor substrate 1. , Where electron-hole pairs are generated. The photocarriers generated in the portion where the impurities have risen from the N-type semiconductor substrate 1 due to the heat treatment move quickly and reach the end of the depletion layer due to the internal electric field due to the concentration gradient. However, optical carriers generated in the N-type semiconductor substrate 1 have a short lifetime due to the high impurity concentration of the N-type semiconductor substrate 1, and most of the generated optical carriers disappear.
The photocarriers that have not disappeared reach the edge of the depletion layer by diffusion and contribute to the photocurrent, which causes a decrease in the output from the low-frequency band as shown in FIG . When the frequency characteristics of the photodiode become such, if the output of the photodiode is input to the signal processing circuit, a problem such as jitter occurs. FIG. 9 shows the characteristic of the ideal value.

In order to prevent such a decrease in the output from the low frequency band, all the photocarriers are generated in the depletion layer or in the portion where the impurities have risen from the N-type semiconductor substrate 1 by the heat treatment. Just do it. For this, N
It is sufficient to prevent the light from entering the N-type semiconductor substrate 1 by increasing the thickness of the high-resistivity type epitaxial layer.
In the case of a laser beam having a wavelength of 30 nm, in order to absorb 99% of the light in the N-type high resistivity epitaxial layer, the thickness of the epitaxial layer is required to be about 54 μm. At this time, in order to completely deplete the high-resistance portion by the reverse bias applied to the photodiode so that the response speed does not decrease, the N-type high-resistivity epitaxial layer must have a high resistance or a reverse bias applied to the photodiode. You just need to increase it.

However, it is 200 Ωcm or less that can be grown accurately while controlling the specific resistance of the epitaxial layer. In this case, it is necessary to apply 50 V or more to the photodiode. Is usually used at 10 V or less, so that it is impossible to completely deplete the high resistance portion.

An object of the present invention is to provide a light receiving element with a built-in circuit having a photodiode having a flat frequency characteristic and a wide band in which the output from a low frequency band in such a frequency characteristic is prevented from lowering. .

[0016]

According to the present invention, there is provided the following:
An N-type diffusion layer having a higher impurity concentration than that of the semiconductor substrate is buried at least in a region where the light-receiving element is to be formed on the semiconductor substrate of the conductivity type of above, and an N-type high resistivity epitaxial layer and an N-type The light-receiving element was formed by a portion including an anode formed by a P-type diffusion layer formed on the surface of the N-type epitaxial layer and the N-type high-resistance epitaxial layer. Also,
The light-receiving element and the signal processing circuit element are separated from the P-type diffusion layer buried in the signal processing circuit element planned area on the surface of the N-type high specific resistance epitaxial layer and the surface of the N-type high specific resistance or low specific resistance epitaxial layer. Separated by the diffused P-type diffusion layer.

[0017]

According to the present invention, an electron-hole pair generated in an N-type semiconductor substrate does not contribute to photocurrent, so that a photodetector with a built-in circuit that has a flat frequency characteristic and can operate at high speed is provided. Can be.

[0018]

FIG. 1 is a schematic sectional view of a light-receiving element with a built-in circuit according to an embodiment of the present invention. 2 to 4 are schematic sectional views of respective steps for obtaining the structure of FIG. In these drawings, the same elements as those of the conventional example are denoted by the same reference numerals, and duplicate description will be omitted.

For convenience, a schematic sectional view of each step of FIGS. 2 to 4 for obtaining the structure of FIG. 1 will be described.

First, as shown in FIG. 2, a high impurity concentration first conductivity type, for example, an N-type semiconductor substrate 1 is provided with a higher impurity concentration than that of the N-type semiconductor substrate 1 in a photodiode expected region as a light receiving element. An N type diffusion layer 2 having a concentration is formed. Next, as shown in the figure, a high resistivity epitaxial layer 3 is grown over the entire surface. This conductivity type is desirably close to an intrinsic semiconductor, and is denoted by i in the figure. This thickness is determined in consideration of the reverse bias applied to the photodiode and the specific resistance of the high resistivity epitaxial layer 3 when the response speed is designed with the highest priority. The high-resistivity epitaxial layer 3 can operate at high speed when all layers are depleted. For example, if the specific resistance of the epitaxial layer is 100 Ωcm and the reverse bias is 3 V, the thickness of the epitaxial layer is about 18 μm as in the conventional example.

Thereafter, as shown in FIG. 3, a P-type element isolation region is formed in the region where the signal processing circuit is to be formed on the high resistivity epitaxial layer 3 by ion implantation or thermal diffusion from the surface of the high resistivity epitaxial layer 3. The bottom layer 5 is formed.
Next, an N-type buried diffusion layer 6 is formed on a part of the inside of the element isolation bottom layer 5 in order to reduce the parasitic operation of the signal processing circuit element and the collector series resistance of the NPN transistor.

Next, as shown in FIG. 4, a P-type buried element isolation diffusion layer 7-1 is formed in a region corresponding to the end of the bottom layer 5 for element isolation. At the same time, the P-type buried diffusion layer 7 is formed as an anode diffusion in the photodiode portion.
To form Then, by the epitaxial layer growth method,
An N-type low-resistivity epitaxial layer 4 is laminated on the N-type high-resistivity epitaxial layer 3, and a portion of the N-type low-resistivity epitaxial layer 4 corresponding to the P-type buried element isolation diffusion layer 7-1 is provided. A P-type element isolation diffusion layer 8-1 is formed from the surface. At the same time, a P-type diffusion layer 8 is formed from the surface of the N-type low resistivity epitaxial layer 4 in a portion corresponding to the P-type buried diffusion layer 7 as an anode diffusion in the photodiode portion. Here, the N-type low resistivity epitaxial layer 4 is
For example, the thickness is 2 μm and the specific resistance is 1 Ωcm, since it may be suitable for the signal processing circuit portion.

Next, an N-type diffusion layer 9 for a collector, a P-type diffusion layer 10 as a base, and an N-type diffusion layer 11 as an emitter are sequentially formed in the signal processing circuit element portion, and the structure shown in FIG. Complete.

As shown in FIG. 1, an N-type diffusion layer 2 having a high impurity concentration is provided by being buried in a photodiode portion.
A broadband photodiode with flat frequency characteristics can be realized.

FIG. 5 is a potential diagram with respect to holes of the photodiode in the present invention. The vertical axis indicates the potential, and the horizontal axis indicates the depth from the photodiode surface. Holes that become diffusion current components generated in the N-type semiconductor substrate 1 are pushed to the substrate side by the potential distribution of the N-type diffusion layer 2 having a high impurity concentration, and the holes of the N-type semiconductor substrate 1 and the N-type high resistivity epitaxial layer 3 are removed. Carriers generated deeper than the interface do not contribute to photocurrent. Further, since the impurity concentration of the N-type diffusion layer 2 can be set to a high impurity concentration that cannot be realized by the N-type semiconductor substrate 1, the lifetime can be shortened and the diffusion current component can be reduced. By this effect, a photodiode having a flat frequency characteristic and a wide band can be realized.

In FIG. 1, element isolation is performed by the P-type buried element isolation diffusion layer 7-1 and the P-type element isolation diffusion layer 8-1. Therefore, the element isolation may be performed only by one deep diffusion of P-type.

Although the P-type buried diffusion layer 7 and the P-type diffusion layer 8 are used as the anode diffusion in FIG. 1, the N-type low resistivity epitaxial layer is used without using the P-type buried diffusion layer 7. 4, the N-type low resistivity epitaxial layer 4
The anode may be formed only with a P-type diffusion layer having a diffusion depth that penetrates through.

In FIG. 1, after forming a P-type diffusion layer 8 and a P-type element isolation diffusion layer 8-1 as an anode diffusion in a photodiode portion, a P-type diffusion layer 10 serving as a base is formed. However, the P-type diffusion layer 8 and the P-type element isolation diffusion layer 8-1 may not be separately formed, and may be formed simultaneously with the base P-type diffusion layer 10.

Further, in FIG. 1, the N-type diffusion layer 9 for the collector and the N-type diffusion layer 11 serving as the emitter are separately formed, but the N-type diffusion layer 9 for the collector is replaced with the N-type diffusion layer 9 for the emitter.
It may be formed simultaneously with the mold diffusion layer 11.

In FIG. 1, the cathode terminal of the photodiode is taken out from the back surface of the wafer. However, when forming the N-type buried diffusion layer 6, the N-type diffusion layer 9, etc., this step is appropriately performed. And the cathode terminal may be taken out from the surface of the N-type low resistivity epitaxial layer 4.

Furthermore, although the embodiment uses the junction separation method, the oxide film separation method can be realized by a normal bipolar IC manufacturing process, so that a bipolar IC having extremely high performance can be incorporated. It is. The active element formed in the signal processing formation region B is not limited to a bipolar transistor, but may be a field effect transistor (FET) or the like.

FIG. 6 is a schematic sectional view of another embodiment,
The same elements as those in FIG. 1 are denoted by the same reference numerals, and redundant description will be omitted. The difference from FIG. 1 is that the N-type semiconductor substrate 1
That is, the buried high impurity concentration N-type diffusion layer 2 is diffused over the entire surface of the N-type semiconductor substrate 1. By doing so, since the photolithography step and the etching step when forming the N-type diffusion layer 2 can be omitted, there is an advantage that the cost of the semiconductor device can be reduced.

[0033]

FIG. 7 is a schematic sectional view of still another embodiment, in which the same elements as those in FIG. 1 are denoted by the same reference numerals, and redundant description will be omitted. The difference from FIG. 1 is that the N-type high-resistivity epitaxial layer 1 is replaced with the N-type low-resistivity epitaxial layer 4 on the N-type high-resistivity epitaxial layer 3.
2 is used. However, in this case, it is necessary to lower the epitaxial layer specific resistance of the signal processing circuit portion, so that it is necessary to perform N-type diffusion only on the signal processing circuit portion.

[0035]

Since the present invention has the above structure,
The frequency characteristics of the photodiode can be improved, and a light receiving element with a built-in circuit incorporating a photodiode having a flat frequency characteristic, a wide band, and a high response speed can be obtained.

[Brief description of the drawings]

FIG. 1 is a schematic sectional view of one embodiment of the present invention.

FIG. 2 is a schematic sectional view of one step for obtaining the structure of FIG.

FIG. 3 is a schematic sectional view of one step for obtaining the structure of FIG. 1;

FIG. 4 is a schematic sectional view of one step for obtaining the structure of FIG. 1;

FIG. 5 is a potential diagram in the structure of the present invention.

FIG. 6 is a schematic sectional view of another embodiment of the present invention.

FIG. 7 is a schematic sectional view of another embodiment of the present invention.

FIG. 8 is a schematic cross-sectional view of an example of the related art.

FIG. 9 is a graph showing frequency characteristics of a photodiode having a conventional structure.

[Explanation of symbols]

 REFERENCE SIGNS LIST 1 N-type semiconductor substrate 2, 9, 11 N-type diffusion layer 3, 12 N-type high resistivity epitaxial layer 4 N-type low resistivity epitaxial layer 5 bottom layer 6 N-type buried diffusion layer 7 P-type buried diffusion layer 8 , 10 P-type diffusion layer

Claims (3)

(57) [Claims] A first conductivity type semiconductor substrate; a first conductivity type high resistivity epitaxial layer formed on the semiconductor substrate; and a first conductivity type high resistivity epitaxial layer formed on a surface of the first conductivity type high resistivity epitaxial layer. In the light receiving element comprising the
A light-receiving element, wherein a first conductivity type diffusion layer having a higher impurity concentration than the semiconductor substrate is buried between the surface of the first conductivity type semiconductor substrate and the first conductivity type epitaxial layer. 2. A semiconductor substrate of a first conductivity type, a high resistivity epitaxial layer of the first conductivity type formed on the semiconductor substrate, and an epitaxial layer of the first conductivity type laminated thereon. A light receiving element and a signal processing circuit formed on the surface thereof, wherein the light receiving element has one pole of the second conductivity type formed on the surface of the upper epitaxial layer of the first conductivity type and a lower layer. the first is formed by the other electrode including a high-resistivity epitaxial layer of the conductivity type, the signal processing circuit in the photodetector element containing a circuit element formed in the epitaxial layer of the first conductivity type layer, a first conduction A light-receiving element with a built-in circuit, characterized in that an impurity diffusion layer of a first conductivity type having a higher impurity concentration than that of the semiconductor substrate is buried in a light-receiving element planned region on the surface of the semiconductor substrate. 3. The semiconductor device according to claim 1, wherein the first substrate has a higher impurity concentration than a semiconductor substrate formed by being buried in a light receiving element expected region on the surface of the semiconductor substrate.
3. The photodetector with a built-in circuit according to claim 2, wherein the impurity diffusion layer of the conductivity type is formed on the entire surface of the semiconductor substrate.