JPH09213838A - Terminal of semiconductor receptacle and semiconductor airtightly sealed receptacle - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce a reflection loss even at a high frequency to enhance a degree of freedom for mounting by making the shape of the layer surface of a wiring comprising a metallized layer for transmitting an electric signal into a strip-like form having a narrow width at the central part to moderately form the boundary between the narrow part and the wide part without perpendicularly crossing them. SOLUTION: A conductive metallized layer 4 is formed in the lower surface of an insulating body 2. In the upper surface, the metallized layer 4 forming a wiring 1 is formed so that it is made in a strip-like form and that the width of the central part 1b is made narrower than the width of both sides 1a, 1c and the boundary having a different width is moderately linked together by a sloping line 1d. Thus, since it is moderately formed of a sloping line and a curve without perpendicularly crossing each other, wraparound is corrected. Also, an electric field concentrated into the top of the conventional rectangle is relaxed. Further, on the other hand, a part which does not come into contact with the insulating body 2 is formed in both surfaces of the metallized layer 4, whereby soldering, gold pressure connection or the like between the other insulating body and the thin film metallized layer 4 can be easily performed from that part.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to electronic parts, especially 20G.
Microwaves above Hz, high frequencies such as millimeter waves, especially 10G
The present invention relates to a semiconductor container used for optical communication exceeding bps.

[0002]

2. Description of the Related Art In a semiconductor container, when electrically connecting terminals of a semiconductor hermetically sealed container mainly made of an insulating material such as ceramics or metal, high frequency characteristics can be obtained if it is not mounted in the semiconductor container. It is known that the characteristics do not appear due to the scratches.

In order to improve this, in Japanese Unexamined Patent Publication No. 61-239650, as shown in the plan view of the principal part of FIG. 7A and the side cross section of B, the central portion of the wiring 1 made of metallization is hermetically sealed. It has been proposed to make the width Wb of 1b narrower than the width Wa of the internal wiring portion 1a and the external terminal 1c on both sides to match the characteristic impedances of the portions 1a, 1b, 1c of the microstrip line structure. . In the figure, 2 is an insulator, 3 is an insulator, 4 is a metallized layer, 5 is a cap, 6 is a semiconductor integrated circuit chip, and 7 is a wire bond.

Further, Japanese Patent Publication No. 2-271585 proposes to provide a resistor by vapor deposition or the like on a dielectric substrate and a conductor such as a wire wired to short-circuit the resistor.

[0005]

[Problems to be Solved by the Invention] However, the former proposal is
Although the width of the microstrip line has been changed, these are overlapping of short lines, that is, wide Wa and narrow W.
Strictly speaking, since the boundary with b is orthogonal, the electric field is concentrated at this boundary, and it is difficult to achieve perfect impedance matching due to the three-dimensional insulator distribution. Even if it can be used at several GHz or less, it is 20 GHz. In the above case, there is a problem that the transmission loss is large and the use becomes difficult.

The latter proposal, which is provided with a resistor and a conductor for short-circuiting the resistor, has problems such as reflection loss due to the use of wire bonds and deterioration of mounting flexibility. It's hard to say enough.

[0007]

SUMMARY OF THE INVENTION The present invention solves the above problems and specifically provides a semiconductor container having the following structure.

That is, in order to establish a high-frequency electrical connection between the semiconductor element housed in the semiconductor container and the outside of the semiconductor container, the wiring formed by the band-shaped metallized portion on which the semiconductor element is mounted is insulated. At the passage position where the metallized portion on the surface of the body or inside penetrates the insulator of the terminal portion of the semiconductor container to the outside, that is, at the point where the thickness of the insulator is different, the width of the band-shaped metallization is made larger than the passage position. An object of the present invention is to provide a terminal portion, which is gently fitted until reaching the central portion, and holds the passing position with an insulator, and a semiconductor container including the terminal portion.

In order to provide the semiconductor container having the above structure, it is basically necessary to have the following features.

[0010] 1. The layer surface shape of the wiring made of a metallized layer for transmitting electrical signals provided in the insulator is a narrow strip in the central part, and the boundary between the narrow part and the wide part does not intersect at right angles, and there are sloped lines and curved lines. Etc. to form gently.

2. The insulator to be incorporated in the semiconductor container is arranged so that the gently formed boundary of the wiring pattern made of the metallized layer is located near the end face of the insulator to obtain uniform impedance.

3. A metallization layer is provided on both the upper surface and the lower surface of the insulator, and the metallization layers on both sides of the insulator have a portion that is not in contact with the insulator. , Make electrical connection without transmission loss.

[0013]

BEST MODE FOR CARRYING OUT THE INVENTION Next, specific embodiments of the present invention will be described with reference to examples.

[0014]

EXAMPLE FIG. 1 is a view for explaining the structure of the main part of Example 1 corresponding to the conventional structure of FIGS. 7A and 7B, in which A is a plan view of terminals made of an insulator and the top surface of the insulator. , B is a side sectional view, and C is a front view. A conductive metallization layer 4 is formed on the lower surface of the insulator 2, and a metallization layer forming the wiring 1 is formed on the upper surface of the insulator 2 in a strip shape as shown in FIG.
Has a width Wb smaller than the widths Wa of 1a and 1c on both sides, and boundaries having different widths are loosely connected by an inclined line 1d. 3 is an insulator and 4 is a metallized layer.
The boundary portion of the wiring 1 that is gently connected by the inclined line 1d is located near the end surface 3d of the insulator 3 as shown in the figure.
Therefore, electric field concentration at this boundary portion can be prevented.

FIG. 2 is a perspective view of an essential part for explaining the configuration of the second embodiment. The difference between the second embodiment and the first embodiment is that the strip-shaped metallized layer composed of the narrow central portion 1b and the wide side portions 1a and 1c forming the wiring 1 of the terminal portion 1'becomes the external connection wiring. It is not formed on the upper surface of each insulator 2, but is formed over the upper planes of the plurality of insulators 2 and 2 ′ whose side surfaces are in contact with each other to form a common upper plane as illustrated. is there.

FIG. 3 is a plan view corresponding to FIG. 1A for explaining the structure of the third embodiment. Examples 1 and 2 of Example 3
The difference is that the layer surface shape of the strip-shaped metallization layer forming the wiring 1 is such that the boundary between the narrow central portion 1b and the wide side portions 1a and 1c is connected by the curve 1e as shown in the figure. is there.

FIGS. 4A and 4B show an example of a semiconductor hermetically sealed container in which a terminal having the above-mentioned structure is incorporated.
FIG. 3 is a partial cutaway plan view and a side view. In the figure, 8 is an optical fiber, 9 is an LD, 10 is a thin film metallized insulator substrate,
Both sides 1 of the strip-shaped metallized layer terminal forming the wiring 1
The portion hermetically sealed by the insulator 3 between a and 1c is formed narrow. Reference numeral 2 is an insulator, which is a thin plate of ceramics or diamond.

FIG. 5 illustrates the structure of the above-mentioned sealed portion, in which the terminal 1 and the GND 11 are repeatedly arranged.

FIG. 6 is a table comparing the terminal performance of the semiconductor hermetically sealed container having the above-mentioned structure with the conventional structure as shown in FIG. This kind of terminal performance is indicated by the S parameter, and since the relationship between the frequency and the S21 parameter, which indicates the amount of electric power transmission, is important, the figures are used for comparison.

In the figure, the solid line is the characteristic of the boundary having a rectangular shape as shown in FIG. 7, which is orthogonal, and the chain line is the characteristic of Example 1. The orthogonal line has a large loss at 10 GHz or more.
The -3 dB range is about 16 GHz. On the other hand, in the case of the first embodiment, the transfer function S21 parameter is not easily deteriorated even if it is more than that, and has a range of 20 GHz or more. This tendency was the same in Examples 2 and 3.

[0021]

This is because, in the case where the boundaries are orthogonal to each other as shown in FIG. 7, the electric field from the air at the quantum level is generated from the three-dimensional structure near the end face of the insulator, as shown virtually in FIG. In the microstrip line, the impedance matching is insufficient, whereas in the case of the sloping line or curved line which is not orthogonal as in the embodiment, the wraparound is corrected. Conceivable.

Further, by gently forming, the electric field concentrated at the apex of the conventional rectangle can be relaxed. On the other hand, by forming a part not in contact with the insulator on both surfaces of the metallized layer, it is possible to easily solder or gold-bond with another insulator thin film metallized substrate from this part.

[0023]

As described above, according to the present invention, a terminal of a semiconductor container having a transmission loss is provided. Moreover, since it is easy to directly attach the metallized thin film substrate to the terminal, it is possible to eliminate a factor that causes an extreme reflection loss such as wire bonding.

Therefore, the present invention can be applied to a hermetically sealed semiconductor container capable of handling a high frequency of 20 GHz or more, and can solve one problem for optical sorington communication which has been observed only at a laboratory level. Further, the CPU can be speeded up, and it can be expected that information processing will be performed in a shorter time.

[Brief description of drawings]

1A and 1B are diagrams illustrating a terminal configuration of a first embodiment, in which A is a plan view seen from the upper surface of an insulating substrate, B is a side sectional view, and C is a front view.

FIG. 2 is a perspective view illustrating a configuration of a second embodiment.

FIG. 3 is a plan view corresponding to A in FIG. 1 for explaining the configuration of a third embodiment.

FIG. 4 is a schematic view illustrating an embodiment of a hermetically sealed semiconductor container, in which A is a partial cutaway plan view and B is a side view.

FIG. 5 is a layout explanatory view of a portion of the terminal which is hermetically sealed.

FIG. 6 is a chart showing terminal performance of a semiconductor container.

FIG. 7 is a view for explaining a conventional terminal configuration, in which A is a plan view,
B is a side sectional view of a part thereof.

FIG. 8 is a schematic diagram illustrating a state of an electric field at a terminal portion.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 wiring 1'metallized wiring portion 1a 1 inner side portion 1b 1 central sealing portion 1c 1 outer side portion Wa 1a, 1c width Wb 1b width 1d 1b and inclined line 1e connecting 1a and 1c A curve connecting 1b and 1a, 1c 2 Insulator 2'Insulator 3 Insulator 3d 3 End of 3 4 Metallized layer 5 Cap 6 Semiconductor integrated circuit chip 7 Connection line 8 Optical fiber 9 LD 10 Thin film metallized insulator substrate 11 GND 12 Virtual electric field wraparound

Claims (5)

[Claims] 1. A metallization for transmitting an electrical signal in one or more insulators incorporated in a semiconductor container capable of mounting one or more semiconductor elements, the one or more metallization layers provided on the insulator. The layer shape of the connecting terminal composed of layers is such that the central portion is a narrow band shape, and the boundary between the narrow portion and the wide portion is not orthogonal to each other but is gently connected to each other. . 2. A plurality of insulators incorporated in a semiconductor container capable of mounting one or more semiconductor elements, wherein one or more metallization layers provided on the insulators transmit metal signals. The wiring part is made of a plurality of insulating upper surfaces having metallized portions, the side surfaces of which are in contact with each other to form a common upper flat surface when assembled, so that their layer surface shapes are combined to form one strip shape. A terminal of a semiconductor container, which is formed and has a band-like shape having a narrow central portion, and a boundary with a wide portion is gently connected without being orthogonal to each other. 3. The terminal according to claim 1, wherein a boundary between the narrow portion and the wide portion having a strip shape is gently connected by an inclined line or a curved line. 4. An insulator is provided with metallization layers on both upper and lower surfaces, and when incorporating the insulator into a semiconductor container,
4. The terminal according to claim 1, wherein a part of the metallized layer is arranged so as not to contact the insulator, and the other metallized portion has the remaining metallized portion. 5. The semiconductor container is mounted with one or more semiconductor elements, and the connection terminal according to claim 1, 2, 3 or 4 is arranged such that its gentle boundary is located near the end face of the insulator. A hermetically sealed semiconductor container having a built-in structure.