JPH09205174A - Airtight terminal board and its manufacture - Google Patents

Airtight terminal board and its manufacture

Info

Publication number
JPH09205174A
JPH09205174A JP8010389A JP1038996A JPH09205174A JP H09205174 A JPH09205174 A JP H09205174A JP 8010389 A JP8010389 A JP 8010389A JP 1038996 A JP1038996 A JP 1038996A JP H09205174 A JPH09205174 A JP H09205174A
Authority
JP
Japan
Prior art keywords
base
hole
conductive pin
terminal board
sealing glass
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP8010389A
Other languages
Japanese (ja)
Inventor
Jun Inahashi
潤 稲橋
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Olympus Corp
Original Assignee
Olympus Optical Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Olympus Optical Co Ltd filed Critical Olympus Optical Co Ltd
Priority to JP8010389A priority Critical patent/JPH09205174A/en
Publication of JPH09205174A publication Critical patent/JPH09205174A/en
Withdrawn legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item

Landscapes

  • Manufacturing Of Electrical Connectors (AREA)
  • Connections Arranged To Contact A Plurality Of Conductors (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

PROBLEM TO BE SOLVED: To extend the degree of freedoms of designing an airtight terminal board with simplified manufacturing steps and low manufacturing cost by providing d transmission pin inserted into a through hole, and fixing the pin to the hole by sealing glass. SOLUTION: The transmission pin 3 of a terminal inserted into a base 2 is fixed by sealing glass 4 to hold sealability. The base 2 is sintered to be changed to a board made of sintering member. The airtight terminal board is first molded with a base 2 having a through hole 1. The pin 3 is inserted into the hole 1 of the base 2. Thereafter, the glass made of granular glass for the airtight terminal is fed to the gap between the hole 1 and the pin 3, and fixed. Since the materials of the board and the pin 3 can be variously selected, the degree of freedoms of designing the terminal board for constituting the sealed semiconductor device can be extended.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明の属する技術分野】本発明は、半導体素子を搭載
した気密封止可能な半導体装置を構成する気密端子基板
に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an airtight terminal board which constitutes a hermetically sealable semiconductor device on which a semiconductor element is mounted.

【0002】[0002]

【従来の技術】マイクロコンピュータや多ピンゲートア
レイの進展に伴って、気密封止型半導体装置が多用され
始めている。この気密封止型半導体装置は、気密端子基
板上に半導体素子を搭載することにより構成されてい
る。このような気密封止型半導体装置として、特開昭6
3−253658号公報所載の技術が開示されている。
この技術について図7を用いて説明する。通常の粉末冶
金法により成形および焼結して製造したアルミナ製の穴
開き絶縁基板101の各貫通孔内にコバール製のピン1
03をそれぞれ挿入し、貫通孔の隙間に基板裏面から流
入させた銀ロウ114でピン103を穴開き絶縁基板1
01に固着させた。各ピン103の基板裏面からの突出
部分には、ニッケルめっき層106及びその上に金めっ
き層107を順次形成した。
2. Description of the Related Art With the development of microcomputers and multi-pin gate arrays, hermetically sealed semiconductor devices have been widely used. This hermetically sealed semiconductor device is configured by mounting a semiconductor element on a hermetic terminal board. An example of such a hermetically sealed semiconductor device is Japanese Patent Laid-Open No.
The technology described in Japanese Patent Laid-Open No. 3-253658 is disclosed.
This technique will be described with reference to FIG. A pin 1 made of Kovar is provided in each through hole of the perforated insulating substrate 101 made of alumina, which is manufactured by molding and sintering by an ordinary powder metallurgy method.
03 is inserted into each of the through holes, and the pins 103 are perforated with the silver brazing 114 which is made to flow into the gap between the through holes from the back surface of the substrate.
It was fixed to 01. A nickel plating layer 106 and a gold plating layer 107 were sequentially formed on the protruding portion of each pin 103 from the back surface of the substrate.

【0003】その後、従来と同様に基板表面にアルミニ
ウムの配線層108を形成して各ピン103と接続さ
せ、半導体素子109を所定の位置に銀入りガラス11
0にて搭載してから、半導体素子109の各電極と配線
層108とをアルミワイヤ111で結線した。最後に、
半導体素子109及びアルミワイヤ111を収容するセ
ラミックスのキャップ112を封止ガラス113で通常
の如く封着し、気密封止したPGA(ピングリッドアレ
イ)を製造することができた。
Thereafter, as in the conventional case, an aluminum wiring layer 108 is formed on the surface of the substrate and connected to each pin 103, and the semiconductor element 109 is placed in a predetermined position on the glass 11 containing silver.
After mounting with 0, each electrode of the semiconductor element 109 and the wiring layer 108 were connected with an aluminum wire 111. Finally,
It was possible to manufacture a hermetically sealed PGA (pin grid array) by sealing the ceramic cap 112 containing the semiconductor element 109 and the aluminum wire 111 with the sealing glass 113 as usual.

【0004】これにより、構造が簡単であって、高密度
配線および気密封止が可能であり、しかも安価な半導体
装置を提供することができる。
This makes it possible to provide a semiconductor device which has a simple structure, enables high-density wiring and hermetic sealing, and is inexpensive.

【0005】[0005]

【発明が解決しようとする課題】しかるに、上記従来技
術には、以下のような問題点があった。まず、この半導
体装置の構成が複雑であるため、製造工程が多岐に渡
り、製造コストが高くなるという問題点がある。
However, the above-mentioned prior art has the following problems. First, since the structure of this semiconductor device is complicated, there are problems that the manufacturing process is wide and the manufacturing cost is high.

【0006】つぎに、一般によく知られているように、
ロウ付けは、ロウ付けする部材と銀ロウとの濡れ性によ
り固着強度が決定される。ところが、銀ロウは接合され
る物質により、濡れ性が大きく異なる。濡れ性が大きく
異なるもの同士をロウ付けすると、濡れ性の小さな物質
と銀ロウとの界面が相対的に弱くなり、この部分で破断
が発生し易い。従って、ロウ付けする際は、銀ロウに対
して濡れ性の近い物質で行う必要がある。そのため、実
際にこの方法で気密封止型半導体装置を構成しようとす
ると、穴開き絶縁基板と金属性ピンとの材質に制限が極
めて多く、基本的には選択の余地は少ない。従って、こ
のような気密封止型半導体装置を設計する際の一つの大
きな制約となっている。
Next, as is well known,
In brazing, the bond strength is determined by the wettability between the brazing member and the silver braze. However, the wettability of silver solder varies greatly depending on the materials to be joined. When brazing materials having greatly different wettability, the interface between the substance having low wettability and the silver solder becomes relatively weak, and breakage easily occurs at this portion. Therefore, when brazing, it is necessary to use a substance having a close wettability to silver brazing. Therefore, when actually forming a hermetically sealed semiconductor device by this method, there are very many restrictions on the materials of the perforated insulating substrate and the metallic pins, and basically there is little room for selection. Therefore, it is one of the major restrictions when designing such a hermetically sealed semiconductor device.

【0007】本発明は、上記従来の問題点に鑑みてなさ
れたもので、請求項1、2または3に係る発明の課題
は、製造工程を簡略にして製造コストを安価にし、気密
封止型半導体装置を構成する気密端子基板の設計自由度
を広げることである。
The present invention has been made in view of the above-mentioned conventional problems, and an object of the invention according to claim 1, 2 or 3 is to simplify the manufacturing process to reduce the manufacturing cost and to provide a hermetically sealed type. It is to expand the degree of freedom in designing an airtight terminal board that constitutes a semiconductor device.

【0008】[0008]

【課題を解決するための手段】上記課題を解決するため
に、請求項1に係る発明は、気密端子基板において、複
数の貫通孔を有した焼結部材からなる基板と、この貫通
孔に挿通した伝導ピンとを備え、該伝導ピンと前記貫通
孔とを封着ガラスにて固着したことを特徴とする。請求
項2に係る発明は、気密端子基板の製造方法において、
金属粉末またはセラミクス粉末と結合材とからなる材料
を用いて複数の貫通孔を有するベースを成形し、前記貫
通孔に伝導ピンを挿通するとともに、前記貫通孔と前記
伝導ピンとの隙間に封着ガラスを流入した後、前記ベー
スを加熱して前記結合材を除去し、さらに加熱して焼結
することを特徴とする。請求項3に係る発明は、気密端
子基板の製造方法において、封着ガラスからなるリング
部材を複数インサートするとともに、金属粉末またはセ
ラミクス粉末と結合材とからなる材料を用いてベースを
成形し、該ベースを加熱して前記結合材を除去する前ま
たは後に伝導ピンを前記リング部材に挿通し、その後前
記ベースを加熱して焼結することを特徴とする。
In order to solve the above-mentioned problems, the invention according to claim 1 is, in an airtight terminal board, a board made of a sintered member having a plurality of through-holes, and inserted into the through-holes. The above-mentioned conductive pin is provided, and the conductive pin and the through hole are fixed with a sealing glass. The invention according to claim 2 is a method for manufacturing an airtight terminal board,
A base having a plurality of through holes is molded using a material composed of metal powder or ceramic powder and a binder, and a conductive pin is inserted into the through hole, and a sealing glass is placed in a gap between the through hole and the conductive pin. After flowing in, the base is heated to remove the binder, and further heated to sinter. According to a third aspect of the invention, in the method for manufacturing an airtight terminal board, a plurality of ring members made of sealing glass are inserted, and a base is made of a material made of metal powder or ceramic powder and a binder, Before or after heating the base to remove the binder, the conductive pin is inserted into the ring member, and then the base is heated and sintered.

【0009】請求項1、2または3に係る発明の作用で
は、複数の貫通孔を有した焼結部材からなる基板と、こ
の貫通孔に挿通した伝導ピンとを備え、該伝導ピンと前
記貫通孔とを封着ガラスにて固着したことにより、封着
ガラスは多くの物質に対して濡れ性がよいので、前記基
板および伝導ピンの材質を種々選択しても、十分な固着
強度を確保できる。請求項2に係る発明の作用では、上
記作用に加え、金属粉末またはセラミクス粉末と結合材
とからなる材料を用いて複数の貫通孔を有するベースを
成形し、前記貫通孔に伝導ピンを挿通するとともに、前
記貫通孔と前記伝導ピンとの隙間に封着ガラスを流入し
た後、前記ベースを加熱して前記結合材を除去し、さら
に加熱して焼結するので、貫通孔を有するベースは焼結
により収縮し、焼結部材からなる基板が完成する。この
焼結時の収縮により伝導ピンは封着ガラスを介して基板
に固着される。請求項3に係る発明の作用では、上記作
用に加え、封着ガラスからなるリング部材を複数インサ
ートするとともに、金属粉末またはセラミクス粉末と結
合材とからなる材料を用いてベースを成形し、該ベース
を加熱して前記結合材を除去する前または後に伝導ピン
を前記リング部材に挿通し、その後前記ベースを加熱し
て焼結するので、封着ガラスからなるリング部材をイン
サートしたベースは焼結により収縮し、焼結部材からな
る基板が完成する。この焼結時の収縮により伝導ピンは
封着ガラスを介して基板に固着される。
In the operation of the invention according to claim 1, 2 or 3, a substrate made of a sintered member having a plurality of through holes and a conductive pin inserted into the through hole are provided, and the conductive pin and the through hole are provided. Since the sealing glass has good wettability to many substances by being fixed with the sealing glass, sufficient fixing strength can be secured even if various materials for the substrate and the conductive pin are selected. In the operation of the invention according to claim 2, in addition to the above operation, a base having a plurality of through holes is formed by using a material composed of metal powder or ceramics powder and a binder, and the conductive pin is inserted into the through hole. At the same time, after the sealing glass flows into the gap between the through hole and the conductive pin, the base is heated to remove the binder, and further heated and sintered, so the base having the through hole is sintered. Shrinks, and a substrate made of a sintered member is completed. Due to the contraction at the time of sintering, the conductive pin is fixed to the substrate through the sealing glass. In the operation of the invention according to claim 3, in addition to the above operation, a plurality of ring members made of sealing glass are inserted, and a base is formed by using a material made of metal powder or ceramic powder and a binder, The conductive pin is inserted into the ring member before or after heating to remove the binder, and then the base is heated and sintered, so that the base in which the ring member made of the sealing glass is inserted is sintered. The substrate is shrunk and the sintered member is completed. Due to the contraction at the time of sintering, the conductive pin is fixed to the substrate through the sealing glass.

【0010】[0010]

【発明の実施の形態1】図1〜図3は発明の実施の形態
1を示し、図1は貫通孔を有するベースの斜視図、図2
はベースに伝導ピンを挿通した斜視図、図3は伝導ピン
と貫通孔との隙間に封着ガラスを流入した気密端子基板
の要部の縦断面図である。
1 to 3 show Embodiment 1 of the invention, FIG. 1 is a perspective view of a base having a through hole, and FIG.
FIG. 3 is a perspective view in which the conductive pin is inserted into the base, and FIG. 3 is a vertical cross-sectional view of a main part of the airtight terminal board in which the sealing glass has flowed into the gap between the conductive pin and the through hole.

【0011】まず、気密端子基板について説明する。図
3に示すように、ベース2に挿通された端子たる伝導ピ
ン3は、封着ガラス4により固着され、気密性が保持さ
れている。ベース2は焼結されることにより、焼結部材
からなる基板に変化している。この気密端子基板には、
従来技術の図7で示したように、基板表面に配線層が形
成されて伝導ピン3と接続され、半導体素子が搭載され
た後、配線層と結線される。さらにこの上にキャップが
封止ガラスにて封着され、封止型半導体装置を構成す
る。
First, the airtight terminal board will be described. As shown in FIG. 3, the conductive pin 3 which is a terminal inserted through the base 2 is fixed by a sealing glass 4 to maintain airtightness. The base 2 is transformed into a substrate made of a sintered member by being sintered. This airtight terminal board has
As shown in FIG. 7 of the prior art, a wiring layer is formed on the surface of the substrate and connected to the conductive pins 3, and after mounting a semiconductor element, the wiring layer is connected. Further, a cap is sealed on this with sealing glass to form a sealed semiconductor device.

【0012】つぎに、気密端子基板の製造方法について
説明する。平均粒径8μmのFe−Ni粉末(Fe:9
5wt%,Ni:5wt%)62vol%、結合材とし
て、ポリスチレン18vol%、ポリエチルアクリエー
ト12vol%、エチレン−酢酸ビニル共重合体5vo
l%、パラフィンワックス2vol%、およびステアリ
ン酸1vol%を混練したものを、一般的な金属粉末射
出成形法(MIM)を用いて、図1に示す貫通孔1を有
するベース2を成形して得た。
Next, a method of manufacturing the hermetic terminal board will be described. Fe-Ni powder having an average particle size of 8 μm (Fe: 9
5 vol%, Ni: 5 wt%) 62 vol%, as a binder, 18 vol% polystyrene, 12 vol% polyethyl acrylate, 5 vo ethylene-vinyl acetate copolymer
1%, paraffin wax 2vol%, and stearic acid 1vol% were kneaded to obtain a base 2 having through holes 1 shown in FIG. 1 by using a general metal powder injection molding method (MIM). It was

【0013】このベース2の貫通孔1に、コバール製の
伝導ピン3を挿通する(図2参照)。この後、図3に示
すように、貫通孔1と伝導ピン2との隙間に、気密端子
用顆粒ガラスBH−7W/K(日本電気硝子(株)製)
からなる封着ガラス4を流入する。ついで、常圧大気雰
囲気下、昇温速度25℃/H、最高到達温度350℃、
保持時間5時間にて、ベース2中の結合材を加熱により
除去する。さらに、10-4torrの真空雰囲気下、昇
温速度300℃/H、最高到達温度1150℃、保持時
間3時間にて、このベース2を加熱により焼結する。こ
れにより最終的な気密端子基板を得る。
A Kovar-made conductive pin 3 is inserted into the through hole 1 of the base 2 (see FIG. 2). Thereafter, as shown in FIG. 3, granular glass BH-7W / K for airtight terminals (manufactured by Nippon Electric Glass Co., Ltd.) is provided in the gap between the through hole 1 and the conductive pin 2.
The sealing glass 4 consisting of Then, in an atmospheric atmosphere, the temperature rising rate is 25 ° C / H, the maximum attainable temperature is 350 ° C,
At a holding time of 5 hours, the binder in the base 2 is removed by heating. Further, this base 2 is sintered by heating in a vacuum atmosphere of 10 −4 torr at a temperature rising rate of 300 ° C./H, a maximum attainable temperature of 1150 ° C., and a holding time of 3 hours. Thereby, a final hermetic terminal board is obtained.

【0014】本発明の実施の形態1によれば、気密端子
基板の伝導ピンの固着に封着ガラスを介在させたので、
接合される金属粉末の焼結部材からなる基板とコバール
からなる伝導ピンとの双方に濡れ性が良好なため、固着
が強固になされている。また、伝導ピンは、封着ガラス
を介してベースの焼結収縮により固着されるので、特別
な固着工程を必要とせず、製造コストを安価にすること
ができる。
According to the first embodiment of the present invention, since the sealing glass is interposed for fixing the conductive pin of the airtight terminal board,
Since the wettability is good for both the substrate made of the sintered member of the metal powder to be joined and the conductive pin made of Kovar, the adhesion is strong. Moreover, since the conductive pin is fixed by the sintering shrinkage of the base via the sealing glass, a special fixing step is not required and the manufacturing cost can be reduced.

【0015】本発明の実施の形態1では、金属粉末とし
て、Fe−Ni粉末を用いたが、他の金属粉末を用いて
もよい。また、伝導ピンにコバールを用いたが、他の導
電性金属を用いてもよい。さらに、金属粉末に替えて、
セラミクス粉末を用いてもよい。このように、本発明の
実施の形態1によれば、基板と伝導ピンとの間に封着ガ
ラスを介在させたので、設計上、材料選択を自由に行う
ことができる。
In the first embodiment of the present invention, Fe-Ni powder is used as the metal powder, but other metal powder may be used. Although Kovar is used for the conductive pin, other conductive metals may be used. Furthermore, instead of metal powder,
Ceramic powder may be used. As described above, according to the first embodiment of the present invention, since the sealing glass is interposed between the substrate and the conductive pin, the material can be freely selected in terms of design.

【0016】[0016]

【発明の実施の形態2】図4〜図6は発明の実施の形態
2を示し、図4は封着ガラスからなるリングの斜視図、
図5はリングをインサート成形したベースの斜視図、図
6はリングに伝導ピンを挿通した気密端子基板の要部の
縦断面図である。
Embodiment 2 of the Invention FIGS. 4 to 6 show Embodiment 2 of the invention, and FIG. 4 is a perspective view of a ring made of sealing glass,
FIG. 5 is a perspective view of a base in which a ring is insert-molded, and FIG. 6 is a vertical cross-sectional view of a main part of an airtight terminal board in which a conductive pin is inserted in the ring.

【0017】本発明の実施の形態2の気密端子基板は、
発明の実施の形態1の気密端子基板と製造方法が異なる
ものの、その構成は同一のため説明を省略する。また、
気密端子基板の封止型半導体装置への利用も発明の実施
の形態1と同様のため、説明を省略する。
The airtight terminal board according to the second embodiment of the present invention is
Although the manufacturing method is different from that of the airtight terminal board according to the first embodiment of the present invention, the configuration is the same, and the description thereof is omitted. Also,
Since the use of the hermetic terminal board for the sealed semiconductor device is the same as that of the first embodiment of the invention, the description thereof will be omitted.

【0018】本発明の実施の形態2の気密端子基板の製
造方法について説明する。図4はリング21を示し、プ
リフォームGA−11(日本電気硝子(株)製)からな
る。図5に示すように、このリング21をインサートし
て、結合材を添加したセラミクス粉末を、一般的な金属
粉末射出成形法(MIM)を用いて成形し、ベース22
を得た。セラミクス粉末には、アルミナ粉末(Al2
3 ,平均粒径5μm)、結合材には、ポリエチレン15
vol%、ポリメタメチクレート14vol%、および
ステアリン酸2vol%を混練して用いた。
A method of manufacturing the airtight terminal board according to the second embodiment of the present invention will be described. FIG. 4 shows the ring 21, which is made of preform GA-11 (manufactured by Nippon Electric Glass Co., Ltd.). As shown in FIG. 5, the ring 21 is inserted, and the ceramics powder to which the binder is added is molded by a general metal powder injection molding method (MIM) to form a base 22.
I got Alumina powder (Al 2 O
3 , average particle size 5μm), polyethylene 15 as binder
Vol%, 14 vol% of polymetamethiclate, and 2 vol% of stearic acid were kneaded and used.

【0019】この後、図6に示すように、ベース22の
リング21に、コバール製の伝導ピン23を挿通し、常
圧大気雰囲気下、昇温速度35℃/H、最高到達温度3
45℃、保持時間5時間にて、ベース22中の結合材を
加熱により除去する。さらに、常圧窒素雰囲気下、昇温
速度320℃/H、最高到達温度1150℃、保持時間
3時間にて、このベース22を加熱により焼結する。こ
れにより最終的な気密端子基板を得る。
After that, as shown in FIG. 6, a Kovar-made conductive pin 23 is inserted into the ring 21 of the base 22, and the temperature rising rate is 35.degree.
The binder in the base 22 is removed by heating at 45 ° C. and a holding time of 5 hours. Further, the base 22 is sintered by heating under a normal pressure nitrogen atmosphere at a temperature rising rate of 320 ° C./H, a maximum reaching temperature of 1150 ° C., and a holding time of 3 hours. Thereby, a final hermetic terminal board is obtained.

【0020】本発明の実施の形態2のよれば、気密端子
基板の伝導ピンの固着に封着ガラスを介在させたので、
接合されるセラミクス粉末の焼結品からなる基板とコバ
ールからなる伝導ピンとの双方に濡れ性が良好なため、
固着が強固になされている。また、伝導ピンは、封着ガ
ラスからなるリングを介してベースの焼結収縮により固
着されるので、特別な固着工程を必要とせず、製造コス
トを安価にすることができる。
According to the second embodiment of the present invention, since the sealing glass is interposed for fixing the conductive pin of the airtight terminal board,
Since the wettability is good for both the substrate made of sintered ceramic powder to be joined and the conductive pin made of Kovar,
It is firmly fixed. Further, since the conductive pin is fixed by sintering shrinkage of the base via the ring made of sealing glass, a special fixing step is not required and the manufacturing cost can be reduced.

【0021】本発明の実施の形態2では、ベースから結
合材を除去する前に伝導ピンを挿通したが、これに限る
ことなく、ベースから結合材を除去した後に、伝導ピン
を挿通してもよい。また、セラミクス粉末として、アル
ミナ粉末を用いたが、他の種類のセラミクス粉末を用い
ても、また金属粉末を用いてもよい。このように、本発
明の実施の形態2によれば、基板と伝導ピンとの間に封
着ガラスを介在させたので、設計上、材料選択を自由に
行うことができる。
In the second embodiment of the present invention, the conductive pin is inserted before removing the bonding material from the base. However, the present invention is not limited to this, and the conductive pin may be inserted after removing the bonding material from the base. Good. Although alumina powder was used as the ceramic powder, other kinds of ceramic powder or metal powder may be used. As described above, according to the second embodiment of the present invention, since the sealing glass is interposed between the substrate and the conductive pin, the material can be freely selected in terms of design.

【0022】[0022]

【発明の効果】請求項1、2または3に係る発明によれ
ば、封着ガラスは多くの物質に対して濡れ性がよいの
で、前記基板および伝導ピンの材質を種々選択すること
ができるので、気密封止型半導体装置を構成する気密端
子基板の設計自由度を広げることができる。請求項2に
係る発明によれば、上記効果に加え、貫通孔を有するベ
ースは焼結により収縮し基板が完成する。この焼結時の
収縮により伝導ピンは封着ガラスを介して基板に固着さ
れるので、製造工程が簡略になり、製造コストを安価に
することができる。請求項3に係る発明によれば、上記
効果に加え、封着ガラスからなるリング部材をインサー
トしたベースは焼結により収縮して基板が完成する。こ
の焼結時の収縮により伝導ピンは封着ガラスを介して基
板に固着されるので、製造工程が簡略になり、製造コス
トを安価にすることができる。
According to the invention of claim 1, 2 or 3, since the sealing glass has good wettability to many substances, various materials can be selected for the substrate and the conductive pin. The degree of freedom in designing the airtight terminal board that constitutes the airtightly sealed semiconductor device can be expanded. According to the second aspect of the present invention, in addition to the above effects, the base having the through-holes shrinks by sintering to complete the substrate. Since the conductive pin is fixed to the substrate through the sealing glass due to the contraction at the time of sintering, the manufacturing process can be simplified and the manufacturing cost can be reduced. According to the invention of claim 3, in addition to the above effects, the base into which the ring member made of the sealing glass is inserted contracts due to sintering to complete the substrate. Since the conductive pin is fixed to the substrate through the sealing glass due to the contraction at the time of sintering, the manufacturing process can be simplified and the manufacturing cost can be reduced.

【図面の簡単な説明】[Brief description of drawings]

【図1】発明の実施の形態1の貫通孔を有するベースの
斜視図である。
FIG. 1 is a perspective view of a base having a through hole according to a first embodiment of the invention.

【図2】発明の実施の形態1のベースに伝導ピンを挿通
した斜視図である。
FIG. 2 is a perspective view in which a conductive pin is inserted into the base according to the first embodiment of the invention.

【図3】発明の実施の形態1の伝導ピンと貫通孔との隙
間に封着ガラスを流入した気密端子基板の要部の縦断面
図である。
FIG. 3 is a vertical cross-sectional view of a main part of the airtight terminal board in which the sealing glass has flowed into the gap between the conductive pin and the through hole according to the first embodiment of the invention.

【図4】発明の実施の形態2の封着ガラスからなるリン
グの斜視図である。
FIG. 4 is a perspective view of a ring made of a sealing glass according to a second embodiment of the invention.

【図5】発明の実施の形態2のリングをインサート成形
したベースの斜視図である。
FIG. 5 is a perspective view of a base in which a ring according to the second embodiment of the invention is insert-molded.

【図6】発明の実施の形態2のリングに伝導ピンを挿通
した気密端子基板の要部の縦断面図である。
FIG. 6 is a vertical cross-sectional view of a main part of an airtight terminal board in which a conductive pin is inserted into a ring according to the second embodiment of the invention.

【図7】従来技術の封止型半導体装置の縦断面図であ
る。
FIG. 7 is a vertical cross-sectional view of a conventional sealed semiconductor device.

【符号の説明】[Explanation of symbols]

1 貫通孔 2 ベース 3 伝導ピン 4 封着ガラス 1 through hole 2 base 3 conductive pin 4 sealing glass

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 複数の貫通孔を有した焼結部材からなる
基板と、この貫通孔に挿通した伝導ピンとを備え、該伝
導ピンと前記貫通孔とを封着ガラスにて固着したことを
特徴とする気密端子基板。
1. A substrate comprising a sintered member having a plurality of through holes, and a conductive pin inserted through the through hole, wherein the conductive pin and the through hole are fixed to each other with a sealing glass. Airtight terminal board.
【請求項2】 金属粉末またはセラミクス粉末と結合材
とからなる材料を用いて複数の貫通孔を有するベースを
成形し、前記貫通孔に伝導ピンを挿通するとともに、前
記貫通孔と前記伝導ピンとの隙間に封着ガラスを流入し
た後、前記ベースを加熱して前記結合材を除去し、さら
に加熱して焼結することを特徴とする気密端子基板の製
造方法。
2. A base having a plurality of through holes is molded using a material composed of a metal powder or a ceramic powder and a binder, and a conductive pin is inserted into the through hole, and the through hole and the conductive pin are separated from each other. A method for manufacturing an airtight terminal board, comprising the step of heating the base to remove the binding material after the sealing glass has flowed into the gap, and further heating to sinter.
【請求項3】 封着ガラスからなるリング部材を複数イ
ンサートするとともに、金属粉末またはセラミクス粉末
と結合材とからなる材料を用いてベースを成形し、該ベ
ースを加熱して前記結合材を除去する前または後に伝導
ピンを前記リング部材に挿通し、その後前記ベースを加
熱して焼結することを特徴とする気密端子基板の製造方
法。
3. A plurality of ring members made of sealing glass are inserted, a base is molded using a material made of metal powder or ceramics powder and a binder, and the base is heated to remove the binder. A method for manufacturing an airtight terminal board, characterized in that a conductive pin is inserted into the ring member before or after, and then the base is heated and sintered.
JP8010389A 1996-01-24 1996-01-24 Airtight terminal board and its manufacture Withdrawn JPH09205174A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8010389A JPH09205174A (en) 1996-01-24 1996-01-24 Airtight terminal board and its manufacture

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8010389A JPH09205174A (en) 1996-01-24 1996-01-24 Airtight terminal board and its manufacture

Publications (1)

Publication Number Publication Date
JPH09205174A true JPH09205174A (en) 1997-08-05

Family

ID=11748777

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8010389A Withdrawn JPH09205174A (en) 1996-01-24 1996-01-24 Airtight terminal board and its manufacture

Country Status (1)

Country Link
JP (1) JPH09205174A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7274101B2 (en) 2004-06-30 2007-09-25 Fujikura Ltd. Semiconductor package and method for manufacturing the same
JP2008302213A (en) * 2007-04-17 2008-12-18 C2Cure Inc Electronic assembly and method of manufacturing electronic assembly
CN101916927A (en) * 2010-07-06 2010-12-15 常州博瑞电力自动化设备有限公司 Metal sealing terminal plate
JP2013504856A (en) * 2009-09-09 2013-02-07 エマーソン エレクトリック カンパニー Solid core glass bead seal with stiffening ribs
CN112837870A (en) * 2020-12-30 2021-05-25 东南大学 Glass sealing mould of round multi-core microwave insulator and implementation method thereof
CN114719903A (en) * 2022-03-28 2022-07-08 河北美泰电子科技有限公司 Temperature and pressure composite sensor based on metal glass sintered base welding seal

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7274101B2 (en) 2004-06-30 2007-09-25 Fujikura Ltd. Semiconductor package and method for manufacturing the same
US7368321B2 (en) 2004-06-30 2008-05-06 Fujikura Ltd. Semiconductor package and method for manufacturing the same
JP2008302213A (en) * 2007-04-17 2008-12-18 C2Cure Inc Electronic assembly and method of manufacturing electronic assembly
JP2013504856A (en) * 2009-09-09 2013-02-07 エマーソン エレクトリック カンパニー Solid core glass bead seal with stiffening ribs
CN101916927A (en) * 2010-07-06 2010-12-15 常州博瑞电力自动化设备有限公司 Metal sealing terminal plate
CN112837870A (en) * 2020-12-30 2021-05-25 东南大学 Glass sealing mould of round multi-core microwave insulator and implementation method thereof
CN114719903A (en) * 2022-03-28 2022-07-08 河北美泰电子科技有限公司 Temperature and pressure composite sensor based on metal glass sintered base welding seal

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