JPH09205166A - Multi-chip module - Google Patents

Multi-chip module

Info

Publication number
JPH09205166A
JPH09205166A JP1180296A JP1180296A JPH09205166A JP H09205166 A JPH09205166 A JP H09205166A JP 1180296 A JP1180296 A JP 1180296A JP 1180296 A JP1180296 A JP 1180296A JP H09205166 A JPH09205166 A JP H09205166A
Authority
JP
Japan
Prior art keywords
semiconductor element
lid
screw
metal piece
chip module
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1180296A
Other languages
Japanese (ja)
Other versions
JP2792496B2 (en
Inventor
Ryoichi Nagaoka
亮一 長岡
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP1180296A priority Critical patent/JP2792496B2/en
Publication of JPH09205166A publication Critical patent/JPH09205166A/en
Application granted granted Critical
Publication of JP2792496B2 publication Critical patent/JP2792496B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73253Bump and layer connectors

Abstract

PROBLEM TO BE SOLVED: To provide a multi-chip module of a structure which can reliably and efficiently radiate heat generated in semiconductor elements mounted face- down on a board. SOLUTION: The multi-chip module includes a lid 4 which is formed therein with holes having female threaded parts 4a at positions corresponding to semiconductor elements 2 mounted face-down on a board 1. The module also includes metallic members 7 of a cone or semi-spherical shape having a bottom surface whose size can cover an outer diameter of the associated element 2. The module further includes screws 6 which are each formed in its inner surface with a fitting hole having nearly the same shape as an outer surface of the associated metallic member 7 to push down the outer surface of the member 7. Each screw 6 is formed in its outer surface a male threaded part which is engaged with the associated threaded part of the lid 4. Thereby, the elements 2 are joined to the lid 4 by means of the metallic members 7 and screws 6, thus realizing efficient heat radiation from the elements 2.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明の属する技術分野】本発明は、複数の半導体素子
を基板に対しフェースダウンにて実装されたマルチチッ
プモジュールに関する。特に、半導体素子の発生する熱
を効率よく放熱するための構造を備えたマルチチップモ
ジュールに関する。
The present invention relates to a multi-chip module in which a plurality of semiconductor elements are mounted face down on a substrate. In particular, the present invention relates to a multi-chip module having a structure for efficiently radiating heat generated by a semiconductor element.

【0002】[0002]

【従来の技術】図7は、従来のマルチチップモジュ−ル
の一例の縦断面図、図8は、従来の第2の例の縦断面
図、図9は、従来の第3の例の分解斜視図である。
FIG. 7 is a longitudinal sectional view of an example of a conventional multi-chip module, FIG. 8 is a longitudinal sectional view of a second conventional example, and FIG. 9 is an exploded view of a third conventional example. It is a perspective view.

【0003】複数の半導体素子を基板上に実装し、機能
を複合化したモジュールをマルチチップモジュールと呼
び、半導体素子の高集積化の一手段として最近よく用い
られている。半導体素子の実装方法として、半導体素子
の回路面を基板に対して上向きに実装するフェースアッ
プ構造と、半導体素子の回路面を基板に対し対向して
(裏向き)に実装するフェースダウン構造がある。最
近、より高密度実装を図る目的でフェースダウン構造が
よく用いられている。
A module in which a plurality of semiconductor elements are mounted on a substrate and functions are combined is called a multi-chip module, and is often used recently as a means for increasing the degree of integration of semiconductor elements. As a method for mounting a semiconductor element, there are a face-up structure in which the circuit surface of the semiconductor element is mounted upward on the substrate and a face-down structure in which the circuit surface of the semiconductor element is mounted facing the substrate (backward). . Recently, a face-down structure has been frequently used for the purpose of higher density mounting.

【0004】図7に示すように、半導体素子のフェース
ダウンの構造は、外部接続端子に金属突起(バンプ)3
を施した半導体素子2が、その回路面を基板1に対して
対向させ、基板1に施された回路パターン(不図示)と
の電気的接続がなされる。このように実装された半導体
素子2から発生する熱は、金属突起3から基板1に熱伝
導されるか、または半導体素子2の裏面から外気に対し
て輻射などにより放熱される以外に手段がなく、発熱量
の大きい半導体素子を実装したマルチチップモジュール
では構造的に放熱する手段を設けることが要求される。
このような発熱量の大きい半導体素子を実装したマルチ
チップモジュールの構造としては、図7に示す様に基板
1に金属製の蓋15を設け、半導体素子2の裏面に接着
材16などを介して熱伝導にて放熱される方法がとられ
ている。(例えば、特開昭60−241240号公
報)。
As shown in FIG. 7, a face-down structure of a semiconductor device has a metal projection (bump) 3 on an external connection terminal.
The semiconductor element 2 subjected to the above operation has its circuit surface facing the substrate 1, and is electrically connected to a circuit pattern (not shown) provided on the substrate 1. The heat generated from the semiconductor element 2 mounted in this manner has no means other than being thermally conducted from the metal projection 3 to the substrate 1 or radiated from the back surface of the semiconductor element 2 to the outside air by radiation or the like. In a multi-chip module on which a semiconductor element having a large amount of heat is mounted, it is required to provide a means for radiating heat structurally.
As a structure of a multi-chip module on which such a semiconductor element generating a large amount of heat is mounted, as shown in FIG. 7, a metal lid 15 is provided on the substrate 1 and an adhesive 16 or the like is provided on the back surface of the semiconductor element 2. The heat is dissipated by heat conduction. (For example, JP-A-60-241240).

【0005】また、厚みの異なる半導体素子を実装した
マルチチップモジュールの放熱構造の例としては、図8
に示す様に、基板1に実装した半導体素子2の配置に対
応する部位に開口部を備えた蓋20のその開口部に、放
熱用フィン17aを上部に設けた放熱用部材17の脚部
17bを挿入し、半導体素子2の裏面と半田18により
接合し、放熱する構造がとられている。(特開平4−2
63457号公報)。
FIG. 8 shows an example of a heat dissipation structure of a multi-chip module on which semiconductor elements having different thicknesses are mounted.
As shown in the figure, the lid 20 having an opening at a position corresponding to the arrangement of the semiconductor element 2 mounted on the substrate 1 is provided with a leg 17b of the heat radiating member 17 provided with a heat radiating fin 17a at an upper portion thereof. , And bonded to the back surface of the semiconductor element 2 with the solder 18 to dissipate heat. (Japanese Patent Laid-Open No. 4-2
No. 63457).

【0006】その他の放熱構造の例としては、図9の分
解斜視図により、マルチチップモジュール全体の構成で
はないが、単体の半導体素子のパッケージの放熱構造が
示されている。雄ねじ部22を有する放熱用フィン21
を半導体素子の裏面に接し、放熱される構造が報告され
ている。この公報では半導体素子の実装方法に特に言及
していないが、リードフレームを使用し、ベースに対し
て半導体素子の回路面をフェースアップにて搭載し、ワ
イヤーボンディングによる方法が採られている(特開昭
57−162353号公報)。
As another example of the heat dissipation structure, the disassembled perspective view of FIG. 9 shows a heat dissipation structure of a package of a single semiconductor element, although not the whole structure of the multichip module. Heat dissipating fin 21 having external thread portion 22
Has been reported to contact the back surface of a semiconductor element and dissipate heat. Although this publication does not specifically refer to a method of mounting a semiconductor element, a method of using a lead frame, mounting a circuit surface of the semiconductor element face-up with respect to a base, and adopting a method of wire bonding is adopted. JP-A-57-162353).

【0007】[0007]

【発明が解決しようとする課題】上述したような従来の
放熱構造の問題点は2つ挙げられる。その一つは発熱す
る半導体素子からの放熱を確実に行うための構造とは云
えない点である。このような放熱構造をとる半導体素子
の熱設計は、半導体素子の最高使用ジャンクション温度
を考慮した設計になっている。フェースダウンによる実
装を用いたマルチチップモジュールでは、まず半導体素
子が基板に実装される。その後、放熱に関係する周囲の
部材により全体が組み立てられる。図7に示す第1の構
造例では、半導体素子2の高さの差異により、蓋15と
の空間の距離がまちまちになるため、蓋15と半導体素
子2の裏面とに介在させた接着材または半田16の量を
コントロールする必要がある、少なければ蓋15と半導
体素子2の裏面との間に空隙が発生し、半導体素子2か
らの熱伝導する熱抵抗が大きくなる。また接着材または
半田16が多すぎると基板側ヘ、接着材等が流れ込み基
板と半導体素子との接続の信頼性を損なう危険がある。
There are two problems with the conventional heat dissipation structure as described above. One of them is that it cannot be said to be a structure for surely dissipating heat from a semiconductor element that generates heat. The thermal design of a semiconductor element having such a heat dissipation structure is designed in consideration of the maximum used junction temperature of the semiconductor element. In a multi-chip module using face-down mounting, first, a semiconductor element is mounted on a substrate. Thereafter, the whole is assembled by surrounding members related to heat radiation. In the first structure example shown in FIG. 7, the difference in height of the semiconductor element 2 causes the distance between the lid 15 and the space to vary, so that an adhesive or It is necessary to control the amount of the solder 16. If the amount is small, a gap is generated between the lid 15 and the back surface of the semiconductor element 2, and the thermal resistance for conducting heat from the semiconductor element 2 increases. If the amount of the adhesive or the solder 16 is too large, there is a risk that the adhesive or the like flows into the substrate side and impairs the reliability of connection between the substrate and the semiconductor element.

【0008】図8に示す第2の構造例は高さの異なる半
導体素子2に対応したものであって、蓋20の、各半導
体素子2に対向する位置に孔を開け、放熱用フィン17
a付きの放熱用部材17の半導体素子2と接合する脚部
17bの長さを変えて、半導体素子2の裏面と蓋20と
の隙間を半田18にて接合する方法を採っている。この
場合も蓋20と半導体素子2の裏面と放熱用部材17の
三者間に介在させた接合用半田18の量のコントロール
と接合するための温度管理が難しい。蓋20と放熱用部
材17との半田盛り性が極端に良い場合は半田18が半
導体素子2の裏面と放熱用部材17に少なくなり、空隙
が発生しやすい。また半田18が固化する速度により、
それぞれの部材の熱膨張係数差により放熱用部材17と
半導体素子2の裏面が完全に接合できない可能性を含ん
でいる。図7および図8の従来の構造の共通の問題点は
半導体素子の裏面との接合面の確実性が確認できないこ
とにある。
The second structural example shown in FIG. 8 corresponds to the semiconductor elements 2 having different heights. A hole is formed in the cover 20 at a position facing each of the semiconductor elements 2, and the radiation fins 17 are formed.
The gap between the back surface of the semiconductor element 2 and the lid 20 is joined by solder 18 by changing the length of the leg 17b of the heat radiating member 17 attached with a to the semiconductor element 2. In this case as well, it is difficult to control the amount of the solder 18 for bonding, which is interposed between the lid 20, the back surface of the semiconductor element 2, and the heat radiating member 17, and to control the temperature for bonding. When the soldering property between the lid 20 and the heat radiating member 17 is extremely good, the amount of the solder 18 is reduced on the back surface of the semiconductor element 2 and the heat radiating member 17, and a gap is easily generated. Also, depending on the speed at which the solder 18 solidifies,
This includes the possibility that the heat radiating member 17 and the back surface of the semiconductor element 2 cannot be completely joined due to the difference in thermal expansion coefficient between the members. A common problem of the conventional structures shown in FIGS. 7 and 8 is that the reliability of the bonding surface with the back surface of the semiconductor element cannot be confirmed.

【0009】もう一つの問題点は、半導体素子への機械
的応力がコントロールできないことである。図9に示す
第3の構造例では、雄ねじ部22を直接、半導体素子の
裏面に回転で接合するので半導体素子の回転の応力が加
わる。半導体素子を構成するシリコンやガリウム砒素な
どの材料は機械的な応力に弱く、局部的な応力によりク
ラックが入る可能性がある。そのため半導体素子の裏面
と接合するねじの面の平坦性や並行度を保つ必要があ
り、生産性の上で大きな支障をきたす。同様に、図7や
図8に示す構造も接合を確実にするための接着材や半田
の硬化時に半導体素子に機械的ストレスが加わる可能性
が大きい。
Another problem is that the mechanical stress on the semiconductor device cannot be controlled. In the third structural example shown in FIG. 9, since the male screw portion 22 is directly joined to the back surface of the semiconductor element by rotation, a rotational stress of the semiconductor element is applied. Materials such as silicon and gallium arsenide forming a semiconductor element are susceptible to mechanical stress, and may crack due to local stress. Therefore, it is necessary to maintain the flatness and parallelism of the surface of the screw joined to the back surface of the semiconductor element, which causes a great obstacle in terms of productivity. Similarly, the structures shown in FIGS. 7 and 8 have a high possibility that a mechanical stress is applied to the semiconductor element when the adhesive or the solder for securing the bonding is hardened.

【0010】そこで本発明の目的は、基板に対してフェ
ースダウンにて実装された半導体素子で発生する熱を、
確実に、かつ効率よく放出する構造を有するマルチチッ
プモジュールを提供することである。
Therefore, an object of the present invention is to generate heat generated by a semiconductor element mounted face down on a substrate.
An object of the present invention is to provide a multi-chip module having a structure for reliably and efficiently discharging.

【0011】[0011]

【課題を解決するための手段】本第1の発明のマルチチ
ップモジュールは、基板にフェースダウンにて取り付け
られた複数個の半導体素子と、基板に取り付けられ、か
つ半導体素子の配置に対応する複数個の開口部に雌ねじ
部を備えた金属製蓋とを有するマルチチップモジュール
において、半導体素子の外形をカバーする大きさの底面
を有する円錐台形状の金属片と、内側面には、円錐台形
状の金属片の外側面を押圧するため、金属片の外側面と
ほぼ同形状の円錐台形状の嵌合部が形成され、かつ外側
面には、金属製蓋の記雌ねじ部に係合する雄ねじ部が形
成されているねじとを備え、円錐台形状の金属片とねじ
を介して半導体素子の裏面と金属製蓋とが接合されたこ
とを特徴としている。
According to a first aspect of the present invention, there is provided a multi-chip module comprising: a plurality of semiconductor elements mounted face-down on a substrate; and a plurality of semiconductor elements mounted on the substrate and corresponding to the arrangement of the semiconductor elements. In a multi-chip module having a metal lid provided with a female screw portion in each of the openings, a truncated-cone-shaped metal piece having a bottom surface large enough to cover the outer shape of the semiconductor element, and a truncated-cone-shaped In order to press the outer surface of the metal piece, a fitting portion having a truncated cone shape having substantially the same shape as the outer surface of the metal piece is formed, and a male screw engaging with the female screw part of the metal lid is formed on the outer surface. And a screw in which a portion is formed, wherein the back surface of the semiconductor element and the metal lid are joined via a metal piece having a truncated cone shape and the screw.

【0012】本第2の発明のものは、半導体素子の外形
をカバーする大きさの底面を有する半球形状の金属片
と、内側面には、半球形状の金属片の外側面を押圧する
ため、金属片の外側面とほぼ同形状の半球内面形状また
は半球帯内面形状の嵌合部が形成され、かつ外側面に
は、金属製蓋の雌ねじ部に係合する雄ねじ部が形成され
たねじと、を備え、半球形状の金属片とねじを介して半
導体素子の裏面と金属製蓋とが接合されたことを特徴と
している。
According to the second aspect of the present invention, a hemispherical metal piece having a bottom surface large enough to cover the outer shape of the semiconductor element and an outer surface of the hemispherical metal piece are pressed against the inner surface. A screw having a hemispherical inner surface shape or a hemispherical band inner surface shape having substantially the same shape as the outer surface of the metal piece, and a male screw portion formed on the outer surface engaging with the female screw portion of the metal lid; The semiconductor device is characterized in that the back surface of the semiconductor element and the metal lid are joined via a hemispherical metal piece and a screw.

【0013】なお、これらのマルチチップモジュール
は、基板上にフェースダウンにて取り付けられた半導体
素子の裏面と、これを押圧する金属片との間に熱伝導性
の高いシートを介在させたものであることが望ましく、
また、半導体素子の裏面と金属片との接合部、金属片と
ねじとの接合部およびねじと金属性蓋との接合部に、そ
れぞれ熱硬化性樹脂を介在させ、各接合部を接合後、加
熱硬化させたものであることも望ましい。
In these multichip modules, a highly thermally conductive sheet is interposed between the back surface of a semiconductor element mounted face down on a substrate and a metal piece pressing the semiconductor element. Preferably
Further, a thermosetting resin is respectively interposed in the joint portion between the back surface of the semiconductor element and the metal piece, the joint portion between the metal piece and the screw, and the joint portion between the screw and the metallic lid, and after joining the joint portions, It is also preferable that it is cured by heating.

【0014】[0014]

【発明の実施の形態】次に、本発明の実施の形態につい
て図面を参照して説明する。
Next, embodiments of the present invention will be described with reference to the drawings.

【0015】図1は、本発明のマルチチップモジュール
の一実施形態例の縦断面図、図2は、図1の斜視図、図
3は、図2のねじおよび円錐台形状の状金属片の斜視図
である。
FIG. 1 is a longitudinal sectional view of an embodiment of the multichip module of the present invention, FIG. 2 is a perspective view of FIG. 1, and FIG. It is a perspective view.

【0016】図1において、外部との接続接続用端子
(不図示)に金属突起3を備えた半導体素子2が基板1
と対向ようにフェースダウンで実装され、基板1の表面
に形成された回路パターン(不図示)と電気的に接続さ
れる。この時の接続方法の説明は省略するが、金属突起
としては半田などを半導体素子2の外部接続用端子にメ
ッキする方法や、金Auなどの柔らかい金属を熱圧着な
どにより形成し、基板1に形成された半田との溶融によ
り接続される。半導体素子2が基板1に実装された後
に、放熱のための蓋4が基板に接合される。接合方法に
ついては基板1上において、蓋4の脚部にあたる部分に
パターンを設け、半田などで接合する方法や接着材など
で接合する方法が採られる。蓋4には半導体素子2と対
応する部分に開口部を設けてあり、その内側に雌ねじ部
4aを施している。図1および図3に示すような、半導
体素子2の裏面をカバーする円よりも大きい底面を持つ
円錐台形状の金属片7を基板1に取り付けられた半導体
素子2の裏面に、蓋4の開口部から乗せる。その上から
図1および図3に示すような円錐台形状の金属片7と同
形状の嵌合面が内側面に形成され、雄ねじ部6aが外側
面に形成されたねじ6にて、半導体素子2を固定するよ
うに一定のトルクで押さえる。この時、ねじ6の回転は
ねじ6の上部に設けられた回転用溝6bにて行う。基板
1に取り付けられた半導体素子2の高さの差異に対して
はねじ6の蓋4に対するねじ込み量にて調整を行う。こ
の時、半導体素子2の上に接合された金属片7を一定の
圧力で押さえることにより、半導体素子2に対する回転
の応力を与えず、基板1に対し、垂直方向の力のみで蓋
4との接合を行うことができる。蓋4に設けられたフィ
ン5は半導体素子2の発熱量をより考慮し、発熱量が低
ければ無くてもかまわない。
In FIG. 1, a semiconductor element 2 having a metal projection 3 on a connection terminal (not shown) for connection to the outside is mounted on a substrate 1.
And is electrically connected to a circuit pattern (not shown) formed on the surface of the substrate 1. Although the description of the connection method at this time is omitted, as the metal projection, a method of plating solder or the like on the external connection terminal of the semiconductor element 2 or a method of forming a soft metal such as gold Au by thermocompression bonding or the like, The connection is established by melting with the formed solder. After the semiconductor element 2 is mounted on the substrate 1, a lid 4 for heat dissipation is bonded to the substrate. As a joining method, a method of providing a pattern on a portion corresponding to a leg portion of the lid 4 on the substrate 1 and joining with a solder or the like or a method of joining with an adhesive or the like is adopted. The lid 4 is provided with an opening at a portion corresponding to the semiconductor element 2, and a female screw 4a is provided inside the opening. As shown in FIGS. 1 and 3, a frustum-shaped metal piece 7 having a bottom surface larger than a circle covering the back surface of the semiconductor element 2 is provided with an opening of a lid 4 on the back surface of the semiconductor element 2 attached to the substrate 1. Put on from the department. From above, a semiconductor element is formed by a screw 6 having a fitting surface having the same shape as the truncated-cone-shaped metal piece 7 as shown in FIGS. 2 is fixed with a fixed torque to fix it. At this time, the rotation of the screw 6 is performed by a rotation groove 6b provided above the screw 6. The difference in the height of the semiconductor element 2 attached to the substrate 1 is adjusted by adjusting the screw 6 into the cover 4. At this time, the metal piece 7 bonded onto the semiconductor element 2 is pressed with a constant pressure, so that no rotational stress is applied to the semiconductor element 2 and the substrate 1 is brought into contact with the lid 4 only by a vertical force. Joining can be performed. The fins 5 provided on the lid 4 need not consider the amount of heat generated by the semiconductor element 2 as long as the amount of heat generation is low.

【0017】図4は、本発明の第2の実施形態例の縦断
面図、図5は、本発明の第3の実施形態例の縦断面図、
図6(a)は、図5の一素子接合部の一部修正された部
分拡大縦断面図、(b)は、図5の別の素子接合部の一
部修正された部分拡大縦断面図である。
FIG. 4 is a longitudinal sectional view of a second embodiment of the present invention, FIG. 5 is a longitudinal sectional view of a third embodiment of the present invention,
FIG. 6A is a partially enlarged longitudinal sectional view of a part of one element junction in FIG. 5, and FIG. 6B is a partially enlarged longitudinal section of another element junction in FIG. 5. It is.

【0018】本第2、3の実施形態例においては、半導
体素子2の裏面と平面接合している金属片9の、ねじ1
0、11との接合部は半円球状である。半円球状の金属
片9はねじ10、11との接合部分での自由度が高く、
図6(a)に示すように半導体素子2が基板1に実装さ
れ、一つの半導体素子内のその高さ方向に差異があるこ
とにより角度変位θが生じたとしても半円球状金属片9
とねじ11の嵌合部分で、その変位を吸収できる。図4
の右側のねじ10や図5の右側のねじ12は発熱量の大
きい半導体素子の放熱のために接合部を大きくしたり、
放熱用用のフインを設けた場合の例である。図5の左側
の半導体素子2では、半円球状金属片9との間に熱伝導
性のシート13を介在させたものである。このシート
は、機械的強度が弱い半導体素子2を実装して、確実に
半導体素子の裏面との接合を行う場合に強度的緩衝材と
して適している。また図6(b)は半導体素子2の裏
面、半球状金属片9、ねじ11、蓋4との各接合部分に
熱伝導性接着材(樹脂)14を流し込んだ、図5左側の
接合部に類似した例の拡大図である。特に発熱量が大き
くて各接合部での熱抵抗をより確実に行う場合に用いら
れる。各接合部の隙間は数10μm程度であるため、流
し込む量は非常に少なく、樹脂14を各接合部に塗る程
度で十分である。そのためこの樹脂が硬化する時の機械
的応力は非常に小さい。
In the second and third embodiments, the screw 1 of the metal piece 9 which is planarly bonded to the back surface of the semiconductor element 2 is formed.
The joints with 0 and 11 are hemispherical. The semicircular metal piece 9 has a high degree of freedom at the joint with the screws 10 and 11,
As shown in FIG. 6 (a), even if the semiconductor element 2 is mounted on the substrate 1 and there is a difference in the height direction in one semiconductor element, an angular displacement.
And the screw 11 can absorb the displacement. FIG.
The screw 10 on the right side of FIG. 5 and the screw 12 on the right side of FIG.
This is an example of the case where fins for heat dissipation are provided. In the semiconductor element 2 on the left side of FIG. 5, a heat conductive sheet 13 is interposed between the semiconductor element 2 and the semi-spherical metal piece 9. This sheet is suitable as a strong cushioning material when the semiconductor element 2 having a low mechanical strength is mounted and securely joined to the back surface of the semiconductor element. FIG. 6B shows a state where the heat conductive adhesive (resin) 14 is poured into the respective joints between the back surface of the semiconductor element 2, the hemispherical metal pieces 9, the screws 11, and the lid 4. It is an enlarged view of a similar example. In particular, it is used when the heat value is large and the thermal resistance at each joint is more reliably performed. Since the gap between the joints is about several tens of μm, the amount to be poured is very small, and it is sufficient to apply the resin 14 to each joint. Therefore, the mechanical stress when the resin is cured is very small.

【0019】[0019]

【発明の効果】以上説明したとおり本発明は、基板上に
実装した各半導体素子間の高さ、大きさについての差異
対や、一つの半導体素子の角度変位に対処して柔軟かつ
確実に放熱用蓋に接合される構造とすることにより、半
導体素子からの放熱が効率的にかつ確実に行われる信頼
性の高いマルチチップモジュールを提供できる効果があ
る。
As described above, according to the present invention, it is possible to radiate heat flexibly and surely by coping with the difference in height and size between the semiconductor elements mounted on the substrate and the angular displacement of one semiconductor element. The structure of being joined to the lid has an effect of providing a highly reliable multi-chip module in which heat is efficiently and surely radiated from the semiconductor element.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明のマルチチップモジュールの一実施形態
例の縦断面図である。
FIG. 1 is a longitudinal sectional view of an embodiment of a multichip module according to the present invention.

【図2】図1の斜視図である。FIG. 2 is a perspective view of FIG.

【図3】図2のねじおよび円錐台形状金属片の斜視図で
ある。
FIG. 3 is a perspective view of the screw and the truncated conical metal piece of FIG. 2;

【図4】本発明の第2の実施形態例の縦断面図である。FIG. 4 is a longitudinal sectional view of a second embodiment of the present invention.

【図5】本発明の第3の実施形態例の縦断面図である。FIG. 5 is a longitudinal sectional view of a third embodiment of the present invention.

【図6】(a)は、図5の一素子接合部の一部修正され
た部分拡大縦断面図、(b)は、図5の別の素子接合部
の一部修正された部分拡大縦断面図である。
6 (a) is a partially enlarged longitudinal sectional view of a part of one element junction in FIG. 5, and FIG. 6 (b) is a partially enlarged longitudinal sectional view of a part of another element junction in FIG. 5; FIG.

【図7】従来のマルチチップモジュ−ルの一例の縦断面
図である。
FIG. 7 is a longitudinal sectional view of an example of a conventional multi-chip module.

【図8】従来の第2の例の縦断面図である。FIG. 8 is a longitudinal sectional view of a second conventional example.

【図9】従来の第3の例の分解斜視図である。FIG. 9 is an exploded perspective view of a third conventional example.

【符号の説明】[Explanation of symbols]

1 基板 2 半導体素子 3 金属突起 4,15,20 蓋 4a,25 雌ねじ部 5,17a,21 放熱用フィン 6,10,11,12 ねじ 6a,22 雄ねじ部 6b 回転用溝 7 円錐台形状金属片 8,24 端子 9 半円球状金属片 13 熱伝導性シート 14 熱伝導接着材(樹脂) 16 接着材または半田 17 放熱用部材 17b 脚部 18 半田 19 スペーサ 23 半導体パッケージ DESCRIPTION OF SYMBOLS 1 Substrate 2 Semiconductor element 3 Metal protrusion 4,15,20 Lid 4a, 25 Female screw part 5,17a, 21 Heat radiation fin 6,10,11,12 Screw 6a, 22 Male screw part 6b Rotation groove 7 Frustoconical metal piece 8, 24 terminal 9 semicircular metal piece 13 heat conductive sheet 14 heat conductive adhesive (resin) 16 adhesive or solder 17 heat dissipation member 17b leg 18 solder 19 spacer 23 semiconductor package

Claims (4)

【特許請求の範囲】[Claims] 【請求項1】 基板にフェースダウンにて取り付けられ
た複数個の半導体素子と、該基板に取り付けられ、かつ
該半導体素子の配置に対応する複数個の開口部に雌ねじ
部を備えた金属製蓋とを有するマルチチップモジュール
において、 前記半導体素子の外形をカバーする大きさの底面を有す
る円錐台形状の金属片と、 内側面には、該円錐台形状の金属片の外側面を押圧する
ため、該金属片の外側面とほぼ同形状の円錐台形状の嵌
合部が形成され、かつ外側面には、前記金属製蓋の前記
雌ねじ部に係合する雄ねじ部が形成されているねじとを
備え、 前記円錐台形状の金属片と前記ねじを介して前記半導体
素子の裏面と前記金属製蓋とが接合されたことを特徴と
するマルチチップモジュール。
1. A metal lid having a plurality of semiconductor elements mounted face-down on a substrate and a plurality of female threads mounted on the substrate and having a plurality of openings corresponding to the arrangement of the semiconductor elements. A multi-chip module having a truncated-cone-shaped metal piece having a bottom size large enough to cover the outer shape of the semiconductor element; and an inner surface, for pressing an outer surface of the frusto-conical-shaped metal piece, A screw having a truncated cone-shaped fitting portion having substantially the same shape as the outer surface of the metal piece and having a male screw portion engaged with the female screw portion of the metal lid formed on the outer surface. A multi-chip module, comprising: a back surface of the semiconductor element and the metal lid joined to each other via the truncated cone-shaped metal piece and the screw.
【請求項2】 基板にフェースダウンにて取り付けられ
た複数個の半導体素子と、該基板に取り付けられ、かつ
該半導体素子の配置に対応する複数個の開口部に雌ねじ
部を備えた金属製蓋とを有するマルチチップモジュール
において、 前記半導体素子の外形をカバーする大きさの底面を有す
る半球形状の金属片と、 内側面には、該半球形状の金属片の外側面を押圧するた
め、該金属片の外側面とほぼ同形状の半球内面形状また
は半球帯内面形状の嵌合部が形成され、かつ外側面に
は、前記金属製蓋の前記雌ねじ部に係合する雄ねじ部が
形成されてたねじと、を備え、 前記半球形状の金属片と前記ねじを介して前記半導体素
子の裏面と前記金属製蓋とが接合されたことを特徴とす
るマルチチップモジュール。
2. A plurality of semiconductor elements attached face-down to a substrate, and a metal lid attached to the substrate and having female threads in a plurality of openings corresponding to the arrangement of the semiconductor elements. A multi-chip module comprising: a hemispherical metal piece having a bottom surface large enough to cover the outer shape of the semiconductor element; and A fitting portion having a hemispherical inner surface shape or a hemispherical band inner surface shape having substantially the same shape as the outer surface of the piece was formed, and a male screw portion engaging with the female screw portion of the metal lid was formed on the outer surface. A multi-chip module, comprising: a screw; and a back surface of the semiconductor element and the metal lid are joined via the hemispherical metal piece and the screw.
【請求項3】 前記半導体素子の裏面と、前記金属片と
の間に熱伝導性の高いシートを介在させた、請求項1ま
たは2記載のマルチチップモジュール。
3. The multi-chip module according to claim 1, wherein a sheet having high thermal conductivity is interposed between the back surface of the semiconductor element and the metal piece.
【請求項4】 前記半導体素子の裏面と前記金属片との
接合部、該金属片と前記ねじとの接合部および該ねじと
前記金属性蓋との接合部に、それぞれ熱硬化性樹脂を介
在させ、各接合部を接合後、加熱硬化させた、請求項1
または2記載のマルチチップモジュール。
4. A thermosetting resin is interposed at a joint between the back surface of the semiconductor element and the metal piece, at a joint between the metal piece and the screw, and at a joint between the screw and the metallic lid, respectively. 2. After the joining, the joining portions are joined and then cured by heating.
Or the multichip module according to 2.
JP1180296A 1996-01-26 1996-01-26 Multi-chip module Expired - Fee Related JP2792496B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1180296A JP2792496B2 (en) 1996-01-26 1996-01-26 Multi-chip module

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1180296A JP2792496B2 (en) 1996-01-26 1996-01-26 Multi-chip module

Publications (2)

Publication Number Publication Date
JPH09205166A true JPH09205166A (en) 1997-08-05
JP2792496B2 JP2792496B2 (en) 1998-09-03

Family

ID=11787996

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1180296A Expired - Fee Related JP2792496B2 (en) 1996-01-26 1996-01-26 Multi-chip module

Country Status (1)

Country Link
JP (1) JP2792496B2 (en)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1505644A2 (en) * 2003-07-21 2005-02-09 Delphi Technologies, Inc. Thermally enhanced electronic module
JP2006319008A (en) * 2005-05-11 2006-11-24 Kyocera Mita Corp Heat sink
US7577001B2 (en) 2006-01-16 2009-08-18 Samsung Electronics Co., Ltd. Support structure of electronic device and hard disk drive comprising the same
US7719850B2 (en) 2001-02-16 2010-05-18 Nxp B.V. Arrangement with an integrated circuit mounted on a bearing means and a power supply module arrangement
WO2012094111A1 (en) * 2011-01-04 2012-07-12 Alcatel Lucent Overhead-mounted heatsink
JP2014093440A (en) * 2012-11-05 2014-05-19 Nec Corp Heat radiation acceleration device
WO2021261001A1 (en) * 2020-06-25 2021-12-30 日立Astemo株式会社 Processing device

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7719850B2 (en) 2001-02-16 2010-05-18 Nxp B.V. Arrangement with an integrated circuit mounted on a bearing means and a power supply module arrangement
EP1505644A2 (en) * 2003-07-21 2005-02-09 Delphi Technologies, Inc. Thermally enhanced electronic module
EP1505644A3 (en) * 2003-07-21 2007-09-05 Delphi Technologies, Inc. Thermally enhanced electronic module
JP2006319008A (en) * 2005-05-11 2006-11-24 Kyocera Mita Corp Heat sink
US7577001B2 (en) 2006-01-16 2009-08-18 Samsung Electronics Co., Ltd. Support structure of electronic device and hard disk drive comprising the same
WO2012094111A1 (en) * 2011-01-04 2012-07-12 Alcatel Lucent Overhead-mounted heatsink
JP2014093440A (en) * 2012-11-05 2014-05-19 Nec Corp Heat radiation acceleration device
WO2021261001A1 (en) * 2020-06-25 2021-12-30 日立Astemo株式会社 Processing device

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