JPH09205121A - Inspection method and apparatus - Google Patents

Abstract

PROBLEM TO BE SOLVED: To automatically detect the latch up withstand strength property of semiconductor devices for each lot, and conduct a screening test corresponding to the latch up with stand strength property. SOLUTION: An increment generating section 6 gradually raises the power- supply voltage of a detecting section power supply 5 and supplies the voltage to an arbitrary semiconductor device D1 in a detection rack 3. When a latch up detecting section 7 detects latch up by a monitor signal outputted from the semiconductor device D1, a controller 13 judges the class of latch up withstand strength of the semiconductor device D1 on the basis of the power-supply voltage level at this point. On the basis of the resulting signal, a time setting section 10 sets the time for a latch up withstand strength test in a screening teat, and the controller 13 sets the applied voltage for the latch up withstand strength test. Thus, the screening test is started.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an inspection method and a device, and more particularly to a technique effectively applied to shortening a latch-up breakdown voltage characteristic test in a semiconductor device screening test by a burn-in device.

[0002]

2. Description of the Related Art According to a study made by the present inventor, a burn-in device for conducting a screening test for removing a semiconductor device which causes a failure depending on time and stress is irrelevant to the latch-up breakdown voltage of each product lot. The latch-up breakdown voltage is inspected by applying a preset voltage for a predetermined time.

As an example in which this type of inspection apparatus is described in detail, September 9, 1994, published by Press Journal, Inc., 1994 special issue, vol. 13, volume 1
No. 0 Koji Matsushita (ed.), "Monthly Semiconduct
r world special edition The Equipment "
P127 to P131, and this document describes the functions and configurations of various burn-in devices.

[0004]

However, the present inventors have found that the screening test using the burn-in device as described above has the following problems.

That is, since the burn-in conditions are uniform, it takes a preset time even for a semiconductor device of a lot having a high latch-up breakdown voltage, and the latch-up breakdown voltage inspection may take a long time. However, there is a problem that efficiency is reduced.

Further, in a semiconductor device of a lot having a low latch-up breakdown voltage, a device breakdown or the like occurs, and it takes time and man-hours for investigating the breakdown factor and the inspection cost increases. .

An object of the present invention is to automatically detect the latch-up withstand voltage characteristic of a semiconductor device for each lot and perform a screening test according to the latch-up withstand voltage characteristic, so that the screening test can be performed efficiently in a short time. An object of the present invention is to provide an inspection method and device that can be frequently performed.

The above and other objects and novel features of the present invention will become apparent from the description of the present specification and the accompanying drawings.

[0009]

SUMMARY OF THE INVENTION Among the inventions disclosed in the present application, the outline of a representative one will be briefly described.
It is as follows.

That is, the inspection method of the present invention measures the latch-up breakdown voltage of any one semiconductor device among a large number of semiconductor devices manufactured on the burn-in board and manufactured in the same lot in which the screening test is performed. The process, the process of classifying the grade of any semiconductor device from the measured latch-up breakdown voltage, and the applied voltage of the latch-up breakdown voltage characteristic test performed in the screening test of the semiconductor device of the same lot based on the classified grade. And a step of calculating a voltage application time.

As a result, since the latch-up breakdown voltage characteristic test in the screening test can be performed with the applied voltage and the application time according to the grade of the semiconductor device, the inspection efficiency can be improved.

In addition, the inspection method of the present invention is designed so that the latch-up withstand voltage of at least two or more semiconductor devices selected from a large number of semiconductor devices manufactured on the burn-in board and manufactured in the same lot in which the screening test is performed is performed. A step of measuring, a step of calculating an average value of the measured latch-up withstand voltage, a step of classifying the grades of the semiconductor devices from the average value of the latch-up withstand voltage, and a semiconductor of the same lot based on the classified grade. And a step of calculating an applied voltage and a voltage application time of a latch-up withstand voltage characteristic test performed in a device screening test.

As a result, the grade of the latch-up breakdown voltage characteristic is classified from the average value of the latch-up breakdown voltage of at least two arbitrary semiconductor devices, so that the grade of the semiconductor device can be classified more accurately.

Furthermore, the inspection device of the present invention is a latch-up withstand voltage for measuring the latch-up withstand voltage of any semiconductor device among a large number of semiconductor devices manufactured on the burn-in board and subjected to the screening test and manufactured in the same lot. Based on the measuring means and the latch-up withstand voltage measured by the latch-up withstand voltage measuring means, the grade of the arbitrary semiconductor device is classified, and the latch-up withstand voltage characteristic test performed in the screening test of the semiconductor devices of the same lot is performed. Test condition setting means for setting the applied voltage and the voltage application time are provided.

As a result, the latch-up withstand voltage measuring means measures the latch-up withstand voltage of the semiconductor device mounted on the burn-in board, and the test condition setting means sets the applied voltage and the applied time according to the grade of the semiconductor device for screening. Since the latch-up breakdown voltage characteristic test in the test is performed, the inspection efficiency can be improved.

Further, in the inspection apparatus of the present invention, the latch-up breakdown voltage measuring means outputs a voltage signal for gradually increasing the power supply voltage applied to an arbitrary semiconductor device at regular time intervals. And a latch-up power supply for supplying a power supply voltage to an arbitrary semiconductor device based on the voltage signal output from the power supply signal output means and a latch-up signal in the arbitrary semiconductor device, and the arbitrary semiconductor device latches. Latch-up detection means for outputting a detection signal when the up state is reached, and voltage measurement means for measuring the power supply voltage value output from the latch-up power supply when the detection signal output from the latch-up detection means is input. In the first operation, the test condition setting means compares the power supply voltage value measured by the voltage measuring means with a preset threshold value. Means, a second arithmetic means for judging the grade of an arbitrary semiconductor device based on the comparison result by the first arithmetic means, and a latch-up performed in a screening test based on the judgment result by the second arithmetic means. A third arithmetic means for determining the applied voltage of the withstand voltage characteristic test;
The fourth arithmetic means determines the voltage application time of the latch-up breakdown voltage characteristic test performed in the screening test based on the determination result of the third arithmetic means.

Thereby, the latch-up withstand voltage characteristic of the semiconductor device mounted on the burn-in board is easily measured in a short time, and the applied voltage and the application time are set according to the grade of the semiconductor device to set the latch-up withstand voltage characteristic in the screening test. The test can be conducted.

Further, in the inspection apparatus of the present invention, a latch-up signal in any semiconductor device monitored by the latch-up detection means is a monitor signal output from a consumption current value of any semiconductor device or an I / O terminal. It consists of

Thus, the latch-up breakdown voltage of the semiconductor device can be reliably measured with a simple circuit configuration.

As described above, since the latch-up breakdown voltage characteristic test in the screening test is performed according to the grade of the semiconductor device, the semiconductor device can be efficiently inspected in a short time, and the semiconductor device is broken during the inspection. Since it is possible to reliably prevent the above, it is possible to significantly reduce the time and man-hours in the destruction factor investigation.

[0021]

Embodiments of the present invention will be described below in detail with reference to the drawings.

FIG. 1 is an explanatory diagram of a circuit configuration of a burn-in device according to an embodiment of the present invention, and FIG. 2 is a flow chart diagram for determining a determination order of latch-up breakdown voltage characteristics by the burn-in device according to an embodiment of the present invention. Is.

In the present embodiment, the burn-in device (inspection device) 1 for performing the screening test is a mass production rack for transmitting necessary signals to a burn-in board (burn-in board) BB on which the semiconductor device D1 for which the screening test is performed is mounted. Two are provided.

Further, in the burn-in device 1, among the semiconductor devices D1 similarly subjected to the screening test, the semiconductor device D1 arbitrarily selected for detecting the latch-up breakdown voltage is selected.
A detection rack 3 for transmitting a necessary signal is provided on the burn-in board BB on which is mounted.

Further, these burn-in boards BB include
A socket BS is provided for mounting the semiconductor device D1.

The mass production rack 2 is provided with connectors 2a to 2n for electrically connecting 1 to n burn-in boards to the burn-in device 1, and the detection rack 3 includes:
A connector 3 a for electrically connecting one burn-in board to the burn-in device 1 is provided.

Further, the burn-in device 1 detects the mass-production power source 4 which supplies the power-supply voltage to the semiconductor device D1 mounted on the mass-production rack 2 and the semiconductor device D1 which mounts on the detection rack 3 to supply the power-supply voltage. A power supply (latch-up power supply) 5 for the unit is provided.

The power supply voltage generated by the mass production power supply 4 is applied to the connectors 2a to 2n in the mass production rack 2.
Is connected to a predetermined pin of the connector 3a in the detection rack 3, and the power supply voltage generated by the power supply 5 for the detection unit is connected to the predetermined pin of the connector 3a.

Next, the mass production power source 4 includes switches S1 to S1.
S3 is provided, and one ends of resistors R1 to R3 having different resistance values are connected to one ends of the switches S1 to S3, respectively.

The mass-production power source 4 is provided with an operational amplifier OP1 which is an amplifier for amplifying the input signal,
The input part of the operational amplifier OP1 is connected to the other ends of the resistors R1 to R3.

Further, the mass-production power source 4 is provided with a feedback resistor R4, one end of the resistor R4 is connected to the input part of the operational amplifier OP1, and the other end of the resistor R4 is operational amplifier OP1. It is connected to the output part of.

The signal output from the operational amplifier OP1 becomes the power supply voltage supplied to the predetermined pins of the connectors 2a to 2n described above.

Further, the power supply 5 for the detecting section includes switches S4 ...
S6 is provided, and one ends of resistors R5 to R7 having different resistance values are connected to one ends of the switches S4 to S6, respectively.

Further, the power supply 5 for the detecting section is provided with an operational amplifier OP2 which is an amplifier for amplifying the input signal, and the input section of the operational amplifier OP2 is connected to the other ends of the resistors R5 to R7. ing.

The detector power supply 5 is provided with a feedback resistor R8 and a resistor R9 for limiting the current of a signal input during the latch-up withstand voltage test, and one end of the resistor R8 is connected to the operational amplifier OP2. It is connected to the input section and the other end of the resistor R8 is connected to the output section of the operational amplifier OP2, and the signal output from the operational amplifier OP2 is supplied to the predetermined pin of the connector 3a described above. Becomes

Further, one end of the resistor 9 is similarly connected to the input part of the operational amplifier OP2.

Further, the burn-in device 1 is provided with an increment generating section (voltage signal output means) 6 for generating an arbitrary power supply voltage stepwise, and the other of the output section of the increment generating section 6 and the resistor R9. Is connected to the end of.

Next, the burn-in device 1 is provided with a latch-up detection section (latch-up detection means) 7 for detecting the latch-up breakdown voltage based on the monitor signal output from the semiconductor device D1 mounted on the detection rack 3. It is provided.

The detector power source 5, the increment generator 6, and the latch-up detector 7 constitute a latch-up breakdown voltage measuring means.

The input portion of the latch-up detection portion 7 to which the monitor signal output from the semiconductor device D1 is input is
It is connected to a predetermined pin on the connector 3a of the detection rack 3.

Further, the burn-in device 1 is provided with a drive signal source 8 for supplying various signals for burn-in and a drive signal power supply 9 for supplying a buffer power supply in the semiconductor device D1.

The output parts of the drive signal source 8 and the drive signal power source 9 are also connected to the connectors 2a to 2 of the mass production rack 2.
n and a predetermined pin of the connector 3a of the detection rack 3 are connected.

The burn-in device 1 further includes a time setting unit (fourth calculation means) 10 for automatically setting the time of the latch-up withstand voltage characteristic test in the screening test based on the detected latch-up withstand voltage and the burn-in device 1. The temperature measuring unit 11 for measuring the temperature in the burn-in chamber, which is a thermostatic chamber that houses the mass production rack 2 and the detection rack 3 during the screening test, is provided.

Further, the burn-in device 1 includes an operation unit 1
2 is provided, and various condition settings and operation settings in burn-in are performed by the operation unit 12.

Further, the burn-in device 1 is provided with a controller (first to third computing means, voltage measuring means) 13 which controls all of the burn-in device 1 and is composed of, for example, a personal computer or a microcomputer. There is.

The controller 13 includes a mass production power source 4, a detection unit power source 5, an increment generation unit 6, a latch-up detection unit 7, a drive signal source 8, a drive signal power source 9, a time setting unit 10, and a temperature measurement. Section 11 and operation section 12
, And is controlled by a control signal output from the controller 13.

Further, the operational amplifier OP1 in the mass-production power source 4 and the operational amplifier OP2 in the detector power source 5 are supplied from the controller 13 described above.

The time setting section and the controller 13 constitute test condition setting means.

Next, the operation of this embodiment will be described.

First, the worker mounts the semiconductor devices D1 manufactured in the same lot on the sockets BS of the burn-in board BB, and mounts these burn-in boards BB on the mass production rack 2.
2a to 2n and the connector 3a of the detection rack 3.

Next, the operator uses the operation unit 12 to classify the semiconductor device D1 according to electrical characteristics, for example, burn-in conditions such as burn-in voltage and time in classes A to C, and latch-up. The burn-in device 1 is started by inputting the burn-in temperature at the time of detecting the breakdown voltage and the start voltage for detecting the latch-up breakdown voltage and pressing the start button of the screening test.

The temperature inside the burn-in chamber measured by the temperature measuring unit 11 is the operating unit 1
When the temperature set by 2 becomes the same, the controller 1
3 outputs a control signal to the increment generating section 6 so as to output a start voltage for latch-up breakdown voltage detection set by the operating section 12 in advance.

The increment generator 6 outputs a signal of a predetermined voltage to the detector power source 5 based on the control signal output from the controller 13. At this time, the switches S4 to S6 are in the non-conducting state, that is, in the OFF state, and only the signal output from the increment generating section 6 is input to the input section of the operational amplifier OP2.

Further, the operational amplifier OP2 outputs a signal of a predetermined voltage from the output section based on the signal input to the input section, and supplies power to any one semiconductor device D1 mounted on the detection rack 3. Supply as voltage.

Further, the latch-up detecting section 7 receives the monitor signal output from the semiconductor device D1 mounted on the detection rack 3 and supplied with the power supply voltage, and continuously checks whether or not latch-up has occurred. It is detecting.

Further, the controller 13 raises the power supply voltage supplied to the above-mentioned semiconductor device D1 by about 0.1 V from the start voltage of the latch-up breakdown voltage detection set by the operation unit 12 at every predetermined time. A signal is output to the increment generation unit 6 as described above.

When the latch-up detection unit 7 detects that latch-up has occurred due to the abnormality of the monitor signal output from the semiconductor device D1, the latch-up detection unit 7 outputs the latch-up detection signal to the controller 13. The controller 13 stops the signal output to the increment generation unit 6, reads the power supply voltage value at the time of latch-up, and the controller 13 determines the class of the semiconductor device D1 mounted on the mass production rack 2 and the detection rack 3. to decide.

Here, the determination of the class of the semiconductor device D1 is performed by determining all the semiconductor devices D1 mounted on the detection rack 3.
After measuring the latch-up withstand voltage in each of the semiconductor devices D1, the controller 13 calculates the average value of the latch-up withstand voltages in all of the semiconductor devices D1, and the controller 13 mounts it on the mass-production rack 2 and the detection rack 3 based on the average value. The class of the semiconductor device D1 that has been processed may be determined.

Next, classification of the semiconductor device D1 according to the latch-up breakdown voltage will be described with reference to the flowchart of FIG.

First, assuming that the power supply voltage when the above-mentioned latch-up occurs is the voltage Vr, it is determined whether or not the voltage Vr is higher than the threshold voltage SH1 in order to perform class classification (step S101).

When the voltage Vr is lower than the C class threshold voltage SH1, the semiconductor device D1 is
It is determined that the class is the lowest C class (step S1).
02).

Next, when the voltage Vr is higher than the threshold voltage SH1, the voltage Vr is the B class threshold voltage SH.
It is determined whether it is higher than 2 (step S10).
3).

When the voltage Vr is lower than the threshold voltage SH2, it is determined to be the intermediate class B class (step S104), and the voltage Vr is the threshold voltage SH2.
If it is higher than that, it is determined to be the highest class A (step S105).

In this way, when the controller 13 performs the class classification and the class of the semiconductor device D1 is determined, the determination result is output from the controller 13 to the time setting section 10.

Then, the time setting unit 10 automatically sets the time of the latch-up withstand voltage characteristic test in the screening test based on the signal of the judgment result output from the controller 13.

In the case of the A class semiconductor device D1, the high voltage is applied for a short time, and the applied voltage becomes lower as the class decreases to B class and C class. , The test time is set to be long.

Next, the controller 13 outputs a predetermined signal to the mass production power source 4 and the detector power source 5 based on the determination result of the semiconductor device D1 to start the burn-in test.

Here, the mass production power source 4 has a switch S1.
.. to S3 are provided, and the resistors R1 to R3 connected to the switches S1 to S3 have resistance values that generate the power supply voltage to be applied when the semiconductor device D1 is in the A class to C class, respectively.

Similarly, the detector power source 5 is provided with switches S4 to S6, and these switches S4 to S6.
Resistors R5 to R7 connected to the semiconductor device D
When 1 is the A class to the C class, the power supply voltage to be applied is a resistance value that is generated.

Therefore, when the determination result of the semiconductor device D1 is A class, the controller 13 outputs a signal for selecting the switches S1 and S4.

When the determination result of the semiconductor device D1 is the B class, the controller 13 outputs a signal for selecting the switches S2 and S5 and when the determination result is the C class, the switches S3 and S6 are selected. Become.

Then, the mass production rack 2 and the detection rack 3
Semiconductor device D manufactured in the same lot mounted in
In No. 1, the latch-up withstand voltage characteristic test by the screening test is started under the condition of the latch-up withstand voltage described above.

Consequently, according to the present embodiment, the burn-in device 1 automatically measures the latch-up breakdown voltage of the semiconductor device D1 mounted on the burn-in board BB, judges the grade of the semiconductor device, and Since the latch-up breakdown voltage characteristic test in the screening test is performed by setting the applied voltage and the applied time according to the grade, it is possible to improve the inspection efficiency.

Further, since it is possible to reliably prevent breakage during the inspection of the semiconductor device by the burn-in device 1, it is possible to greatly reduce the time and man-hours required for investigating the damage factor.

Further, in the present embodiment, the semiconductor device D
1 (FIG. 1) is detected by the latch-up detection section 7 (FIG. 1) monitoring the monitor signal output from the semiconductor device D1. For example, as shown in FIG. Latch-up of the semiconductor device D1 can be satisfactorily detected by monitoring the power supply voltage supplied to the device D1.

In this case, as shown in FIG. 3, the latch-up detector 7a monitors the current value of the power supply supplied to the semiconductor device D1, that is, the consumption current value. Then, the point at which the current consumption value suddenly increases is detected as latch-up, and a latch-up detection signal is output to the controller 13.

Although the invention made by the present inventor has been specifically described based on the embodiments of the present invention, the present invention is not limited to the above-mentioned embodiments, and various modifications can be made without departing from the scope of the invention. It goes without saying that it can be changed.

[0078]

Advantageous effects obtained by typical ones of the inventions disclosed by the present application will be briefly described as follows.
It is as follows.

(1) According to the present invention, since the latch-up breakdown voltage characteristic test in the screening test can be performed by the applied voltage and the application time according to the grade of the semiconductor device, the inspection efficiency can be improved.

(2) Further, in the present invention, since the latch-up breakdown voltage characteristic test in the screening test is performed according to the grade of the semiconductor device, it is possible to surely prevent breakdown during the inspection of the semiconductor device.

(3) Further, in the present invention, by the above (1) and (2), the semiconductor device can be inspected efficiently in a short time, and the time and the man-hour in the destruction factor investigation can be greatly reduced. can do.

[Brief description of drawings]

FIG. 1 is a circuit configuration explanatory diagram of a burn-in device according to an embodiment of the present invention.

FIG. 2 is a flowchart diagram for determining a determination order of latch-up breakdown voltage characteristics by the burn-in device according to the embodiment of the present invention.

FIG. 3 is a circuit configuration explanatory diagram of a burn-in device according to another embodiment of the present invention.

[Explanation of symbols]

1 Burn-in device (inspection device) 2 Rack for mass production 2a to 2n connector 3 Rack for detection 3a connector 4 Power supply for mass production 5 Power supply for detection unit (latch-up power supply) 6 Increment generation unit (voltage signal output means) 7, 7a Latch-up Detection unit (latch-up detection means) 8 Drive signal source 9 Drive signal power supply 10 Time setting section (fourth calculation means) 11 Temperature measurement section 12 Operation section 13 Controller (first to third calculation means, voltage measurement means) ) D1 semiconductor device BB burn-in board (burn-in board) BS socket S1 to S6 switch OP1 operational amplifier OP2 operational amplifier resistance R1 to R9 Vr voltage SH1, SH2 threshold voltage

Claims (5)

[Claims] 1. A step of measuring the latch-up withstand voltage of any one of the semiconductor devices of the same lot on which a screening test is carried out mounted on a burn-in board, and an arbitrary step is selected from the measured latch-up withstand voltage. And a step of calculating the applied voltage and the voltage application time of the latch-up withstand voltage characteristic test performed in the screening test of the semiconductor devices of the same lot based on the classified grade. An inspection method characterized by having. 2. A step of measuring a latch-up withstand voltage of at least two arbitrary semiconductor devices among semiconductor devices of the same lot on which a screening test is carried out mounted on a burn-in board, and the measured latch-up withstand voltage. Calculating the average value of the latch-up breakdown voltage, and classifying any grade of the semiconductor device from the average value of the latch-up breakdown voltage, and latch-up performed in the screening test of the semiconductor device of the same lot based on the classified grade. And a step of calculating an applied voltage and a voltage application time of a withstand voltage characteristic test. 3. A latch-up breakdown voltage measuring means for measuring a latch-up breakdown voltage of any one of the semiconductor devices of the same lot on which a screening test is carried out mounted on a burn-in board, and the latch-up breakdown voltage measuring means. Test condition setting for classifying arbitrary semiconductor device grades based on measured latch-up breakdown voltage and setting applied voltage and voltage application time of latch-up breakdown voltage characteristic test in screening test of semiconductor devices of the same lot And a means for providing the inspection device. 4. The inspection device according to claim 3, wherein the latch-up breakdown voltage measuring means outputs a voltage signal that gradually increases the power supply voltage applied to the arbitrary semiconductor device at regular time intervals. A signal output means, a latch-up power supply for supplying a power supply voltage to any of the semiconductor devices based on the voltage signal output from the power supply signal output means, and a latch-up signal in any of the semiconductor devices are monitored, When the semiconductor device enters a latch-up state, a latch-up detection unit that outputs a detection signal, and when the detection signal output from the latch-up detection unit is input, the power-supply voltage value output from the latch-up power supply is changed. The test condition setting means sets in advance the power supply voltage value measured by the voltage measuring means. A second arithmetic operation means for comparing the threshold of the semiconductor device with a threshold value, a second arithmetic operation means for judging a grade of the semiconductor device based on a comparison result by the first arithmetic operation means, and a second arithmetic operation. Means for determining the applied voltage of the latch-up breakdown voltage characteristic test performed in the screening test based on the determination result by the means, and the latch-up breakdown voltage performed in the screening test based on the determination result by the third operation means. An inspection apparatus comprising a fourth arithmetic means for determining a voltage application time for a characteristic test. 5. The inspection apparatus according to claim 4, wherein a latch-up signal in any one of the semiconductor devices monitored by the latch-up detection means is output from a current consumption value of any of the semiconductor devices or an I / O terminal. An inspection apparatus, which is a monitored signal.