JPH09203749A - Probe head for semiconductor lsi inspection device, and manufacture thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To enhance the easiness in the pin assembling work for a probe head and setting pins with a high accuracy and in high density. SOLUTION: Rows of electrode pads are formed on both surfaces, and the pads 21, 22 on the two surfaces are electrically connected in the specific arrangement, and at least three wiring layers are provided consisting of a current feed layer (power supply layer) 19, signal input/output layer 18, and ground layer 20, and a multi-layer wiring base board 1 is formed where the wiring (signal wiring 18) in the base board is expanded from one of the board surfaces fitted with a pin probe 16 toward the rear surface of the board, and a probe head is configured with this and the pin probe 16 in a polygonal pyramid shape including a circle having a minute plane 15 at the tip having a thick base part implanted on the pads 22 on one surface through a conductor layer 11a. The conductor layer 11a is formed in a sandwich structure of Ni and Au such as Ni/Au-Au brazed part/Ni.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a probe head for an inspection device of a semiconductor device typified by LSI and a manufacturing method thereof, and more particularly to a probe head suitable for high density multi-pin and a manufacturing method thereof.

[0002]

2. Description of the Related Art As a probe head for contacting an electrode pad of a semiconductor LSI and transmitting an electric signal to an inspection device, a conventional device uses a probe pin prepared in advance to form a test probe, for example. The structure is inserted in a through hole provided in the structure. Also, the tip of the probe pin needs to be sharpened to improve the electrical contact characteristics.After fixing the probe pin to the probe structure, a flat surface is obtained by cutting and polishing, and the tip is etched. It is formed in a hemispherical or conical shape. Japanese Patent Application Laid-Open No. 61-80067 is an example of this type of apparatus.

[0003]

The above-mentioned prior art does not take into consideration the problem of increasing the density of the probe pins and increasing the number of pins, and there is a problem in the assemblability of the probe pins and the accuracy of the pin tip position. It was In other words, in the prior art, probe pins are individually inserted into a probe structure having a through-hole and assembled, so that high-density and multi-pin probe pins require high-precision insertion and assembly technology. There is a limit.

Further, the tip of the inserted probe pin is
In particular, in the case of a pin tip contacting an electrode pad (solder bump) of a semiconductor wafer, a spring-less, in a certain area (for one chip) in a height direction and in a certain area (for one chip) in order to secure contact resistance characteristics between a pin and a pad. It is necessary to align the horizontal position with high precision. In the prior art, the tip of the probe pin is formed by etching, but the necessity of improving the accuracy of the tip, especially, is not considered.

SUMMARY OF THE INVENTION An object of the present invention is to provide a probe head structure and a method of manufacturing the same, which improve the pin assemblability of the probe head portion and realize high-density and high-precision pinning.

[0006]

[Means for Solving the Problems] Among the above-mentioned objects in high density multi-pinning, first of all, in order to improve the assembling property, for example, a conductive sheet brazed at an electrode pad portion of a wiring board is wet-etched by using a resist mask. It is achieved by selective etching using an undercut according to Further, high-precision pin setting is achieved by using a structure in which the tip end portion uses a flat surface of a conductive sheet.

Hereinafter, a semiconductor L according to a first aspect of the present invention will be described.
The characteristic points of the probe head for an SI inspection device are listed and described in detail.

(1) In a probe head for transmitting an electric signal by contacting an electrode pad of a semiconductor LSI, electrode pad rows are formed on both sides, and the pads on both sides are electrically connected to each other in a specific arrangement relationship. Wiring in the substrate from at least one substrate surface side on which the pin probe is provided and which has at least three kinds of wiring layers connected to the A multi-layered wiring board having an expanded shape, and a polygonal pyramid shape including a circle with a thick base and a small flat surface at the end fixed to each pad on the one board surface through a conductor layer. And a pin probe of.

(2) The multilayer wiring board is characterized by comprising a ceramic multilayer laminate.

(3) The pin probe is made of tungsten (W), molybdenum (Mo), titanium (Ti), chromium (C
r), beryllium (Be) -copper (Cu) alloy and copper (C
It is characterized by being made of any one metal selected from the group consisting of copper (Cu) substrates plated with a harder metal than u).

(4) When the height of the pin probe from the surface of the wiring board is h and the pitch between the implanted pads of adjacent pin probes is d, h = 0.5 to 2d. And The relationship between the height h of the pin probe and the pitch d between the pads is a preferable condition for passing a signal well, and the range of the above numerical values is practical, though slightly different depending on the material constituting the pin probe. .

(5) A plating film such as gold or rhodium is provided on the surface of at least the flat portion which is the tip of the pin.

Next, the semiconductor LS according to the second invention of the present invention
The method of manufacturing the probe head for the I inspection apparatus will be described specifically with the features of the method.

(1) An electrode pad row for implanting and fixing a pin probe is formed on one surface, and an electrode pad row for connecting to an inspection device is formed on the back surface thereof, and the pads on both sides are formed. A step of preparing a wiring board electrically connected to each other in a specific arrangement relationship; an electrode pad row having a pattern corresponding to an electrode pad row for implanting and fixing a pin probe of the wiring board on a conductor sheet A step of fixing the conductor sheet to the wiring board through a conductor layer so that the pad rows are opposed to each other; a surface of the conductor sheet is polished to be smooth if desired, and then the conductor sheet is formed on the surface of the conductor sheet. Forming a polygonal mask pattern including a circle having the same center position as each pad of the electrode pad row; selecting the conductor sheet using the mask pattern as a mask By quenching, the step of forming a sharpened pin rows of polygonal conical including a circle corresponding to the electrode pad rows; characterized by having a step of removing and the mask.

(2) The conductor sheet is made of tungsten (W), molybdenum (Mo), titanium (Ti), chromium (C
r), beryllium (Be) -copper (Cu) alloy, and copper (Cu), and a mask or a metal that can withstand selective etching of the conductor sheet as a mask. And

(3) In the step of fixing the conductor sheet to the wiring board via the conductor layer with the two pad rows facing each other, a metal brazing material is coated on both pads in advance, and both pads are formed by brazing. The pad row is fixed.

(4) Gold (Au) is used as the brazing material.

(5) As the etching treatment in the step of selectively etching the conductor sheet using the mask pattern as a mask, etching is performed while performing side etching using a wet etching method, or etching is performed partway by dry etching. ,
Thereafter, etching is performed while performing side etching by a wet etching method to form a sharp pin array having a polygonal pyramid shape including a circle.

Since the thickness of the conductor sheet determines the height of the pin probe finally obtained,
A material having a desired thickness is used in consideration of the polishing amount of the surface flattening and the height of the electrode pad. Further, the material may be any material having a certain degree of hardness (rigidity), conductivity (low resistance) and brittle resistance (not brittle) as a pin probe, and generally the above-described materials. Is appropriate. However, when using copper, the hardness is slightly insufficient.
When the pin probe is formed, it is desirable that the surface be plated with, for example, nickel or chromium. In addition, even if the hardness is satisfied by the material, it is more preferable to form a well-known appropriate plating layer for the purpose of corrosion prevention in order to prevent oxidation of the surface of the pin because a highly reliable one is obtained.

The mask pattern includes a circle, an ellipse,
In addition, any polygonal shape such as a triangle, a square, and a pentagon may be used. The material may be not only metal but also a generally used photoresist (photosensitive resist). In any case, any material that can sufficiently act as a mask when etching a conductive sheet may be used. It is possible. For the metal mask, on the conductor sheet CVD (C he
mical V apor D eposition), sputtering, and other previously formed thin film to be a mask material by a known thin film forming technique (including a general vapor deposition), not to the thin photoresist film (UV only, electron beams, X-rays , Exposure through a desired mask, development, and etching can easily form a target metal mask pattern on a conductive sheet. It is well known that a resist sensitive to X-rays rather than ultraviolet rays and electron beams rather than X-rays can be used to form a fine pattern. In general, the positive type is superior to the negative type in view of the resolution of the resist.

[0021]

The conductor sheet, which is fixed by brazing to have a flat surface on the electrode pad portion of the wiring board, is formed by a wet etching method after forming a mask pattern for pin formation on the flat surface. Since it can be formed, it is possible to improve the pin assemblability of the probe head portion in high-density multi-pinning.

Further, a mask pattern for forming pins is formed on a flat surface of the conductive sheet which is a tip portion of the pin, and an undercut is performed so that a minute flat surface remains in a portion located at the center of the electrode pad portion. As a result, the height variation of the pin tip can be made the same level as the flat surface of the conductor sheet, and the lateral variation can be brought to a level close to the dimensional accuracy of the mask pattern.
High-precision pinning of the probe head can be realized.

[0023]

The present invention will be described in more detail with reference to the following examples. 1A to 1E show a manufacturing process for forming multiple pins on a multilayer wiring board 1 according to an embodiment of the present invention in the order of steps.

FIG. 1A shows a multilayer wiring board 1 having a power supply layer, a signal layer (input / output), and a ground layer, and a conductor sheet 2 after a metallizing step. The multilayer wiring board 1 is a wet thick-film ceramic substrate, and nickel platings 5, 6 and gold platings 7, 8 are applied to tungsten-based electrode pads 3, 4 formed on both surfaces, respectively.

On the other hand, the conductor sheet 2 is made of tungsten, and one surface of the conductor sheet 2 is nickel-plated 9 and gold-plated 10 in a desired pattern at a position corresponding to the electrode pad portion 3 described above. Here, the electrode pad portion 3 is electrically connected to the enlarged electrode pad portion 4 by the internal wiring (not shown) of the multilayer wiring board 1.

FIG. 1B shows a multilayer wiring board 1 and a conductor sheet 2.
After the brazing step. Gold plating 7 formed via nickel plating 5 on electrode pads 3 of multilayer wiring board 1
And gold plating 10 formed via nickel plating 9 on conductive sheet 2 are opposed to each other so that the corresponding patterns are vertically overlapped, and then heated and pressed to form gold (Au).
Forming a brazing portion 11 of gold (Au); In particular, the opposite surface of the conductor sheet 2 where the brazing portion 11 is not formed has a flat surface 12 at the time of thermocompression bonding. The flat surface 12 formed on the conductor sheet 2 can be further improved in flatness by polishing or the like after brazing.

The nickel plating 5 on the electrode pad portion 3 / the brazing portion 11 / the nickel plating 9 on the conductor sheet 2
The three layers form a conductor layer 11a for connecting and fixing the pad portion 3 and the pin 16 in a later step of etching the conductor sheet of FIG. 1D.

FIG. 1C shows a state after the step of forming the metal mask 13 on the flat surface 12 of the conductor sheet 2. In this mask forming step, copper is uniformly deposited on the flat surface 12 of the conductive sheet 2 of tungsten (W). Next, a photosensitive resist is applied thereon by a spinner, and a desired pattern is exposed and developed using a quartz mask or the like. In this example, an OMR-83 negative type ultraviolet resist manufactured by Tokyo Ohka Co., Ltd. was used as the resist, and the exposure was performed by irradiating an ultraviolet ray near 400 nm.

Next, the resist in the photosensitive portion is removed, and the copper film is etched with an ammonium persulfate-based aqueous solution to form a copper metal mask 13. Usually, a circular pattern is used as the shape of the metal mask 13. However, in order to control the shape of the tip of the pin in a later step, the metal mask 13 takes a square shape or other various shapes. Further, the metal mask 13 is usually formed so that the central axis 14 coincides with the position of the electrode pad portion 3 formed on the multilayer wiring board 1 under the condition of pin stand.

FIG. 1D shows the conductor sheet 2 after the selective etching step. The tungsten conductive sheet 2 is wet-etched from the surface on which the copper metal mask 13 is formed with a mixed aqueous solution of potassium hydroxide and red blood salt. At this time, by actively utilizing and controlling the undercut (also referred to as side edge, side corrosion), the minute flat surface 15 of the conductor sheet 2 is formed at the lower center of the metal mask 13 and at the same time, the conductor sheet is formed. 2 brazing part 11
Is removed leaving the vicinity of.

As a result, the brazing portion 11 of the multilayer wiring board 1
A sharpened pin 16 having a fine flat surface 15 at the tip is formed on the top thereof while leaving the metal mask 13.
Here, to raise the pin 16 vertically, use a metal mask
13 and the central axis 14 of the brazing portion 11 need to be aligned.
When it is necessary to remove the variation in the shape of the pin 16 due to the above-mentioned etching solution entering from the surface of the brazing portion 11 of the conductor sheet 2, before the selective etching step (FIG.
B or FIG. 1C) may be coated or filled with a resin-based wax on the surface of the brazing portion 11 of the conductive sheet 2 and may be removed with an organic solvent after completion of the etching.

FIG. 1E shows a state after the step of removing the metal mask 13 remaining at the tip of the pin 16. Copper metal mask
13 is removed by an ammonium persulfate-based aqueous solution. As a result, the manufacturing process for forming multiple pins on the multilayer wiring board 1 is basically completed. Although the conductive sheet 2 made of tungsten is used as the material of the pins 16, other metals can be used by selecting an aqueous solution that does not etch the metal mask 13 and the brazing portion 11.

For example, when copper is used for the conductor sheet 2, chromium is used for the metal mask 13. At this time, copper,
As the chromium etchant, an aqueous solution of ammonium persulfate and an aqueous solution of potassium ferricyanide are used, respectively. In addition, by forming a plating film of gold or rhodium on the surface of the pin 16, the electrical contact characteristics between the electrode pad (solder bump) of the semiconductor wafer (chip) and the pin 16 can be stabilized and improved. it can.

FIG. 2 shows a cross-sectional structure of the multilayer wiring board 1 on which the above-described multi-pin is formed. In the multilayer wiring board 1, a signal wiring 18, a power supply layer 19, and a ground layer 20 are formed of a conductive material made of tungsten or the like in an alumina insulating layer 17.
Further, electrode pads 21 and 22 are formed on the upper and lower surfaces, respectively. The pitch 23 between the electrode pads 21 on the upper surface is
The electrode pad on the top is enlarged to about 3 times the pitch 24 between
It has a structure that facilitates electrical and mechanical connection with 21. The pins 16 are formed on the lower electrode pads 22 by the above-described multi-pin forming method. Further, nickel and gold metallization 25 is applied on the upper surface electrode pad 21,
Improves reliability for pin contact and solder connection.

On the other hand, the signal wiring 18 is a strip line or a microstrip line using the power supply layer 19 and the ground layer 20 as reference layers for transmitting and receiving high-speed electric signals, and has a constant characteristic impedance.

FIG. 3 shows a case where the multilayer wiring board 1 is not used as the board on which the above-mentioned multi-pin is formed. At this time, pin 16
The inter-pad pitch 24 of the electrode pad 22 formed with is not enlarged, and the wiring 26 is formed vertically by through-hole printing. Since the wiring board 27 having such a structure has a simple structure as compared with the above-described multilayer wiring board 1, the manufacturing cost can be reduced. Furthermore, by standardizing the arrangement of the pins 16, that is, the arrangement of the electrode pads 22 by utilizing the simple structure, the wiring board 27 can be provided as a pin block for general versatility.

FIG. 4 shows a multi-layer wiring board 1 having the above-mentioned multi-pin formed thereon, a multi-layer thick film substrate 31 for pitch expansion, and solder balls (electrode pads) 30 arranged on one chip 29 area of a semiconductor wafer 28. And pitch enlargement multilayer printed circuit board 32
The transmission path of a semiconductor inspection apparatus showing a state in which a probe card 33 (1, 31, 32) composed of a semiconductor device is electrically and mechanically contacted by pins 16 (not shown) provided on the multilayer wiring board 1. 2 shows a partial cross-sectional structure.

The probe card 33 is electrically connected to a coaxial connector 34 for transmitting and receiving signals to and from a tester unit (not shown) and an electrode pattern (not shown) provided on the surface of the multilayer printed circuit board 32 for pitch expansion. A support substrate 36 on which a coaxial spring contact pin 35 for mechanical contact is arranged,
They are electrically connected via a positioning substrate 37. At this time, the probe card 33 is detached by opening and closing the support substrate 36. Further, when the pins 16 of the probe card 33 are worn or deformed, the connection portion (solder or brazing) of the multilayer wiring substrate 1 to the multilayer thick film substrate 31 for pitch expansion is performed.
Separate and replace.

The multi-layer thick film substrate 31 for pitch expansion described above.
The connection between the substrate and the pitch-enlarging multilayer printed circuit board 32 is also formed by soldering or brazing. Probe card 33
In the configuration of the above, when the expansion between the electrode pads is not so required, the above-mentioned multilayer thick film substrate 31 for pitch expansion is removed and used, or the multilayer thick film substrate for pitch expansion is used.
In some cases, multiple pins may be formed directly on the 31 electrode pads (not shown).

[0040]

According to the present invention, since a high density of multiple pins can be collectively formed on the electrode pad portion of the wiring board, there is an effect of greatly improving the assembling property of the pin stand.

Furthermore, since the height direction variation of the pin tip portion can be made to the same level as the flat surface of the conductor sheet, and the lateral direction variation can be brought to a level close to the dimensional accuracy of the mask pattern, the probe head portion This has the effect of significantly improving the pin tip position accuracy.

[Brief description of drawings]

FIG. 1A is a sectional process view showing a manufacturing process for forming multiple pins according to an embodiment of the present invention.

FIG. 1B is a sectional process view showing a manufacturing process for forming a multi-pin according to an embodiment of the present invention.

FIG. 1C is a sectional process view showing a manufacturing process for forming a multi-pin according to one embodiment of the present invention;

FIG. 1D is a sectional process view showing the manufacturing process for forming the multi-pin according to one embodiment of the present invention;

FIG. 1E is a sectional process drawing showing the manufacturing process for forming the multi-pin according to the embodiment of the present invention.

FIG. 2 is a cross-sectional view of a substrate on which multiple pins are formed according to another embodiment of the present invention.

FIG. 3 is a cross-sectional view of a substrate on which multiple pins are formed according to another embodiment of the present invention.

FIG. 4 is a sectional view of a main part of a transmission line of a semiconductor inspection device using the probe head of the present invention.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 ... Multilayer wiring board, 2 ... Conductor sheet, 3, 4 ... Electrode pad part, 5, 6, 9 ... Nickel plating, 7, 8, 10 ... Gold plating, 11 ... Brazing part, 11a ... Conductor layer, 12 ... Flat Surface, 13 ... Metal mask, 14 ... Central axis, 15 ... Micro flat surface, 16 ... Pin, 17 ... Alumina insulating layer, 18 ... Signal wiring, 19 ... Power supply layer, 20 ... Ground layer, 21, 22 ... Electrode pad , 23, 24 ... Pitch, 25 ... Gold metallization.

Front page continuation (72) Inventor Hironobu Okino 292 Yoshida-cho, Totsuka-ku, Yokohama-shi, Kanagawa, Ltd.Inside of Hitachi, Ltd. Hitachi, Ltd., Production Engineering Laboratory

Claims (10)

[Claims] 1. In a probe head for transmitting an electric signal by contacting an electrode pad of a semiconductor LSI, electrode pad rows are formed on both surfaces, and the pads on the both surfaces are electrically connected to each other in a specific arrangement relationship. The wiring in the substrate is connected from at least one substrate surface side on which the pin probe is provided and has at least three wiring layers including a power supply layer, a signal input / output layer, and a ground layer. An expanded multilayer wiring board, and a polygonal pyramid shape including a circle having a thick base and a tip having a minute flat surface, which is implanted and fixed on each pad on the one board surface through a conductor layer. A probe head for a semiconductor LSI inspection device, comprising a pin probe. 2. In a probe head for transmitting an electric signal by contacting an electrode pad of a semiconductor LSI, electrode pad rows are formed on both surfaces, and the pads on both surfaces are electrically connected to each other in a specific arrangement relationship. The wiring in the substrate is connected from at least one substrate surface side on which the pin probe is provided and has at least three wiring layers including a power supply layer, a signal input / output layer, and a ground layer. A multilayer wiring board composed of an expanded ceramic multilayer laminated board, and a circle having a thick base and a minute flat surface at the tip fixed and implanted through a conductor layer on each pad on the one board surface. A probe head for a semiconductor LSI inspection device, comprising a polygonal cone-shaped pin probe including 3. A probe head for transmitting an electric signal by contacting an electrode pad of a semiconductor LSI, wherein electrode pad rows are formed on both surfaces, and the pads on both surfaces are electrically connected to each other in a specific arrangement relationship. The wiring in the substrate is connected from at least one substrate surface side on which the pin probe is provided and has at least three wiring layers including a power supply layer, a signal input / output layer, and a ground layer. A multilayer wiring board including an expanded multilayer laminated board, and a circle having a thick base and a minute flat surface at its tip, which is implanted and fixed via a conductor layer on each pad on the one board surface, A polygonal cone-shaped pin probe, wherein the pin probe is made of tungsten (W), molybdenum (Mo), titanium (T).
Any one selected from the group consisting of i), chromium (Cr), beryllium (Be) -copper (Cu) alloy, and a copper (Cu) substrate whose surface is plated with a metal harder than copper (Cu). A probe head for a semiconductor LSI inspection device, which is made of the above metal. 4. A probe head for transmitting an electric signal in contact with an electrode pad of a semiconductor LSI, wherein electrode pad rows are formed on both surfaces, and the pads on both surfaces are electrically connected to each other in a specific arrangement relationship. The wiring in the substrate is connected from at least one substrate surface side on which the pin probe is provided and has at least three wiring layers including a power supply layer, a signal input / output layer, and a ground layer. An expanded multilayer wiring board, and a polygonal pyramid shape including a circle having a thick base and a tip having a minute flat surface, which is implanted and fixed on each pad on the one board surface through a conductor layer. A pin probe, wherein h = 0.5 to 2d, where h is the height of the pin probe from the wiring board surface and d is the pitch between adjacent pad pads of the pin probe. Semiconductor Probe head for LSI inspection equipment. 5. In a probe head for transmitting an electric signal by contacting an electrode pad of a semiconductor LSI, electrode pad rows are formed on both surfaces, and the pads on both surfaces are electrically connected to each other in a specific arrangement relationship. The wiring in the substrate is connected from at least one substrate surface side on which the pin probe is provided and has at least three wiring layers including a power supply layer, a signal input / output layer, and a ground layer. Includes an expanded multilayer wiring board and a circle having a thick base with a base planted and fixed via a conductor layer on each pad on the one board surface and having a plated coating on its tip and a minute flat surface. A probe head for a semiconductor LSI inspection device, comprising a polygonal cone-shaped pin probe. 6. An electrode pad row for implanting and fixing a pin probe on one surface, and an electrode pad row for connecting to an inspection device is formed on the back surface thereof, and between the pads on both sides. A step of preparing a wiring board electrically connected to each other in a specific arrangement relationship; an electrode pad row having a pattern corresponding to an electrode pad row for implanting and fixing a pin probe of the wiring board on a conductor sheet A step of forming; a step of fixing the conductor sheet to the wiring board via a conductor layer with the pad rows facing each other; a surface of the conductor sheet being polished as desired to be smooth, and then the electrodes on the conductor sheet surface. A step of forming a polygonal mask pattern including a circle having the same center position as each pad of the pad row; the conductor sheet is selectively etched using the mask pattern as a mask. By forming a polygonal cone-shaped sharpened pin array including a circle corresponding to the electrode pad array; and removing the mask, the probe head for a semiconductor LSI inspection apparatus. Manufacturing method. 7. The conductor sheet is any one of the group consisting of tungsten (W), molybdenum (Mo), titanium (Ti), chromium (Cr), beryllium (Be) -copper (Cu) alloy and copper (Cu). 7. The semiconductor LS according to claim 6, wherein the semiconductor LS is made of one kind of metal, and is used as a mask, which is a metal or photoresist that can resist selective etching of the conductor sheet.
Method for manufacturing probe head for I inspection device. 8. In the step of fixing the conductor sheet to the wiring board via a conductor layer with the both pad rows facing each other, a metal brazing material is formed on both pads in advance and both pads are brazed. The method for manufacturing a probe head for a semiconductor LSI inspection device according to claim 6, wherein the rows are fixed. 9. The method of manufacturing a probe head for a semiconductor LSI inspection device according to claim 8, wherein gold (Au) is used as the brazing material. 10. The etching process in the step of selectively etching the conductor sheet using the mask pattern as a mask, is performed while performing side etching using a wet etching method, or is partially etched by dry etching, 10. The semiconductor LSI inspecting apparatus according to claim 6, further comprising a wet etching method for performing side etching while performing side etching to form a polygonal cone-shaped sharpened pin array. For manufacturing probe heads for automobiles.