JPH09198012A - Liquid crystal display device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To make the number of switches and the number of gradation voltage lines smaller than the number of display gradations by generating the gradation voltages having N levels from gradation voltages in which the gradation voltages having M levels are adjacent and outputting one level among them to respective video signal line while selecting it. SOLUTION: The gradation voltages having 65 levels are generated by voltage-dividing gradation reference voltages (V0-V8) having 9 values inputted from an internal power source circuit by resistor group for voltage-division having 8 resistors between respective gradation reference voltages and constituted of 64 series resistors (Rs) and gradation voltages having M levels (in this case, M is 17) among them are outputted to the gradation voltage selection circuit of the output circuit in a drain driver via voltage busses. That is, gradation voltages being the same number as the number of gradations are not outputted to the output circuit in the drain driver via voltage busses but the gradation voltages having M levels are generated and outputted to the gradation voltage selection circuit of the output circuit via the voltage busses.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device used in a personal computer, a workstation, etc., and more particularly to a technique effective when applied to a gradation voltage generating circuit of a liquid crystal display device capable of multi-gradation display. Regarding

[0002]

2. Description of the Related Art As a conventional liquid crystal display device, a simple matrix type liquid crystal display device for driving pixels at intersections of stripe-shaped XY electrodes, and an active element (for example, a thin film transistor) for each pixel.
The liquid crystal display device is roughly classified into an active matrix type liquid crystal display device having a r: TFT) and switching-driving this active element.

FIG. 8 is a block diagram showing a schematic structure of a conventional TFT type active matrix type liquid crystal display device capable of multicolor display, for example, 64 gradation multicolor display.

A liquid crystal display panel (TFT-LC shown in FIG.
D) is composed of 800 × 3 × 600 pixels (Pix).

FIG. 9 shows a liquid crystal display panel (TF) shown in FIG.
It is a figure which shows the equivalent circuit of 1 pixel (Pix) of T-LCD.

In FIG. 9, ITO is a pixel electrode and COM.
Is a counter electrode (common electrode), CLC is a liquid crystal layer, Dn is a drain line (or video signal line), Gn is a gate line (or scanning signal line), TFT is a thin film transistor, and Cad.
d is a storage capacitance, and Cn is a capacitance line.

As shown in FIG. 9, the liquid crystal layer can be represented by an electrostatic capacitance (CLC) when represented by an equivalent circuit, so that the pixel (Pix)
Is a pixel electrode (ITO), a counter electrode (common electrode) (C
OM), liquid crystal layer (CLC), and additional capacitance (Cadd).

As shown in FIG. 16, since the light transmittance of the liquid crystal layer changes depending on the voltage applied between the pixel electrode (ITO) and the counter electrode (COM), the counter electrode (CO
Pixel electrode (ITO) based on the voltage applied to M)
By applying a gray scale voltage determined for each of a plurality of display gray scales, multi-gray scale display is possible.

The thin film transistor (TFT) is connected to the source (S) connected to the pixel electrode (ITO), the drain (D) connected to the drain signal line (Dn), and the gate signal line (Gn). The gate (G) is provided, and electrical conduction / non-conduction between the drain signal line (Dn) and the pixel electrode (ITO) is controlled by the voltage applied to the gate (G).

A gradation voltage is applied to the drain signal line (Dn) and a scanning voltage is applied to the gate line (Gn) to select a pixel electrode (ITO) to which the gradation voltage is applied.

The storage capacitor (Cadd) is connected to the pixel electrode (IT
The gradation voltage applied to O) is held until the next gradation voltage is applied to the pixel electrode (ITO).

The capacitance line (Cn) can also serve as the gate signal line (Gn-1) in the previous stage.

FIG. 10 is a timing chart showing the voltage applied to the pixel (Pix) shown in FIG.

In FIG. 10, (1) is a gate line (G
n) shows the voltage waveform, (2) shows the voltage waveform of the counter electrode (COM) and the capacitance line (Cn), and (3) shows the voltage waveform of the drain line (Dn).

When a gradation voltage is applied to the pixel electrode (ITO), the gate voltage waveform (1) becomes the Gate On level and the TFT source (S) and drain (D) are electrically connected.

The voltage waveform (3) of the drain line (Dn) and the voltage waveform (2) of the counter electrode (COM) are inverted in phase, and the voltage waveform (3) of the drain line (Dn).
And a voltage difference between the voltage waveform (2) of the counter electrode (COM) is applied to the liquid crystal layer (CLC).

The voltage applied to the liquid crystal layer (CLC) has a gate voltage waveform (1) and a counter electrode voltage waveform (2) so that the timing of applying the positive polarity and the timing of applying the negative polarity alternate. ), Since the drain voltage waveform (3) is set, a direct current component is not applied to the liquid crystal layer (CLC), which shortens the life of the TFT type liquid crystal display panel (TFT-LCD), causes image sticking and causes an afterimage. The problem of is gone.

TFT type liquid crystal display panel (TFT-L
The feature of the liquid crystal display device using a CD is that a gray scale voltage is applied to the pixel electrode (ITO) via a switching element called a thin film transistor (TFT), and therefore each pixel (Pi
There is no crosstalk between x), and there is no need to use a special driving method for preventing crosstalk as in a simple matrix liquid crystal display device, and multi-gradation display is possible.

Further, as shown in FIG. 8, the drain driver 11 is provided on one side of the liquid crystal display panel (TFT-LCD).
The drain driver 11 is connected to the drain line (Dn) of the thin film transistor (TFT), and a gradation voltage for driving the liquid crystal is supplied to the thin film transistor (TFT).

A liquid crystal display panel (TFT-LCD)
A gate driver 12 is disposed on the side surface of the gate driver 12. The gate driver 12 is connected to the gate line (Gn) of the thin film transistor (TFT), and one horizontal operation time (1H), Gate On of the gate (G) of the thin film transistor (TFT). Supply voltage.

The display control device 10 receives the display data and the display control signal from the main body computer through the interface connector, and drives the drain driver 11 and the gate driver 12 based on the display data and the display control signal.

The display data from the main computer is composed of 18 bits, 6 bits for each color.

FIG. 11 shows the drain driver 1 shown in FIG.
2 is a block diagram showing a schematic configuration of 1.

As shown in FIG. 11, the drain driver 1
1 has one gradation voltage generation circuit 21, and the gradation voltage generation circuit 21 is input from the internal power supply circuit 13 9
The grayscale voltage for 64 grayscales is generated based on the grayscale reference voltage (V0 to V8) of the value, and the output circuit 2 is generated via the voltage bus 28.
Output to 7.

Further, the drain driver 11 is synchronized with the display data latching clock signal (CLK2) by the shift register 23 in the control circuit 22 and outputs 6 bits of display data for each color to the input register 24 by the number of outputs. Clock signal for output timing control (CLK
According to 1), the display data in the input register 24 is loaded into the storage register 25.

The display data taken in the storage register 25 is inputted to the output circuit 27 via the level shifter 26.

The polarity terminal of the drain driver 11 is provided for controlling the polarity of the voltage output to the drain line (Dn), and the carry input and carry output terminals are provided between the plurality of drain drivers 11 in the liquid crystal display device. It is set up for cooperation.

FIG. 12 is a block diagram showing a schematic structure of the output circuit 27 shown in FIG.

As shown in FIG. 12, the output circuit 27 is composed of a gradation voltage selection circuit 31 and a buffer amplifier 32 provided for each drain signal line (Dn). The grayscale voltage corresponding to the display data output from the storage register 25 is selected from the grayscale voltages of 64 grayscales output from the grayscale voltage generation circuit 21 via the bus 28, and the buffer amplifier 32 is selected. To each drain line (Dn).

FIG. 13 is a diagram showing an example of the gradation voltage selection circuit 31 provided for each one drain signal line (Dn) shown in FIG.

The gradation voltage selection circuit 31 shown in FIG. 13 includes a plurality of switch circuits (S00 to S63) connected to each gradation voltage line of the voltage bus 28 and the storage register 2.
5 and a control circuit 33 which decodes the display data output from the device 5 and turns on the corresponding switch circuit.

In this case, a plurality of switch circuits (S00
(S63) requires 64, which is the same number as 64 gradations, and the voltage bus 28 also needs 64 gradation voltage lines, which is the same number as the number of gradations.

FIG. 14 shows the internal power supply circuit 13 shown in FIG.
3 is a diagram showing an example of a grayscale reference voltage generation circuit 14 in FIG.

The gradation reference voltage generating circuit 14 shown in FIG.
Is an example in which each gradation reference voltage (V0 to V8) is generated by a resistance voltage dividing circuit, and each gradation reference voltage (V0 to V8) is set by the resistance ratio of a plurality of resistors (RR0 to RR9). The voltage divided by (RR0 to RR9) is amplified to a sufficient power by each buffer circuit (OP1 to OP9) and output to the drain driver 11.

FIG. 15A is a diagram showing an example of the gradation voltage generation circuit 21 of the drain driver 11 shown in FIG. 11, and FIG. 15B is a simplified version of FIG. Is.

The gray scale voltage generation circuit 21 of the drain driver 11 shown in FIG. 15 has resistors R11 to R11 between the gray scale reference voltages (V0 to V8) of the nine values input from the internal power supply circuit 13. The voltage is divided by the resistor R88 to generate a gradation voltage for 64 gradations (V00 to V63).

That is, the resistors R11 to R17 are connected between the gray scale reference voltage (V0) and the gray scale reference voltage (V1), and the gray scale voltage (V01) to the gray scale voltage (V06) is connected from the connection point. In addition, between the gradation reference voltage (V1) and the gradation reference voltage (V9), eight resistors R21 to R88 are sequentially connected, and the gradation voltage (V08) is connected from the connection point. To gradation voltage (V14), gradation voltage (V16) to gradation voltage (V22), gradation voltage (V2)
4) to gradation voltage (V30), gradation voltage (V32) to gradation voltage (V38), gradation voltage (V40) to gradation voltage (V46), gradation voltage (V48) to gradation voltage (V54) ), The gradation voltage (V56) or the gradation voltage (V6
2) is output, and nine gradation reference voltages (V1 to V8) are output,
55 gradation voltages (V01 to V06, V08 to V14,
V16-V22, V24-V30, V32-V38, V
40 to V46, V48 to V54, V56 to V62), a gray scale voltage (V00 to V63) for 64 gray scales is generated.

Further, as shown in FIG. 16, generally, the relationship between the voltage applied to the liquid crystal layer and the transmittance is not linear,
The change of the transmittance with respect to the voltage applied to the liquid crystal layer is small at the places where the transmittance is high and low, and the change of the transmittance is large at an intermediate position.

Therefore, in the liquid crystal display device capable of multi-color display of 64 gradations, in order to linearly display 64 gradations, the gradation reference voltage value given to the gradation voltage generating circuit 21 of the drain driver 11 is set. Is, as shown in FIG.
The difference should be small near the halftones (V2 to V6) instead of at equal intervals, and should be large at other points (V0 to V2, V6 to V8).

[0040]

In recent years, in the TFT type active matrix type liquid crystal display device, there has been a demand for more gray scales from 64 gray scale display to 256 gray scale display, and more liquid crystal display. Display panel (TFT-LC
There is a demand for a narrower frame of D).

However, as can be seen from FIG. 13, in the TFT type active matrix type liquid crystal display device using the conventional drain driver 11, 1 is determined by the display data from the gray scale voltages of multiple gray scales. In order to select one grayscale voltage, the same number of switch circuits (S01 to S63) as the number of grayscales are required, and the voltage bus 28 having the same number of grayscale voltage lines as the number of grayscales is required. Is.

Therefore, the conventional drain driver 11
In a TFT type active matrix type liquid crystal display device using, in order to increase the number of gray scales such as 256 gray scale display, the switch circuit in the gray scale voltage selection circuit 31 is also adjusted accordingly. The number of gray scale voltage lines of the voltage bus 28 also needs to be increased.

However, increasing the number of switch circuits in the gradation voltage selection circuit 31 and the voltage bus 28
Increasing the gray scale voltage line of 1 leads to an increase in size of the drain driver 11, and there is a problem that the size of the drain driver 11 increases.

Further, the increase in the size of the drain driver 11 has been a factor that hinders the narrowing of the frame of the liquid crystal display panel (TFT-LCD).

Therefore, in the active matrix type liquid crystal display device of the TFT system using the conventional drain driver 11, the size of the drain driver is increased when the number of gradations is increased, for example, in 256 gradation display. However, there is a problem that the liquid crystal display panel (TFT-LCD) cannot be narrowed down due to its large size.

The present invention has been made to solve the above-mentioned problems of the prior art, and an object of the present invention is to provide a multi-gradation display without increasing the size of the drain driver in a liquid crystal display device. To provide a technology that enables

Another object of the present invention is to provide a liquid crystal display device without increasing the size of the drain driver.
It is an object of the present invention to provide a technology capable of multi-gradation display and capable of dealing with a narrow frame.

The above and other objects and novel features of the present invention will become apparent from the description of this specification and the accompanying drawings.

[0049]

SUMMARY OF THE INVENTION Among the inventions disclosed in the present application, the outline of a representative one will be briefly described.
It is as follows.

(1) A plurality of video signal lines, a plurality of scanning signal lines orthogonal to the plurality of video signal lines, and a matrix pattern in an intersection region of the plurality of video signal lines and the plurality of scanning signal lines. And a plurality of pixels arranged in a row, wherein a grayscale voltage is applied to the pixels in the column direction by the video signal lines, and a scanning signal voltage is applied to the pixels in the row direction by the scanning signal lines. A power supply circuit that outputs k gray scale reference voltages, a video signal line drive circuit that outputs a gray scale voltage to each of the video signal lines, and a scan signal line that outputs a scan signal voltage to each of the scan signal lines. In the liquid crystal display device including a drive circuit, the video signal line drive circuit divides the k gray scale reference voltages output from the power supply circuit to generate a gray scale voltage of M gray scales. A generator is provided for each of the video signal lines. A grayscale voltage of N grayscale is generated from an adjacent grayscale voltage of the grayscale voltage of M grayscale generated by the grayscale voltage generation means based on the display data, and one of the grayscale voltages is selected. And output means for outputting to each of the video signal lines.

(2) In the above-mentioned means (1), the output means selects the adjacent grayscale voltage of the M grayscale voltages generated by the grayscale voltage generation means. And an intermediate grayscale voltage generating means for generating an intermediate grayscale voltage of (N-1) grayscale by dividing adjacent grayscale voltages selected by the first switching means into N equal parts.
A gradation voltage of M gradations generated by the gradation voltage generating means,
Alternatively, a second switching unit that selects one of the (N-1) grayscale voltages generated by the grayscale voltage generation unit and outputs the selected grayscale voltage to the video signal line; And a control circuit for controlling the first switching means and the second switching means based on data.

(3) In the means of (2), the intermediate gradation voltage generating means is a voltage dividing circuit in which resistors are connected in series.

(4) In the means of (2), the intermediate gradation voltage generating means is a voltage dividing circuit in which capacitors are connected in series.

According to each of the above-mentioned means, the video signal line driving circuit includes the gradation voltage generating means and the output means provided for each video signal line, and the gradation voltage generating means outputs from the power supply circuit. The k gray scale reference voltages are divided to generate gray scale voltages of M (M <n) gray scales.

Further, for example, the first switching means for selecting the adjacent gray scale voltage of the M gray scale voltage generated by the gray scale voltage generating means and the selected adjacent gray scale voltage are N (N = n / (M-1))
1) An intermediate gradation voltage generating unit that generates an intermediate gradation voltage of a gradation and an M gradation voltage generated by the gradation voltage generating unit, or generated by an intermediate gradation voltage generating unit ( N-1) select one of the intermediate gray scale voltages of the gray scale,
An output unit having a second switching unit for outputting to each video signal line and a control circuit for controlling each switching unit, and M gradations generated by the gradation voltage generating unit based on the display data. A grayscale voltage of N grayscales is generated from adjacent grayscale voltages of voltages, and one of them is selected and output to each video signal line. Therefore, a switch provided for each video signal line And the number of gradation voltage lines of the voltage bus can be significantly reduced from the number of display gradations.

As a result, it is possible to reduce the size of the gradation voltage selection circuit, and accordingly it is also possible to reduce the size of the video signal line drive circuit.

[0057]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments in which the present invention is applied to a TFT type active matrix type liquid crystal display device will be described in detail below with reference to the drawings.

In all the drawings for explaining the embodiments, parts having the same function are designated by the same reference numerals, and the repeated description thereof will be omitted.

In the TFT active matrix type liquid crystal display device of the present invention, the configuration of the multi-gradation voltage generating circuit and the gradation voltage generating circuit in the drain driver 1 is the TFT active matrix shown in FIG. The configuration is the same as that of the TFT type active matrix type liquid crystal display device shown in FIG. 8 except for the difference from the type liquid crystal display device, and therefore detailed description thereof will be omitted.

[Embodiment 1] FIG. 1 is a block diagram of 64 gradations of a drain driver 11 of a TFT type active matrix liquid crystal display device according to an embodiment (Embodiment 1) of the present invention. It is a figure which shows the gradation voltage generation circuit 1 which produces | generates a voltage regulation.

As shown in FIG. 1, the grayscale voltage generation circuit 1 according to the embodiment of the present invention is similar to the grayscale voltage generation circuit shown in FIG. Adjusting reference voltage (V0 to V8), 64 series resistors (R) having 8 resistors (R) between each gradation reference voltage
The voltage dividing resistor group 6 configured as described above divides the voltage to generate a gradation voltage of 65 gradations, and the gradation voltage of M gradations (17 in Embodiment 1 of the present invention) of the gradation voltages is generated by the voltage bus 28. It outputs to the gradation voltage selection circuit 31 of the output circuit 27 in the drain driver 11 via the.

That is, in the first embodiment of the present invention, as in the conventional case, the same number of gradation voltages as the number of gradations are applied to the gradation voltage selection circuit of the output circuit 27 in the drain driver 11 via the voltage bus 28. Instead of outputting it to 31, a gradation voltage of M gradations is generated and outputted to the gradation voltage selection circuit 31 of the output circuit 27 in the drain driver 11 via the voltage bus 28.

Therefore, in the first embodiment of the present invention,
It is possible to significantly reduce the number of grayscale voltage lines of the voltage bus 28. For example, while the conventional voltage bus 28 of the drain driver 11 requires 64 grayscale voltage lines, In the voltage bus 28 of the first embodiment of the invention, the number of gradation voltage lines of 17 is sufficient, and in the first embodiment of the present invention, the number of gradation voltage lines of the voltage bus 28 is 64 to 17.
Can be reduced to.

In the gradation voltage generating circuit 1 according to the first embodiment of the present invention, since the conventional gradation voltage generating circuit 21 is used as it is, eight voltage dividing resistor groups 6 are provided between each gradation reference voltage. Of the resistor (R), that is, 64 series resistors (R) each having four resistors (R) between each gradation voltage. 16 series resistors (R) having the same series resistance (R) may be used.

FIG. 2 is a diagram showing the gradation voltage selection circuit 31 of the drain driver 11 of the TFT type active matrix type liquid crystal display device according to the embodiment of the invention (Embodiment 1 of the invention). is there.

As shown in FIG. 2, the first embodiment of the present invention
Voltage selection circuit 31 of the drain driver 11 in
Is a first switching means 2, a second switching means 3, an intermediate gradation voltage generating means 4 composed of a voltage dividing circuit in which four resistors (R1) are connected in series, and a first
Switching means 2 and second switching means 3
Corresponding switch circuit (S00-S64, Sa-S
The control circuit 33 turns on e).

The first switching means 2 has adjacent gray scale voltages (for example, adjacent gray scale voltages among the gray scale voltages of 17 gray scales outputted from the gray scale voltage generation circuit 1 shown in FIG. 1 via the voltage bus 4).
The gradation voltage (V00) and gradation voltage (V04), the gradation voltage (V04) and gradation voltage (V08), etc. are selected.

Further, the intermediate gradation voltage generating means 4 changes the distance between the adjacent gradation voltages selected by the switching means 2 by 4
The voltage is equally divided to generate an intermediate gradation voltage of 3 gradations.

The second switching means 3 has a gray scale voltage selected by the first switching means 2.
Alternatively, the intermediate gradation voltage of 3 gradations generated by the intermediate gradation voltage generating means 4 is selected and output to each drain signal line (Dn).

Further, the control circuit 33 decodes the display data output from the storage register 25 and corresponding switch circuits (S00-S64, Sa-) in the first switching means 2 and the second switching means 3.
Se) is turned on.

FIG. 3 shows, in the first embodiment of the present invention,
Corresponding switch circuits (S00 to S64, Sa to S) in the first switching means 2 and the second switching means 3 that should be turned on to obtain a gray scale voltage of 64 gray scales.
It is a figure which shows e).

As described above, in the first embodiment of the present invention,
64 gradations of the gradation voltage of 17 gradations output from the gradation voltage generating circuit 1 via the voltage bus 4 and the intermediate gradation voltage of 48 gradations generated by the intermediate gradation voltage generating means 4. The gradation display is performed.

In this case, one of the 17 gradation voltages (for example, V8) output from the gradation voltage generating circuit 1 via the voltage bus 4 is not used.

Therefore, in the gray scale voltage selection circuit 31 of the drain driver 11 according to the first embodiment of the present invention,
Switches ((S00 to S6
4, Sa to Se) can be significantly reduced. For example, the gradation voltage selection circuit 3 of the conventional drain driver 11 can be reduced.
1 required 64 switches, whereas
In the gradation voltage selection circuit 31 according to the first embodiment of the present invention, 22
The number of switches may be one, and in the first embodiment of the present invention, the number of switches in the gradation voltage selection circuit 31 can be reduced from 64 to 22.

In the first embodiment of the present invention, when a leak current flows through each drain signal line (Dn), an unnecessary current is generated in the intermediate gradation voltage generating means 4 or the gradation voltage generating circuit 1. The level of the halftone voltage generated by the halftone voltage generating means 4 or the grayscale voltage of 17 grayscales output from the grayscale voltage generation circuit 1 via the voltage bus 4 changes. It is necessary to increase the input impedance of the buffer amplifier 32.

FIG. 4 is a diagram showing an embodiment in which the present invention is implemented by applying a specific resistance value to the gradation voltage generating circuit circuit 1 shown in FIG.

In FIG. 4, the voltage dividing resistor group 6 has two series resistors (for example, R1 and R2) between each gradation voltage.
It is an example constituted by 32 series resistors having a.

As shown in FIG. 16, in general, the relationship between the voltage applied to the liquid crystal layer and the transmittance is not linear, and the transmittance with respect to the voltage applied to the liquid crystal layer is not linear at high and low transmittances. Since the change is small and the change in transmittance is large in the middle of the change, the gradation reference voltage value input to the gradation voltage generation circuit 21 of the drain driver 11 is shown in the figure in order to linearly display 64 gradations. 15
As shown in (b), it is not at equal intervals but near the halftone (V2
~ V6), the difference is small, and other than that (V0-V2, V6-
V8) has increased.

Therefore, in the embodiment shown in FIG. 4, the gradation voltage (V) near the halftone is set so that the currents flowing through the resistors (R1 to R32) of the voltage dividing resistor group 6 shown in FIG.
16 to V48) to reduce the resistance value between each gradation voltage, and other gradation voltages (V00 to V16, V48 to V64)
The resistance value between each gradation voltage is increased.

That is, the gradation voltage (V16 to V
48), the resistance value between each gradation voltage is 80 ohm (40 + 4
0), the resistance value between the gradation voltages (V08 to V16, V48 to V56) is 96 ohms (48 + 48), and the resistance value between the gradation voltages (V04 to V08, V56 to V60). Is 160 ohms (80 + 80), and the resistance value between the gradation voltages (V00 to V04, V60 to V64) is 280 ohms (140 + 140).

Further, since the intermediate gradation voltage generating means 4 is connected in parallel to the gradation voltage generating circuit 1, the voltage level of each gradation voltage does not change due to the current flowing through the intermediate gradation voltage generating means 4. In addition, the four series resistances (R) forming the halftone voltage generating means 4 are as large as 1 megohm.

As shown in FIG. 9, in the actual pixel (Pix), there is a parasitic capacitance (Cgs) between the gate (G) and the pixel electrode (ITO), and the driving method shown in FIG. The driving voltage applied to the gate (G) is Gate
When it changes from On to Gate Off, a pulse accompanying the change is transmitted through the parasitic capacitance (Cgs) to the pixel electrode (IT).
Since the voltage is applied to O), the voltage applied to the liquid crystal layer (CLC) shifts.

Therefore, when setting the gradation reference voltage (V0 to V8) of the internal power supply circuit 13, the liquid crystal layer (C
LC) It is necessary to consider the added voltage shift.

In this case, when the voltage applied to the liquid crystal layer has a negative polarity, the voltage shift is added to the gradation reference voltage, and when the voltage applied to the liquid crystal layer has a positive polarity, the voltage shift is added. Since it is necessary to subtract from the gradation reference voltage, the gradation reference voltage generation circuit 14 in the internal power supply circuit 13 shown in FIG. 14 needs to have two types of negative polarity and positive polarity.

Similarly, the grayscale voltage generation circuit 1 in the drain driver 11 also has two types of voltage dividing resistance groups 6 of negative polarity and positive polarity, which are switched and used according to the polarity signal.

[Embodiment 2] FIG. 5 shows another embodiment of the present invention (Embodiment 2) of the TFT type active matrix type liquid crystal display device in which the drain driver 11 has 64 gradations. FIG. 3 is a diagram showing a gradation voltage generation circuit 1 and a gradation voltage selection circuit 31.

The liquid crystal display device according to the second embodiment of the present invention is
Same as Embodiment 1 of the present invention, except that the intermediate grayscale voltage generation means 4 in the grayscale voltage selection circuit 31 of the drain driver 11 is configured by a voltage dividing circuit in which four capacitors are connected in series. Is.

In FIG. 5, the gradation voltage generating circuit 1 for 64 gradations and the gradation voltage selecting circuit 31 are shown in the same drawing,
Further, the control circuit 33 and the buffer amplifier 32 shown in FIG. 2 are omitted.

Also in the second embodiment of the present invention, the voltage bus 28 is used.
It is possible to reduce the number of gray scale voltage lines of 64 to 17 and the number of switches in the gray scale voltage selection circuit 31 from 64 to 14.

Also in the third embodiment of the present invention, when a leak current flows through each drain signal line (Dn), an unnecessary current is generated in the intermediate gradation voltage generating means 4 or the gradation voltage generating circuit 1. The level of the grayscale voltage generated by the grayscale voltage generation means 4 or the grayscale voltage of 33 grayscales output from the grayscale voltage generation circuit 1 via the voltage bus 4 changes. It is necessary to increase the input impedance of the buffer amplifier 32.

[Third Embodiment] FIG. 6 shows another embodiment of the present invention (Embodiment 3) of the TFT type active matrix liquid crystal display device in which the drain driver 11 has 64 gradations. FIG. 3 is a diagram showing a gradation voltage generation circuit 1 and a gradation voltage selection circuit 31.

The liquid crystal display device according to the third embodiment of the present invention is
The grayscale voltage generation circuit 1 of the drain driver 11
A grayscale voltage of (M = 33) grayscale is generated and output to the grayscale voltage selection circuit 31 in the drain driver 11 via the voltage bus 28, and the grayscale voltage selection circuit 31 of the drain driver 11 is generated.
It is the same as the first embodiment of the present invention, except that the intermediate gradation voltage generating means 4 therein is composed of a voltage dividing circuit in which two resistors are connected in series.

In FIG. 6, the gray scale voltage generation circuit 1 and the gray scale voltage selection circuit 31 for 64 gray scales are shown in the same drawing.
Further, the control circuit 33 and the buffer amplifier 32 shown in FIG. 2 are omitted.

As shown in FIG. 6, the third embodiment of the present invention.
In the gradation voltage generation circuit 1 in FIG. 1, the nine-valued gradation reference voltages (V0 to V8) input from the internal power supply circuit 13 are provided with 64 series resistors (R) between the gradation reference voltages. The voltage dividing resistor group 6 composed of a series resistor (R) divides the voltage to generate a grayscale voltage of 65 grayscales, of which the grayscale voltage of M grayscales (33 in the third embodiment of the present invention). The voltage bus 2
It outputs to the gradation voltage selection circuit 31 of the output circuit 27 in the drain driver 11 via 8.

Therefore, in the third embodiment of the present invention,
It is possible to reduce the number of gradation voltage lines of the voltage bus 28 from 64 to 33.

In the gradation voltage selection circuit 31 according to the third embodiment of the present invention, the first switching means 2
Of the 33 grayscale voltages output from the grayscale voltage generation circuit 1 via the voltage bus 4, adjacent grayscale voltages (for example,
The gradation voltage (V00) and the gradation voltage (V02), the gradation voltage (V02) and the gradation voltage (V04), etc. are selected.

Further, the intermediate grayscale voltage generating means 4 sets the distance between the adjacent grayscale voltages selected by the switching means 2 to 2
The voltage is equally divided to generate an intermediate grayscale voltage between the selected adjacent grayscale voltages, and the second switching means 3 further selects the grayscale voltage selected by the first switching means 2. Alternatively, the halftone voltage generated by the halftone voltage generating means 4 is selected and output to each drain signal line (Dn).

That is, in the third embodiment of the present invention, the gray scale voltage of 33 gray scales output from the gray scale voltage generation circuit 1 through the voltage bus 4 and the gray scale voltage generation means 4 generate the gray scale voltage. With the intermediate gradation voltage of 32 gradations, gradation display of 64 gradations is performed.

In this case, one of the 33 gradation voltages (for example, V8) output from the gradation voltage generating circuit 1 via the voltage bus 4 is not used.

Therefore, in the third embodiment of the present invention,
The number of switches in the gradation voltage selection circuit 31 of the drain driver 11 can be reduced from 64 to 36.

Also in the third embodiment of the present invention, when a leak current flows through each drain signal line (Dn), an unnecessary current is generated in the intermediate gradation voltage generating means 4 or the gradation voltage generating circuit 1. The level of the intermediate gradation voltage generated by the intermediate gradation voltage generating means 4 or the gradation voltage of 33 gradations output from the gradation voltage generating circuit 1 via the voltage bus 4 fluctuates. It is necessary to increase the input impedance of the buffer amplifier 32.

[Embodiment 4] FIG. 7 is a diagram showing 64 gradations of a drain driver 11 of a TFT type active matrix type liquid crystal display device which is another embodiment (Embodiment 4) of the present invention. FIG. 3 is a diagram showing a gradation voltage generation circuit 1 and a gradation voltage selection circuit 31.

The liquid crystal display device according to the fourth embodiment of the present invention is
Same as the third embodiment of the present invention, except that the intermediate grayscale voltage generation means 4 in the grayscale voltage selection circuit 31 of the drain driver 11 is configured by a voltage dividing circuit in which two capacitors are connected in series. Is.

In FIG. 7, the gradation voltage generating circuit 1 for 64 gradations and the gradation voltage selecting circuit 31 are shown in the same drawing.
Further, the control circuit 33 and the buffer amplifier 32 shown in FIG. 2 are omitted.

Also in the fourth embodiment of the present invention, the voltage bus 28 is used.
It is possible to reduce the number of gradation voltage lines of 64 to 33, and it is also possible to reduce the number of switches in the gradation voltage selection circuit 31 from 64 to 36.

Also in the fourth embodiment of the present invention, when a leak current flows through each drain signal line (Dn), an unnecessary current is generated in the intermediate gradation voltage generating means 4 or the gradation voltage generating circuit 1. The level of the grayscale voltage generated by the grayscale voltage generation means 4 or the grayscale voltage of 33 grayscales output from the grayscale voltage generation circuit 1 via the voltage bus 4 changes. It is necessary to increase the input impedance of the buffer amplifier 32.

In each of the above embodiments, the present invention is applied to the T
The case where the present invention is applied to the FT type active matrix type liquid crystal display device has been described, but the present invention is not limited to this, and the present invention can be applied to all active matrix type liquid crystal display devices such as a TFT type active matrix type liquid crystal display module. Needless to say.

It is needless to say that the present invention can be applied to a TFT type active matrix type liquid crystal display device in which an electric field in the direction horizontal to the substrate is applied to the liquid crystal (horizontal electric field type).

Although the present invention has been specifically described based on the above embodiments, the present invention is not limited to the above embodiments, and it goes without saying that various modifications can be made without departing from the scope of the invention.

[0110]

The effects obtained by typical ones of the inventions disclosed in the present application will be briefly described as follows.

(1) According to the present invention, in the liquid crystal display device, the k gray scale reference voltages output from the power supply circuit are divided to generate gray scale voltages of M gray scales, and each gray scale voltage is generated for each video signal line. To
A grayscale voltage of N grayscale is generated from an adjacent grayscale voltage of the grayscale voltage of M grayscale generated by the grayscale voltage generation means based on the display data, and one of them is selected. Since it is output to each video signal line, the number of switches provided for each video signal line and the number of gradation voltage lines of the voltage bus can be significantly reduced from the number of display gradations. .

(2) According to the present invention, it is possible to reduce the size of the gradation voltage selection circuit in the liquid crystal display device, and the size of the video signal line drive circuit can be reduced accordingly. As a result, the frame of the liquid crystal display panel can be narrowed, and more gradation display can be performed.

[Brief description of drawings]

FIG. 1 is a gray scale voltage for generating a gray scale voltage of 64 gray scales in a drain driver 11 of a TFT type active matrix liquid crystal display device according to an embodiment (first embodiment of the invention) of the present invention. 3 is a diagram showing a generation circuit 1. FIG.

FIG. 2 is a gradation voltage selection circuit 3 of the drain driver 11 of the TFT active matrix liquid crystal display device according to the embodiment (Embodiment 1) of the present invention.
FIG.

FIG. 3 is a block diagram showing a switching circuit (S00) in the first switching unit 2 and the second switching unit 3 which should be turned on in order to obtain a gray scale voltage of 64 gray scales in the first embodiment of the present invention. -S64, Sa-Se).

FIG. 4 is a diagram showing an embodiment in which the present invention is implemented by applying a specific resistance value to the gradation voltage generating circuit circuit 1 shown in FIG.

FIG. 5 is a gray scale voltage generation circuit 1 of 64 gray scales and a floor of a drain driver 11 of a TFT type active matrix liquid crystal display device which is another embodiment of the present invention (Embodiment 2 of the invention). 6 is a diagram showing a voltage adjustment selection circuit 31. FIG.

FIG. 6 is a gray scale voltage generation circuit 1 of 64 gray scales and a floor of a drain driver 11 of a TFT type active matrix liquid crystal display device according to another embodiment (third embodiment of the invention) of the present invention. 6 is a diagram showing a voltage adjustment selection circuit 31. FIG.

FIG. 7 is a gray scale voltage generation circuit 1 of 64 gray scales and a floor of a drain driver 11 of a TFT type active matrix liquid crystal display device which is another embodiment of the present invention (Embodiment 4 of the invention). 6 is a diagram showing a voltage adjustment selection circuit 31. FIG.

FIG. 8 is a block diagram showing a schematic configuration of a conventional TFT active matrix liquid crystal display device capable of multicolor display.

9 is a liquid crystal display panel (TFT-LCD) shown in FIG.
It is a figure which shows the equivalent circuit of 1 pixel (Pix) of.

10 is a timing chart showing a voltage applied to the pixel (Pix) shown in FIG.

11 is a block diagram showing a schematic configuration of a drain driver 11 shown in FIG.

12 is a block diagram showing a schematic configuration of an output circuit 27 shown in FIG.

13 is a diagram showing an example of a gradation voltage selection circuit 31 provided for each one drain signal line (Dn) shown in FIG.

14 is a diagram showing an example of a gradation reference voltage generation circuit 14 in the internal power supply circuit 13 shown in FIG.

15 is a diagram showing an example of a grayscale voltage generation circuit 21 of the drain driver 11 shown in FIG.

16 is a diagram illustrating the gray scale reference voltage shown in FIG. 14 and the liquid crystal layer (CL
It is a figure which shows the relationship with the transmittance | permeability of C).

[Explanation of symbols]

ITO ... Pixel electrode, COM ... Counter electrode (common electrode),
CLC ... liquid crystal layer, Dn ... drain line (or video signal line), Gn ... gate line (or scanning signal line), TFT
... thin film transistor, Cadd ... storage capacitor, Cn ... capacitance line, TFT-LCD ... TFT liquid crystal display panel, S00-
S64, Sa-se ... switch circuit, V0-V8 ... gradation reference voltage, 1, 21 ... gradation voltage generating circuit, 2 ... first switching means, 3 ... second switching means, 4 ... intermediate gradation voltage Generating means, 6 ... Voltage dividing resistor group, 10 ... Display control device, 11 ... Drain driver, 12 ... Gate driver, 13 ... Internal power supply circuit, 14 ... Gray scale reference voltage generating circuit, 22, 33 ... Control circuit, 23 ... Shift register, 2
4 ... Input register, 25 ... Storage register, 26 ...
Level shifter, 27 ... Output circuit, 28 ... Voltage bus, 31
... gradation voltage selection circuit, 32 ... bucha amplifier.

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Yukihide Ote 3681 Hayano, Mobara-shi, Chiba Hitachi Device Engineering Co., Ltd.

Claims (4)

[Claims] 1. A plurality of video signal lines, a plurality of scanning signal lines orthogonal to the plurality of video signal lines, and a matrix in a crossing region of the plurality of video signal lines and the plurality of scanning signal lines. A liquid crystal panel comprising a plurality of pixels arranged, wherein a grayscale voltage is applied to the pixels in the column direction by the video signal lines, and a scanning signal voltage is applied to the pixels in the row direction by the scanning signal lines. , A power supply circuit that outputs k gray scale reference voltages, a video signal line drive circuit that outputs a gray scale voltage to each of the video signal lines, and a scan signal line drive that outputs a scan signal voltage to each of the scan signal lines. A liquid crystal display device including a circuit, wherein the video signal line driving circuit divides k gradation reference voltages output from the power supply circuit to generate M gradation voltages. Means and a table provided for each of the video signal lines. A grayscale voltage of N grayscales is generated from adjacent grayscale voltages of the grayscale voltages of M grayscales generated by the grayscale voltage generation means based on the indicating data, and one of them is selected. And an output means for outputting to each of the video signal lines. 2. The output means includes first switching means for selecting adjacent grayscale voltages of the grayscale voltages of M grayscales generated by the grayscale voltage generation means, and the first switching means. An intermediate grayscale voltage generation unit that divides the selected adjacent grayscale voltages into N equal parts to generate an intermediate grayscale voltage of (N-1) grayscale, and M generated by the grayscale voltage generation unit. A second gray scale voltage of the gray scale or one of the gray scale voltages of the (N-1) gray scales generated by the gray scale voltage generating means is selected and output to the video signal line. And a control circuit for controlling the first switching means and the second switching means on the basis of display data.
2. A liquid crystal display device according to claim 1. 3. The liquid crystal display device according to claim 2, wherein the intermediate gradation voltage generating means is a voltage dividing circuit in which resistors are connected in series. 4. The liquid crystal display device according to claim 2, wherein the intermediate gradation voltage generating means is a voltage dividing circuit in which capacitors are connected in series.