JPH09197444A - Liquid crystal display device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To form a large capacitor without deforming the waveform of a scanning line and to suppress the dispersion of pixels in a picture. SOLUTION: In an active matrix panel formed by driving a pixel electrode 86 by a scanning line 84 and a data line 87 formed on a substrate 81 and a thin film transistor(TFT) connected to both the lines 84, 87 and driving liquid crystal by an electric field generated between the electrode 86 and a counter electrode, the same conductive film as that of a TFT channel part is arranged on the upper part or lower part of the scanning line 84 through a gate insulating film 83 and the conductive film is connected to the electrode 86 through a contact hole.

Description

Detailed Description of the Invention

[0001]

The present invention relates to a structure of an active matrix panel.

[0002]

2. Description of the Related Art The structure of a conventional active matrix panel is described in "Nikkei Electronics, September 10, 1984, N
o351P221 to 240 ". FIG. 2 is an example of a plan view of a pixel portion of the active matrix panel. Numeral 22 is a thin film of polysilicon or amorphous silicon, which is a TFT channel part and a source film.
A drain electrode is formed.

Reference numeral 24 denotes a thin film made of polysilicon or metal, which forms a gate electrode of a TFT and a scanning line. 26 is a pixel electrode, and 27 is a data line.

[0004]

However, the above-mentioned prior art has the following problems. First of all,
Since the voltage applied to the liquid crystal depends on the time constant of the liquid crystal itself, when the temperature changes, the time constant of the liquid crystal changes and the display state also changes. Particularly at high temperatures, the contrast ratio decreases because the resistance of the liquid crystal decreases and the time constant decreases. The second problem is that the liquid crystal needs to be driven by an alternating current, so that a video signal is usually used by inverting the video signal. Voltage has an asymmetrical component, causing flicker.

The present invention has been made to solve these problems, and an object of the present invention is to provide a structure of an active matrix panel which does not decrease the contrast ratio even at a high temperature and has little flicker.

[0006]

In the active matrix panel of the present invention, a TF is provided above or below the scanning line in the preceding stage.
The same conductive film as that of the channel portion of T is arranged via a gate insulating film, and the conductive film is connected to the pixel electrode.

[0007]

According to the above structure of the present invention, the capacitance of the gate insulating film is added in parallel with the capacitance of the liquid crystal, and the time constant of the liquid crystal is increased, so that the contrast ratio is increased. Further, even when the temperature rises and the time constant of the liquid crystal decreases, the capacitance of the gate insulating film does not change, so that a decrease in the contrast ratio can be suppressed. Further, it is less susceptible to an asymmetric operation in writing and holding of a TFT caused by a difference in polarity of a video signal, thereby reducing flicker.

[0008]

BEST MODE FOR CARRYING OUT THE INVENTION

Embodiment 1 FIG. 1A is a plan view of an active matrix panel showing one embodiment of the present invention, and FIGS. 1B and 1C are AB and C of FIG. 1A, respectively. It is sectional drawing in -D. The manufacturing process will be described with reference to FIG. First, a thin film 2 of polysilicon or amorphous silicon is deposited on an insulating substrate 1 and patterned as shown. The thin film serves as a channel portion of the TFT, a source / drain electrode, and an electrode for forming a capacitor. Next, a gate insulating film 3 is formed, and a scanning line 4 also serving as a gate electrode is formed thereon. As a material for the polysilicon TFT, polysilicon or a high melting point metal is used.
In the case of an amorphous silicon TFT, a normal metal, a transparent conductive film, or the like is used. On this, an interlayer insulating film 5 is deposited, a contact hole is opened, and a pixel electrode 6 is formed.
The substrate on which the data lines 7 are formed is an active matrix substrate. Another substrate having a common electrode is opposed to this substrate via a space of several μm and a liquid crystal is sealed in this space to form an active matrix panel.

FIG. 3 shows the gate voltage dependence of an N-type MOS capacitor. When the gate voltage VG exceeds the threshold voltage Vth, the capacitance increases to C0, and when the gate voltage VG is equal to or lower than the threshold voltage, the overlapping capacitance becomes Cgso. Therefore V
It is desirable to use a MOS capacitor in the region of G> Vth, but in this embodiment, the MOS capacitor formed below the scanning line 4 in the previous stage of FIG. 1C has the same conductivity type as that of the TFT, for example N. In the case of the mold, since VG <Vth in a normal state in which the TFT is off, the capacitance is only Cgso. However, since the thickness of the gate film is sufficiently small with respect to the space in which the liquid crystal is sealed, the capacitance per unit area is large, and even if only the pattern overlap capacitance Cgso as shown in FIG. 6 is about 30 to 50% of the capacity of the liquid crystal driven. This MOS
Since the capacity is added in parallel with the capacity of the liquid crystal, the time constant of the liquid crystal apparently increases, and the display performance is greatly improved. This will be described with reference to FIG. This figure shows the potential of each part of the active matrix panel, with the horizontal axis representing time and the vertical axis representing potential. As is well known, an NTSC video signal constitutes one frame by two interlaced fields, that is, an odd field and an even field, and one screen is completed. Since the liquid crystal must be driven by an alternating current, the signal of the data line is obtained by inverting the alternating current as indicated at 42. Reference numeral 41 denotes a signal of a scanning line, and such a pulse is necessary when driving with an N-channel TFT. Reference numerals 44 and 45 denote the potentials of the pixel electrodes in the conventional example and the embodiment of the present invention, respectively.
Is the potential of the common electrode. Either the potential difference between the common electrode and the pixel electrode or the voltage applied to the liquid crystal. Assuming that the time from time t0 to time t3 is an odd field and the time from t3 to t6 is an even field, the TFT is turned on at the time t1 in the odd field, the signal of the data line is written to the pixel electrode, and the TFT is turned off at the time t2. Then, the pixel electrode potential is discharged toward the common electrode potential at a certain time constant. Similarly, in the even-numbered field, the TFT is turned on at time t4, the signal of the data line is written to the pixel electrode, and when the TFT is turned off at time t5, the pixel electrode potential is discharged toward the common electrode potential. The shaded portion is the voltage applied to the liquid crystal in this embodiment, and it can be seen that a larger voltage can be applied because the time constant is longer than in the conventional example. This increases the contrast ratio.
Further, since the wiring portion between the MOS capacitor and the drain electrode of the TFT is arranged between the data line and the pixel electrode as shown in FIG. 1A, the wiring portion also has a function of blocking light leaking from the gap. , While increasing the contrast ratio,
The sharpness of the image is improved. Further, even if the time constant of the liquid crystal slightly changes with a change in temperature, the area of the hatched portion in FIG. 3 does not change much because the added MOS capacitance does not change.
That is, a display screen with good reproducibility over a wide temperature range can be obtained. In addition, flicker is 3
A decrease of ５5 dB has been confirmed in applicant's experiments. This is because the TFT is less likely to be affected by an asymmetric operation in writing and holding in the odd field and the even field.

[Embodiment 2] FIG. 5A is a plan view of an active matrix panel according to Embodiment 2 of the present invention, and FIGS. 5B and 5C are views A-B in FIG. 5A, respectively. 3 is a sectional view taken along line C-D. This active matrix panel can be manufactured using exactly the same steps as in the first embodiment. 61 to 67 are respectively 1 to 1 in FIG.
7, reference numeral 61 denotes an insulating substrate, 62 denotes a thin film of polysilicon or amorphous silicon, 63 denotes a gate insulating film, 64 denotes a scanning line, 65 denotes an interlayer insulating film, 66 denotes a pixel electrode, and 67 denotes a data line. . In the case of the transmission type, a transparent conductive film is used for the pixel electrode 66, and the same transparent conductive film or metal thin film as the pixel electrode is used for the data line 67.

In this embodiment, as in the first embodiment, an MO of the same conductivity type as the TFT is provided under the scanning line 64 in the previous stage.
Since the S capacitance is incorporated, only the overlap capacitance is effective in the normal state where the TFT is OFF. But,
In this embodiment, the scanning line 64 has a shape protruding in parallel with the data line as shown in FIG. 5A, and a MOS capacitor can be built in this portion. Approximately twice the capacity can be added. Therefore, it is possible to obtain a high quality display screen having a larger contrast ratio and less flicker in a wider temperature range. Moreover, by forming a MOS capacitor so as to cover the gap between the pixel electrode and the data line as shown in FIG.
Light leaking from the gap can be blocked, which contributes to an increase in the contrast ratio.

[Embodiment 3] FIG. 6A is a plan view of an active matrix panel according to a third embodiment of the present invention, and FIGS. 6B and 6C respectively show A in FIG.
FIG. 7 is a cross-sectional view taken along line B-C. This reference example is the first
Unlike the reference example and the embodiment of the present invention, a conductive type MOS capacitor different from that of the TFT is formed. For example, it is effective for an active matrix panel having a built-in CMOS type driver.

The structure of the active matrix panel of this embodiment will be described with reference to FIG. First, polysilicon or amorphous silicon thin films 82 and 8 are formed on an insulating substrate 81.
8 is deposited and patterned as shown. 82 is a channel portion and a source / drain electrode of the TFT;
Reference numeral 8 is an electrode for forming a MOS capacitor. Next, a gate insulating film 83 is formed, and a scanning line 84 also serving as a gate electrode is formed thereon. Thereafter, ions are selectively implanted, 82 is an N-channel TFT, and 88 is a P-channel MOS capacitor. Subsequent steps are the same as those in the first embodiment. Reference numeral 85 denotes an interlayer insulating film, 86 denotes a pixel electrode, and 87 denotes a data line. In this embodiment, the conductivity types of the TFT and the MOS capacitor are different. The gate voltage dependence of the P-channel MOS capacitor is symmetric with that of the N-channel of FIG.
C0 when G <Vth and Cgso when VG> Vth.
Therefore, in a normal state where the TFT is turned off, VG <Vt
Since it is h, the area where the electrode 88 and the scanning line 84 overlap with each other functions as an electrode for the capacitance, and the original MOB capacitance C0 is added. The capacity is about 100 to 20% of the capacity of the liquid crystal driven by the pixel electrode 86, which is much larger than those in the first and second embodiments. Therefore, the effect is increased. Further, during the period in which the preceding scanning line is selected, the MOS capacitance is turned off and only the overlapping capacitance Cgso is provided. The waveform of the scanning line is not blunted, and the driving state does not change due to the addition of the capacitance. .

[0014]

As described above, in the active matrix panel according to the present invention, the capacitance can be built in the pixel without increasing the number of steps. By adding the capacity, the contrast ratio is increased, flicker is reduced, and a screen with good reproducibility can be obtained in a wide temperature range. In addition, it also has the effect of suppressing crosstalk due to capacitive coupling between the data line and the pixel electrode, and variation in picture elements within the screen.
Image quality improves overall.

[Brief description of drawings]

FIG. 1A is a plan view showing the structure of an active matrix panel according to a first embodiment, and FIGS. 1B and 1C are sectional views thereof.

FIG. 2 is a plan view showing the structure of a conventional active matrix panel.

FIG. 3 is a diagram showing the gate voltage dependence of the MOS capacitance of an N-channel.

FIG. 4 is a diagram showing potentials at various parts of an active matrix panel.

FIG. 5A is a plan view showing the structure of an active matrix panel according to a second embodiment of the present invention, and FIGS. 5B and 5C are sectional views thereof.

FIG. 6A is a plan view showing the structure of an active matrix panel according to a third embodiment, and FIGS. 6B and 6C are cross-sectional views thereof.

[Explanation of symbols]

2, 62, 82: polysilicon or amorphous silicon thin film 3, 63, 83: gate insulating film 4, 64, 84: scanning line

[Procedure amendment]

[Submission date] March 25, 1997

[Procedure amendment 1]

[Document name to be amended] Statement

[Correction target item name] Name of invention

[Correction method] Change

[Correction contents]

Title of the invention Liquid crystal device

[Procedure amendment 2]

[Document name to be amended] Statement

[Correction target item name] Claims

[Correction method] Change

[Correction contents]

[Claims]

[Procedure 3]

[Document name to be amended] Statement

[Correction target item name] 0001

[Correction method] Change

[Correction contents]

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal device using an active matrix panel.

[Procedure amendment 4]

[Document name to be amended] Statement

[Correction target item name] 0006

[Correction method] Change

[Correction contents]

[0006]

According to the present invention, a liquid crystal is sealed between a pair of substrates, and a plurality of gate lines and a plurality of gate lines intersect with each other on one substrate of the pair of substrates. A plurality of data lines, thin film transistors connected to the gate lines and the data lines, pixel electrodes connected to the thin film transistors, and the data signal supplied to the data lines are supplied via the thin film transistors. In a liquid crystal device having a capacitor, a source / drain region of the thin film transistor and one electrode of the capacitor are made of the same silicon layer, and the one electrode is adjacent to a gate line connected to the thin film transistor. Of the gate electrode and the pixel electrode via the contact hole formed in the insulating film, and the one electrode is connected to the pixel electrode through the contact hole formed in the insulating film. The features.

[Procedure Amendment 5]

[Document name to be amended] Statement

[Correction target item name] 0008

[Correction method] Change

[Correction contents]

[0008]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Reference Example 1 FIG. 1 (a) is a plan view of an active matrix panel showing a reference example of the present invention, and FIGS. 1 (b) and 1 (c) respectively show FIG. FIG. 7B is a sectional view taken along line AB in FIG. The manufacturing process will be described with reference to FIG. First, a thin film 2 of polysilicon or amorphous silicon is deposited on an insulating substrate 1 and patterned as shown. The thin film serves as a channel portion of the TFT, a source / drain electrode, and an electrode for forming a capacitor. Next, a gate insulating film 3 is formed, and a scanning line 4 also serving as a gate electrode is formed thereon.
As the material, polysilicon or a refractory metal is used in the case of a polysilicon TFT, and ordinary metal or a transparent conductive film is used in the case of an amorphous silicon TFT.
An active matrix substrate on which an interlayer insulating film 5 is deposited, contact holes are opened, and pixel electrodes 6 and data lines 7 are formed. This substrate and several μm
An active matrix panel is one in which another substrate having a common electrode is opposed to the other space and a liquid crystal is sealed in this space.

[Procedure correction 6]

[Document name to be amended] Statement

[Correction target item name] 0009

[Correction method] Change

[Correction contents]

FIG. 3 shows the gate voltage dependence of an N-type MOS capacitor. When the gate voltage VG exceeds the threshold voltage Vth, the capacitance increases to C0, and when the gate voltage VG is equal to or lower than the threshold voltage, the overlapping capacitance becomes Cgso. Therefore V
Although it is desirable to use a MOS capacitor in the region of G> Vth, in this reference example, the MOS capacitor formed under the scanning line 4 in the previous stage of FIG. In the case of the type, since VG <Vth in a normal state where the TFT is OFF, the capacitance is only Cgso. However, since the thickness of the gate film is sufficiently small with respect to the space in which the liquid crystal is sealed, the capacitance per unit area is large, and even if only the pattern overlap capacitance Cgso as shown in FIG. 6 is about 30 to 50% of the capacity of the liquid crystal driven. This MOS
Since the capacity is added in parallel with the capacity of the liquid crystal, the time constant of the liquid crystal apparently increases, and the display performance is greatly improved. This will be described with reference to FIG. This figure shows the potential of each part of the active matrix panel, with the horizontal axis representing time and the vertical axis representing potential. As is well known, an NTSC video signal constitutes one frame by two interlaced fields, that is, an odd field and an even field, and one screen is completed. Since the liquid crystal must be driven by an alternating current, the signal of the data line is obtained by inverting the alternating current as indicated at 42. Reference numeral 41 denotes a signal of a scanning line, and such a pulse is necessary when driving with an N-channel TFT. Reference numerals 44 and 45 denote the potentials of the pixel electrodes in the conventional example and the embodiment of the present invention, respectively.
Is the potential of the common electrode. Either the potential difference between the common electrode and the pixel electrode or the voltage applied to the liquid crystal. Assuming that the time from time t0 to time t3 is an odd field and the time from t3 to t6 is an even field, the TFT is turned on at the time t1 in the odd field, the signal of the data line is written to the pixel electrode, and the TFT is turned off at the time t2. Then, the pixel electrode potential is discharged toward the common electrode potential at a certain time constant. Similarly, in the even-numbered field, the TFT is turned on at time t4, the signal of the data line is written to the pixel electrode, and when the TFT is turned off at time t5, the pixel electrode potential is discharged toward the common electrode potential. The shaded portion is the voltage applied to the liquid crystal in this embodiment, and it can be seen that a larger voltage can be applied because the time constant is longer than in the conventional example. This increases the contrast ratio.
Further, since the wiring portion between the MOS capacitor and the drain electrode of the TFT is arranged between the data line and the pixel electrode as shown in FIG. 1A, the wiring portion also has a function of blocking light leaking from the gap. , While increasing the contrast ratio,
The sharpness of the image is improved. Further, even if the time constant of the liquid crystal slightly changes with a change in temperature, the area of the hatched portion in FIG. 3 does not change much because the added MOS capacitance does not change.
That is, a display screen with good reproducibility over a wide temperature range can be obtained. In addition, flicker is 3
A decrease of ５5 dB has been confirmed in applicant's experiments. This is because the TFT is less likely to be affected by an asymmetric operation in writing and holding in the odd field and the even field.

[Procedure amendment 7]

[Document name to be amended] Statement

[Correction target item name] 0010

[Correction method] Change

[Correction contents]

Reference Example 2 FIG. 5 (a) is a plan view of an active matrix panel in Reference Example 2 of the present invention, and FIGS. 5 (b) and 5 (c) are AB of FIG. 5 (a). 3 is a sectional view taken along line C-D. This active matrix panel can be manufactured using exactly the same steps as in the first reference example. 61 to 67 are respectively 1 to 1 in FIG.
7, reference numeral 61 denotes an insulating substrate, 62 denotes a thin film of polysilicon or amorphous silicon, 63 denotes a gate insulating film, 64 denotes a scanning line, 65 denotes an interlayer insulating film, 66 denotes a pixel electrode, and 67 denotes a data line. . In the case of the transmission type, a transparent conductive film is used for the pixel electrode 66, and the same transparent conductive film or metal thin film as the pixel electrode is used for the data line 67.

[Procedure amendment 8]

[Document name to be amended] Statement

[Correction target item name] 0011

[Correction method] Change

[Correction contents]

In this embodiment, similarly to the first embodiment, an MO of the same conductivity type as that of the TFT is provided below the scanning line 64 in the preceding stage.
Since the S capacitance is incorporated, only the overlap capacitance is effective in the normal state where the TFT is OFF. But,
In this reference example, the scanning line 64 has a shape protruding in parallel with the data line as shown in FIG. 5A, and a MOS capacitor can be formed in this portion as well, so that the first reference example About twice the capacity can be added. Therefore, it is possible to obtain a high quality display screen having a larger contrast ratio and less flicker in a wider temperature range. Moreover, by forming a MOS capacitor so as to cover the gap between the pixel electrode and the data line as shown in FIG. 5A, light leaked from this gap can be blocked, which contributes to an increase in the contrast ratio. .

[Procedure amendment 9]

[Document name to be amended] Statement

[Correction target item name] 0012

[Correction method] Change

[Correction contents]

[Embodiment] FIG. 6A is a plan view of an active matrix panel in an embodiment of the present invention, and FIGS. 6B and 6C are views A-B and C in FIG. It is a sectional view in -D. This embodiment is different from the first and second reference examples in that it has a conductivity type MO different from that of the TFT.
Make S capacity. For example, it is effective for an active matrix panel having a built-in CMOS type driver.

[Procedure amendment 10]

[Document name to be amended] Statement

[Correction target item name] 0013

[Correction method] Change

[Correction contents]

The structure of the active matrix panel of this embodiment will be described with reference to FIG. First, polysilicon or amorphous silicon thin films 82 and 8 are formed on an insulating substrate 81.
8 is deposited and patterned as shown. 82 is a channel portion and a source / drain electrode of the TFT;
Reference numeral 8 is an electrode for forming a MOS capacitor. Next, a gate insulating film 83 is formed, and a scanning line 84 also serving as a gate electrode is formed thereon. Thereafter, ions are selectively implanted, 82 is an N-channel TFT, and 88 is a P-channel MOS capacitor. Subsequent steps are the same as those in the first embodiment. Reference numeral 85 denotes an interlayer insulating film, 86 denotes a pixel electrode, and 87 denotes a data line. In this embodiment, the conductivity types of the TFT and the MOS capacitor are different. The gate voltage dependence of the P-channel MOS capacitor is symmetric with that of the N-channel of FIG.
C0 when G <Vth and Cgso when VG> Vth.
Therefore, in a normal state where the TFT is turned off, VG <Vt
Since it is h, the area where the electrode 88 and the scanning line 84 overlap each other functions as a capacitor electrode, and the original MOS capacitor C0 is added. The size of this capacitance is about 100% to 20% of the capacitance of the liquid crystal driven by the pixel electrode 86, and is much larger than those of the first and second reference examples. Therefore, the effect is increased. Further, during the period in which the preceding scanning line is selected, the MOS capacitance is turned off and only the overlapping capacitance Cgso is provided. The waveform of the scanning line is not blunted, and the driving state does not change due to the addition of the capacitance. .

[Procedure amendment 11]

[Document name to be amended] Statement

[Correction target item name] Brief description of drawings

[Correction method] Change

[Correction contents]

[Brief description of drawings]

1A is a plan view showing a structure of an active matrix panel of a first reference example, and FIGS. 1B and 1C are cross-sectional views thereof.

FIG. 2 is a plan view showing the structure of a conventional active matrix panel.

FIG. 3 is a diagram showing the gate voltage dependence of the MOS capacitance of an N-channel.

FIG. 4 is a diagram showing potentials at various parts of an active matrix panel.

5A is a plan view showing the structure of an active matrix panel according to a second embodiment of the present invention, and FIGS. 5B and 5C are cross-sectional views thereof.

FIG. 6A is a plan view showing the structure of an active matrix panel according to an embodiment of the present invention, and FIGS. 6B and 6C are cross-sectional views thereof.

[Explanation of symbols] 2,62,82 ... Polysilicon or amorphous silicon thin film 3,63,83 ... Gate insulating film 4,64, 84 ... Scan line

Claims (4)

[Claims] 1. A pixel electrode is driven by a scanning line group, a data line group, and a thin film transistor (hereinafter abbreviated as TFT) array provided at an intersection of the scanning line and the data line, which is provided on an insulating substrate. In an active matrix panel in which liquid crystal is driven by an electric field between the pixel electrode and a counter electrode, the same conductive film as that of a channel section of a TFT is provided above or below a scanning line in the preceding stage of the pixel electrode via a gate insulating film. An active matrix panel, wherein the conductive film is connected to the pixel electrode. 2. The active matrix panel according to claim 1, wherein the conductive type of the conductive film is the same as that of the TFT. 3. The arrangement according to claim 2, wherein a part of a gap between the data line and the pixel electrode is covered with the conductive film or a part of the scanning line.
An active matrix panel according to the item. 4. The active matrix panel according to claim 1, wherein the conductive type of the conductive film is different from that of the TFT.