JP2626650C - - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for constructing an active matrix panel. 2. Description of the Related Art The structure of a conventional active matrix panel is described in "Nikkei Electronics 1984".
No. 351P221 to 240, September 10, 2008 ". FIG. 2 is an example of a plan view of a pixel portion of an active matrix panel. Reference numeral 22 denotes a thin film of polysilicon or amorphous silicon, which forms a channel portion of the TFT and source / drain electrodes. Reference numeral 24 denotes a thin film made of polysilicon or metal, which forms a gate electrode and a scanning line of the TFT. 26 is a pixel electrode, and 27 is a data line. [0005] However, the above-mentioned prior art has the following problems. First of all,
Since the voltage applied to the liquid crystal depends on the time constant of the liquid crystal itself, when the temperature changes, the time constant of the liquid crystal changes and the display state also changes. Particularly at high temperatures, the contrast ratio decreases because the resistance of the liquid crystal decreases and the time constant decreases. A second problem is that a liquid crystal needs to be driven by an alternating current, so that a video signal is usually inverted with an alternating current. However, the writing and holding state of the TFT is also different depending on the polarity of the signal. Has an asymmetric component and generates flicker. An object of the present invention is to solve these problems, and an object of the present invention is to provide a structure of an active matrix panel in which a contrast ratio does not decrease even at a high temperature and there is little flicker. According to the present invention, a data line includes a pixel electrode arranged in a matrix on a substrate, a thin film transistor connected to the pixel electrode, and a storage capacitor. A method of manufacturing an active matrix panel for supplying a data signal supplied to the pixel electrode and the storage capacitor via the thin film transistor to the source / drain region and the source / drain region of the thin film transistor formed of a silicon thin film on the substrate Forming the first electrode of the storage capacitor made of the silicon thin film connected to the silicon thin film to be the region with the same material, and forming the gate insulating film of the thin film transistor and the dielectric film of the storage capacitor with the same material Forming a gate electrode of the thin film transistor and a second electrode of the storage capacitor with the same material; Forming an interlayer insulating film on the gate electrode and the second electrode; forming a contact hole on the source / drain region to form the data line electrically connected to the source region; Forming the pixel electrode having an overlap with the second electrode with the interlayer insulating film interposed therebetween and being electrically connected to the drain region. In addition, the present invention includes a pixel electrode which is arranged in a matrix on a substrate, a thin film transistor connected to the pixel electrode, and a storage capacitor, and transmits a data signal supplied to a data line to the thin film transistor. In a method of manufacturing an active matrix panel for supplying the pixel electrode and the storage capacitor via the same, a source / drain region of the thin film transistor formed of a silicon thin film and a first electrode of the storage capacitor are formed of the same material on the substrate. Forming a gate insulating film of the thin film transistor and a dielectric film of the storage capacitor with the same material; forming a gate electrode of the thin film transistor and a second electrode of the storage capacitor formed of a scanning line with the same material; Forming an interlayer insulating film on the gate electrode and the second electrode; and forming the interlayer insulating film on the source / drain region and the first electrode. A contact hole is formed thereon to form the data line electrically connected to the source region. The data line has an overlap with the second electrode with the interlayer insulating film interposed therebetween. Forming said pixel electrode electrically connected to one electrode. According to the structure of the present invention, the capacitance of the gate insulating film is added in parallel with the capacitance of the liquid crystal, and the time constant of the liquid crystal is increased, so that the contrast ratio is increased. Further, even when the temperature rises and the time constant of the liquid crystal decreases, the capacitance of the gate insulating film does not change, so that a decrease in the contrast ratio can be suppressed. Further, it is less susceptible to an asymmetric operation in writing and holding of a TFT caused by a difference in polarity of a video signal, thereby reducing flicker. [Embodiment 1] FIG. 1A is a plan view of an active matrix panel showing an embodiment of the present invention, and FIGS. 1B and 1C are the same. It is sectional drawing in AB and CD of figure (a). The manufacturing process will be described with reference to FIG. First, a thin film 2 of polysilicon or amorphous silicon is deposited on an insulating substrate 1 and patterned as shown. This thin film becomes a channel portion of the TFT, a source / drain electrode, and an electrode for forming a capacitor. Next, a gate insulating film 3 is formed, and a scanning line 4 also serving as a gate electrode is formed thereon. As a material thereof, polysilicon or a high melting point metal is used in the case of a polysilicon TFT, and a normal metal or a transparent conductive film is used in the case of an amorphous silicon TFT. An active matrix substrate is formed by depositing an interlayer insulating film 5 thereon, opening a contact hole, and forming a pixel electrode 6 and a data line 7. Another substrate having a common electrode is opposed to this substrate via a space of several μm and a liquid crystal is sealed in this space to form an active matrix panel. FIG. 3 shows the gate voltage dependence of an N-type MOS capacitor. When the gate voltage VG exceeds the threshold voltage Vth, the capacitance increases and becomes CO, and when the gate voltage VG is lower than the threshold voltage, the capacitance overlaps with Cgso. Therefore, it is desirable to use a MOS capacitor in the region of VG> Vth. In this embodiment, the MOS capacitor formed under the scanning line 4 in the previous stage of FIG. 1C has the same conductivity type as the TFT. In the case of the N-type, since VG <Vth in a normal state where the TFT is OFF, the capacitance is only Cgso. However, since the thickness of the gate film is sufficiently small with respect to the space in which the liquid crystal is sealed, the capacitance per unit area is increased, and even if only the pattern overlap capacitance Cgso as shown in FIG. Of the capacity of the liquid crystal driven by
The capacity is about 0 to 50%. Since this MOS capacitance is added in parallel with the capacitance of the liquid crystal, the time constant of the liquid crystal apparently increases, and the display performance is greatly improved. This is shown in FIG.
This will be described with reference to FIG. This figure shows the potential of each part of the active matrix panel. The horizontal axis represents time and the vertical axis represents potential. As is well known, an NTSC video signal forms one frame by two interlaced fields, that is, an odd field and an even field, and one screen is completed. Since the liquid crystal must be driven by an alternating current, the signal of the data line is obtained by inverting the alternating current as indicated at 42. Reference numeral 41 denotes a signal of a scanning line, and such a pulse is necessary when driving with an N-channel TFT. Reference numerals 44 and 45 denote the potentials of the pixel electrodes in the conventional example and the embodiment of the present invention, respectively, and reference numeral 43 denotes the potential of the common electrode. The potential difference between the common electrode and the pixel electrode is a voltage applied to the liquid crystal. Assuming that the time from time t0 to time t3 is an odd field and the time from t3 to t6 is an even field,
First, in the odd-numbered field, the TFT is turned on at time t1, a signal of the data line is written to the pixel electrode, and at time t2, when the TFT is turned off, the pixel electrode potential is discharged toward the common electrode potential at a certain time constant. Similarly, in the even-numbered field, the TFT is turned on at time t4, a signal of the data line is written to the pixel electrode, and when the TFT is turned off at time t5, the pixel electrode potential is discharged toward the common electrode potential. The shaded portion is the voltage applied to the liquid crystal in this embodiment, and it can be seen that a larger voltage can be applied because the time constant is longer than in the conventional example. Therefore, the contrast ratio increases. Also, MO
By arranging the wiring portion between the S capacitance and the drain electrode of the TFT between the data line and the pixel electrode as shown in FIG. 1A, the wiring portion also has a function of blocking light leaking from the gap, so that contrast is reduced. As the ratio increases, the sharpness of the image improves. Further, even if the time constant of the liquid crystal slightly changes with a change in temperature, the area of the hatched portion in FIG. 3 does not change much because the added MOS capacitance does not change. That is, a display screen with good reproducibility over a wide temperature range can be obtained. In addition, it has been confirmed by the applicant's experiment that flicker is reduced by 3 to 5 dB as compared with the conventional example. This is because the TFT is less susceptible to an asymmetric operation in writing and holding TFTs in odd and even fields. Second Embodiment FIG. 5A is a plan view of an active matrix panel according to a second embodiment of the present invention, and FIGS. 5B and 5C are respectively AB in FIG. And a cross-sectional view along CD. This active matrix panel can be manufactured using exactly the same steps as in the first embodiment. 61 to 67 respectively correspond to 1 to 7 in FIG. 1, 61 is an insulating substrate, 62 is a thin film of polysilicon or amorphous silicon, 63 is a gate insulating film, 64 is a scanning line, 65 is an interlayer insulating film, 66 Is the pixel electrode,
67 is a data line. In the case of the transmission type, a transparent conductive film is used for the pixel electrode 66, and the same transparent conductive film or metal thin film as the pixel electrode is used for the data line 67. In the present embodiment, as in the first embodiment, a MOS capacitor of the same conductivity type as that of the TFT is formed below the scanning line 64 in the preceding stage, so that in the normal state where the TFT is OFF, the overlap is caused. Only capacity is valid. However, in this embodiment, the scanning line 6
4 has a shape protruding parallel to the data line as shown in FIG. 5A, and a MOS capacitance can be built in this portion, so that a capacitance approximately twice that of the first embodiment is added. can do. Therefore, it is possible to obtain a high quality display screen having a larger contrast ratio and less flicker in a wider temperature range. Moreover, FIG.
By forming a MOS capacitor so as to cover the gap between the pixel electrode and the data line as shown in a), light leaking from this gap can be blocked, which contributes to an increase in the contrast ratio. Embodiment 3 FIG. 6A is a plan view of an active matrix panel according to a third embodiment of the present invention, and FIGS. 6B and 6C respectively show A in FIG. It is sectional drawing in -B and CD. This embodiment is different from the first and second embodiments in that TF
A MOS capacitor of a conductivity type different from T is formed. For example, it is effective for an active matrix panel having a built-in CMOS type driver. The structure of the active matrix panel of this embodiment will be described with reference to FIG. First, polysilicon or amorphous silicon thin films 82 and 88 are deposited on an insulating substrate 81 and patterned as shown. Reference numeral 82 denotes a TFT channel portion and a source / drain electrode, and reference numeral 88 denotes an electrode for forming a MOS capacitor. Next, a gate insulating film 83 is formed, and a scanning line 84 also serving as a gate electrode is formed thereon. Thereafter, selective ion implantation is performed, 82 is an N-channel TFT, and 88 is p-type.
The MOS capacitor of the channel is used. Subsequent steps are the same as those in the first embodiment. Reference numeral 85 denotes an interlayer insulating film, 86 denotes a pixel electrode, and 87 denotes a data line. In this embodiment, the conductivity types of the TFT and the MOS capacitor are different. The gate voltage dependence of the P-channel MOS capacitor is symmetric with that of the N-channel of FIG.
<Vth: CO, VG> Vth: Cgso. Therefore, in a normal state where the TFT is turned off, since VG <Vth, the area where the electrode 88 and the scanning line 84 overlap all functions as a capacitance electrode, and the original MOS capacitance CO is added. The magnitude of this capacitance is 100 to 100 of the capacitance of the liquid crystal driven by the pixel electrode 86.
It is about 20%, which is much larger than the first and second embodiments. Therefore, the effect is increased. Further, during the period in which the preceding scanning line is selected, the MOS capacitance is OFF.
Since only the overlap capacitance Cgso is obtained, the waveform of the scanning line is not blunted.
The driving state does not change due to the addition of the capacitance. As described above, in the method of manufacturing an active matrix panel according to the present invention, a capacitance can be formed in a pixel without increasing the number of steps. By adding the capacity, the contrast ratio is increased, flicker is reduced, and a screen with good reproducibility can be obtained in a wide temperature range. In addition, there is an effect of suppressing crosstalk due to capacitive coupling between the data line and the pixel electrode and a variation in picture elements in a screen, and the image quality is improved overall.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1A is a plan view showing the structure of an active matrix panel according to a first embodiment, and FIGS. 1B and 1C are sectional views thereof. FIG. 2 is a plan view showing the structure of a conventional active matrix panel. FIG. 3 is a diagram showing the gate voltage dependence of an N-channel MOS capacitance. FIG. 4 is a diagram showing potentials at various parts of an active matrix panel. FIG. 5A is a plan view showing the structure of an active matrix panel according to a second embodiment of the present invention, and FIGS. 5B and 5C are cross-sectional views thereof. FIG. 6A is a plan view showing a structure of an active matrix panel according to a third embodiment, and FIGS. 6B and 6C are sectional views thereof. [Description of Signs] 2, 62, 82: polysilicon or amorphous silicon thin film 3, 63, 83: gate insulating film 4, 64, 84: scanning line

Claims (1)

Claims 1. A data supply circuit comprising a pixel electrode arranged in a matrix on a substrate, a thin film transistor connected to the pixel electrode, and a storage capacitor, the data being supplied to a data line. A method of manufacturing an active matrix panel for supplying a signal to the pixel electrode and the storage capacitor via the thin film transistor, comprising: a source / drain region of the thin film transistor formed of a silicon thin film on the substrate; and a silicon thin film serving as the source / drain region Forming the first electrode of the storage capacitor made of a silicon thin film connected to the same material with the same material; forming the gate insulating film of the thin film transistor and the dielectric film of the storage capacitor with the same material; Forming the gate electrode and the second electrode of the storage capacitor with the same material; Forming an interlayer insulating film on the electrode; forming a contact hole on the source / drain region to form the data line electrically connected to the source region; Forming the pixel electrode having an overlap with an insulating film interposed therebetween and being electrically connected to the drain region. 2. A pixel signal which is arranged in a matrix on a substrate, a thin film transistor connected to the pixel electrode, and a storage capacitor, and a data signal supplied to a data line is transmitted through the thin film transistor. Forming a source / drain region of the thin film transistor made of a silicon thin film and a first electrode of the storage capacitor on the substrate by using the same material. Forming a gate insulating film of the thin film transistor and a dielectric film of the storage capacitor with the same material; forming a gate electrode of the thin film transistor and a second electrode of the storage capacitor formed of a scanning line with the same material; Forming an interlayer insulating film on the gate electrode and the second electrode; and forming the interlayer insulating film on the source / drain region and the first electrode. Forming a contact hole thereon, forming the data line electrically connected to the source region, having an overlap with the second electrode with the interlayer insulating film interposed, the drain region and the second Forming the pixel electrode electrically connected to one electrode.