JP3016007B2 - Liquid crystal display - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a liquid crystal display device, and more particularly to an active matrix type liquid crystal display device having a switching element for each pixel.

[0002]

2. Description of the Related Art FIG. 1 shows an equivalent circuit diagram of a pixel cell of an active matrix type liquid crystal display device. 1001 is a signal wiring, and 1002 is a pixel transistor. 100
Reference numeral 3 denotes a gate line for controlling ON / OFF of the pixel transistor 1002. An image signal given to the signal wiring 1001 is written to a pixel electrode via the pixel transistor 1002 and applied to the liquid crystal 1004 as a voltage. However, the signal once written to the pixel electrode changes due to a leak current flowing in the liquid crystal or a leak of the pixel transistor. Since it is necessary to hold the potential of the pixel electrode until the next writing, a storage capacitor 1005 is usually formed in parallel with the pixel electrode. FIG. 2A shows a cross-sectional structure of a pixel cell of a conventional example (Japanese Patent Publication No. 1-38333), and FIG. 2B shows a planar structure. 1101 is a transparent insulating substrate, 1102 is a signal wiring, 1103 is a gate line formed of polysilicon, 1104 is an insulating film formed by oxidizing polysilicon 1103, 1105 is a source of a pixel transistor, 1106 is a pixel transistor. It is a drain. Reference numeral 1107 denotes an electrode for forming a storage capacitor, and a capacitor is formed between the pixel electrode 1109 and a region extending the drain 1106 via the insulating film 1108.

[0003]

When the leak current of the above-mentioned pixel transistor is set to 1 × 10 ⁻¹⁴ A, and the potential fluctuation of the pixel electrode is suppressed to 10 mV or less in a holding time of 1/30 second, the holding capacitance becomes About 30 fF is required. In the structure of the conventional example shown in FIG. 2, an insulating film 1108 SiO ₂
For example, if the film thickness is 600 °, an area of about 50 μm ² is required to form a capacitance of 30 fF. This is a major obstacle in increasing the definition of the display device. For example, when designing a 0.5-inch electronic viewfinder, a 100,000-pixel panel has an area of about 700 μm ² per pixel, and the loss of an opening due to capacitance formation is about 7%. In order to realize 10,000 pixels, the area of one pixel is about 230 μm ² , and the area is lost as much as 20% due to the formation of the capacitance. Also,
Even in the case of a reflection type panel, an increase in the number of pixels causes a problem that the area of one pixel is reduced and a necessary capacity cannot be secured.

Further, in the conventional example shown in FIG.
7 is formed simultaneously with the gate line 1103, the common electrode 1107 needs to be routed in one direction so as not to cross the gate line 1103. For this reason, the wiring resistance of the common electrode increases, and there is also a problem that the potential of the common electrode fluctuates when a signal is written to the pixel electrode 1109.

The insulating film 1108 is obtained by oxidizing polysilicon and has lower reliability than an oxide film of single crystal silicon. When the film thickness is reduced, there is a problem that leakage occurs and dielectric breakdown occurs. ing.

[0006] Under such circumstances, a proposal for efficient capacity formation has been made in the international publication WO 89/02095 of an international application based on the Patent Cooperation Treaty. FIG. 3 is a schematic diagram of a liquid crystal display device disclosed in the publication WO 89/02095.

In the liquid crystal display device shown in FIG. 3, an insulating layer 13 formed by ion implantation is disposed on a silicon wafer 11, and a source 2 is formed on the insulating layer 13.
A transistor including a drain 17, a gate oxide film 27, and a gate 29 is formed. And source 2
1 is connected to a pixel electrode 33.
The liquid crystal display device is constituted by arranging the constituent members 36 remaining thereon.

In this publication, the source / capacitor region 2
Reference numeral 1 denotes one plate of the capacitor, and the substrate 11 forms the other plate. The capacitor formed by the source / capacitor region 21 and the substrate 11 holds a voltage applied to the liquid crystal through the pixel electrode. It is described.

The present inventors have studied the liquid crystal display device disclosed in this publication. In such a case, in the liquid crystal display device disclosed in the publication, the transistor is formed on the substrate 11 by the insulating layer 1 having a small and uniform thickness.
3, the parasitic capacitance formed between the signal wiring (not shown) connected to the drain 17 and the substrate 11 was found to be large. When the parasitic capacitance increases, the time constant increases, and when a display device having a large number of pixels is configured, there is a possibility that the liquid crystal cannot be driven sufficiently.

An object of the present invention is to provide a liquid crystal display device which solves the above technical problems.

Another object of the present invention is to provide a liquid crystal display device which efficiently forms a storage capacitor for holding a voltage applied to a liquid crystal and suppresses a parasitic capacitance of a signal wiring.

[0012]

Means for Solving the Problems The above-mentioned problems are solved,
The liquid crystal display device of the present invention that achieves the above object has the following configuration.

That is, in the liquid crystal display device according to the present invention, a transistor is arranged at an intersection of the data signal wiring and the scanning signal wiring, and the data signal is provided to the source of the transistor, and the scanning signal wiring is provided to the transistor. At the gate,
A liquid crystal display device comprising a liquid crystal layer disposed between a matrix substrate in which a pixel electrode is connected to the drain of the transistor and a counter substrate having a counter electrode facing the pixel electrode. A semiconductor layer or a conductive layer constituting the matrix substrate is provided below the transistor via an insulating layer, and a layer thickness of the insulating layer located between the source and the semiconductor layer or the conductive layer. Is configured to be thicker than a layer thickness of the insulating layer located between the drain and the semiconductor layer or the conductive layer.

According to the liquid crystal display device having the above configuration, the above-mentioned problem is solved and the above-mentioned object is achieved. That is,
According to the liquid crystal display device of the present invention, since the semiconductor layer or the conductive layer is provided below the drain of the transistor via the insulating layer, a capacitor can be formed between the drain and the semiconductor layer or the conductive layer. As a result, even when the pixel size is reduced, a liquid crystal display device having a large storage capacity can be realized without significantly impairing the aperture ratio.

In addition, since the thickness of the insulating layer below the source is made larger than the thickness of the insulating layer below the drain, the parasitic capacitance of the signal wiring connected to the source is suppressed and reduced. Thus, even when the number of pixels is increased to increase the size of the display device, the liquid crystal can be appropriately driven. According to such a liquid crystal display device of the present invention, a high brightness, a high gradation, and a high definition image can be displayed.

[0016]

DESCRIPTION OF THE PREFERRED EMBODIMENTS A liquid crystal display device according to the present invention has the above-described configuration. Here, a description will be given of a liquid crystal display device according to a reference example of the present invention. However, any configuration disclosed in the reference examples described below can be adopted in embodiments of the present invention described later. The liquid crystal display device of the present invention partially replaces the configuration disclosed in the reference example.
It also includes those with incorporation or addition.

Reference Example 1 This example is an example of a transmissive panel, in which switching elements (transistors) and the like are provided on a transparent insulating substrate to form an element substrate (matrix substrate).

The manufacturing process of the element substrate according to this embodiment will be described with reference to a schematic sectional view of FIG. In the following description and in FIG. 7, the step of forming the interlayer insulating layer and the illustration are omitted.

First, a conductive film 1 is formed on a transparent insulating substrate 101.
After depositing 02, patterning is performed by etching.
At this time, part of the etched portion of the conductive film 102 becomes an opening of the display device later. Next, the conductive film 1
An insulating layer 103 is formed on the substrate 02 (see FIG. 7A).

Next, the polysilicon 1 serving as a transistor
After depositing 04, gate oxidation is performed to form a gate insulating film 105, and a gate polysilicon 106 is formed thereon. Subsequently, the source and drain regions 10 of the transistor
After the layers 7 and 108 are formed by ion implantation, the signal wiring 109 is connected to the source 107 via the contact holes (see FIG. 7B).

Next, after forming the conductive light shielding film 110,
The transparent pixel electrode 111 is formed of, for example, ITO so as to be connected to the drain 108 through the through hole (FIG. 7).
(C)).

The element substrate manufactured as described above is made to face a transparent counter substrate on which a counter electrode and the like are formed, and a liquid crystal is sealed between them to manufacture a transmission panel.

In this embodiment, the storage capacitor for holding the potential of the pixel electrode 111 is formed between the drain region 108 of the transistor and the conductive film 102 and between the transparent pixel electrode 111 and the conductive light-shielding film 110. Formed by both the capacitors. Accordingly, a large storage capacity can be secured without impairing the aperture ratio, and a relatively bright, high-definition, high-gradation liquid crystal display device can be realized.

In this embodiment, the conductive film 102 serving as a common electrode for forming a storage capacitor is formed on the entire surface except for the opening, and the parasitic resistance is significantly reduced as compared with the conventional example. It is possible to make the potential of 111 more stable. Further, it is possible to avoid a problem that the aperture ratio is reduced due to the routing of the common electrode.

In the above description, the conductive light-shielding film 110 is provided, but this may be omitted. In this case, gradation can be improved by providing a black matrix on the counter substrate side.

The conductive film 102 can be formed by ion implantation of polysilicon, single crystal silicon, ITO, or the like. When ITO is used, it can be formed using a low-temperature polysilicon film formation process.
Further, the insulating film 103 can be formed by patterning the conductive film 102 and then oxidizing the surface.

Further, the source 107 of the thin film transistor,
It is also possible to make the drain 108 a mask offset, an electric field relaxation structure such as a DDD structure, etc., to reduce leakage current and improve breakdown voltage.

In this embodiment, an example of a transmissive panel has been described. However, the capacitance formation shown in this embodiment is also effective when a reflective panel is configured using the pixel electrode 111 as a reflective electrode. In that case, the substrate 101 does not need to be transparent, and for example, a silicon substrate, a metal substrate, or the like can be used. In the case of a reflection type panel, the conductive light shielding film 1 is used.
Reference numeral 10 may be a conductive film for forming a capacitor, and need not be a light-shielding film. The light-shielding film is located above the pixel electrode or on the opposite substrate, and the properties of the film itself are reduced to reflect components. Needless to say, it is more effective. Also, there is no need to provide openings,
A larger capacity can be secured.

REFERENCE EXAMPLE 2 In Reference Example 1, a region which is made transparent by etching the conductive film 102 (a region serving as an opening) is provided. In this example, the film is made transparent by selective oxidation. Was done.

The manufacturing process of the element substrate according to the present embodiment will be described with reference to the schematic sectional view of FIG. Note that, in the following description and FIG. 8, the steps of forming the interlayer insulating layer and the display are omitted.

First, a conductive film 202 is formed on a transparent insulating substrate 201. The conductive film 202 is obtained by, for example, implanting impurities into silicon to have conductivity. As the crystallinity, polycrystal, amorphous, single crystal and the like can be considered. In this example, a part of the conductive film 202 is oxidized by selective oxidation to form a transparent region 203 (see FIG. 8A).

Subsequently, an insulating layer 204 is formed on the conductive film 202 by oxidation. After that, similarly to Reference Example 1, after depositing polysilicon 205 to be a transistor, gate oxidation is performed to form a gate insulating film 206, and a gate polysilicon 207 is formed thereon. Subsequently, after the source and drain regions 208 and 209 of the transistor are formed by ion implantation, the source 2
The signal wiring 210 is connected to the signal line 08 (see FIG. 8B).

Next, after forming the conductive light-shielding film 211,
The transparent pixel electrode 212 is formed so as to be connected to the drain 209 through the through hole (see FIG. 8C).

The element substrate manufactured as described above is opposed to a transparent opposing substrate on which an opposing electrode and the like are formed, and a liquid crystal is sealed between them to produce a transmissive panel.

Generally, when a TN liquid crystal or the like is used, an alignment film (not shown) such as polyimide is provided on a pixel electrode or an insulating film on the pixel electrode, and the surface is subjected to a rubbing treatment. Controls the orientation of the liquid crystal. However, when there are large irregularities on the surface of the element substrate, a region where rubbing is not sufficiently performed is created due to the influence, and the alignment of the liquid crystal is not sufficiently controlled, which causes an alignment defect. For this reason, for example, when black is desired to be displayed, there is a problem that a region which is displayed in white appears near a place where unevenness exists, and as a result, the contrast of the panel is reduced.

On the other hand, in this example, the opening is raised as compared with other parts due to the selective oxidation, so that
Rubbing is performed uniformly at least around the opening,
A liquid crystal panel with good controllability of liquid crystal and high contrast can be realized.

In this embodiment, an example of a transmissive panel has been described. However, a similar effect can be obtained when a reflective panel is constructed. In addition, the fact that the opening is raised is effective in improving the contrast even in a liquid crystal display device in which rubbing is not performed. For example, a rubbing treatment is not necessary in a polymer scattering type liquid crystal, but when the opening is located at a position lower than other regions, the electric potential of the region other than the opening greatly affects the electric field, and is different from the electric field to be originally applied. An electric field is applied to the liquid crystal, which lowers the contrast and gradation of the panel. In the case of this example, since the opening area is raised, it is hardly affected by the potential of other areas, and the contrast and the gradation are improved.

As described above, according to the present embodiment, a liquid crystal display device having a high contrast can be obtained in addition to the effects obtained in the first embodiment.

Reference Example 3 In this example, an example in which a peripheral driving circuit for driving a switching element formed of a thin film transistor is formed on a single crystal semiconductor substrate will be described.

The element substrate according to this example will be described with reference to a schematic sectional view of FIG. In the following description and FIG. 9,
The description and display of the interlayer insulating layer are omitted.

In FIG. 9, reference numeral 401 denotes a single crystal semiconductor substrate, for example, a silicon wafer. 402 is LOCOS
An oxide film, which can be used for element isolation of a transistor in a driver circuit. Reference numeral 403 denotes a thin insulating film, which can be formed by oxidizing the surface of the wafer 401. The insulating film 403 is used as a gate insulating film of a driver circuit, and is used as an insulating film forming a storage capacitor of a display pixel portion. Reference numeral 404 denotes a well region of a transistor included in the driving circuit. The well 404 is the substrate 40
When 1 is used as it is, it does not matter. 405
Is the gate electrode of the driver circuit, and can be formed in the same step as the gate electrode 409 of the pixel transistor. 406 and 407 are a source and a drain of the drive circuit. In this example, in particular, in order to improve the breakdown voltage of the source 406 and the drain 407, the low concentration layer 408 for relaxing the electric field is used.
Is provided. 410 is a source of the pixel transistor, and 411 is a drain. Further, in order to improve the breakdown voltage of the source 410 and the drain 411, a low concentration electric field relaxation layer 412 is provided. The drain 411 is a thin insulating film 4
03 to form a capacitor between the substrate 401 and
It serves as a storage capacitor for the pixel electrode potential. The drain 411 is connected to the pixel electrode 413, and the source 410 is connected to the signal line 4.
14 is connected.

In this embodiment, if the configuration shown in the first embodiment described below is applied, the source 410 and the signal line 41
4 on the LOCOS oxide film 402,
The parasitic capacitance of the signal line can be reduced.

The driving circuit can be constituted by a single type of transistor, or can be constituted by a CMOS. In this example, the driving circuit is formed on a silicon wafer, so that the driving force is large and the leakage current is small as compared with the case of using polysilicon or amorphous silicon. Can be obtained with a high yield.

The reflection type panel can be obtained by making the element substrate having the above structure face the counter substrate on which the counter electrode and the like are formed, and sealing liquid crystal between them. Although the pixel electrode 413 is a reflective electrode in the reflective liquid crystal display device of this embodiment, a transmissive panel can be configured using the pixel electrode 413 as a transparent electrode. In the case of a transmissive panel, it is necessary to make the display section transparent, which will be described in detail in Reference Example 4.

Although the pixel electrode is in direct contact with the drain, it is also possible to lower the contact resistance by electrically connecting it once through aluminum or the like.

[Reference Example 4] In this example, an example in which a peripheral driving circuit for driving a switching element formed of a thin film transistor is formed on a single crystal semiconductor substrate to constitute a transmission type liquid crystal display device will be described. FIG. 10 is a partial cross-sectional view of the panel of this example.
Shown in

In FIG. 10, reference numeral 501 denotes a single crystal semiconductor substrate; 502, an insulating layer typified by SiO ₂ ; and 503, a conductive layer provided below the drain 511 of the pixel TFT via an insulating layer. The conductive layer 503 is, for example, a polysilicon layer provided in a pixel portion in a mesh pattern, and connected to a power supply provided on a peripheral substrate. Reference numeral 504 denotes a MOSFET well formed on the surface of the substrate 501, and reference numeral 505 denotes a MOS.
FET source / drain diffusion layers; 506, a metal wiring connected to the source / drain; 507, a MOSFET gate electrode; 508, a signal line wiring connected to the source region of the pixel FET; 509, a source region of the pixel TFT;
0 is a gate of the pixel FET, 511 is a drain of the pixel FET, 512 is a channel of the pixel FET, 513 is a transparent pixel electrode, 514 is an interlayer insulating layer, 515 is an alignment film, 516 is a liquid crystal layer, 517 is a counter substrate, and 518 is a counter substrate. 6 shows layers of a transparent counter electrode, a color filter, a black matrix, and the like provided on a counter substrate 517.

In this embodiment, in order to realize a transmissive panel, the area of the display pixel portion of the substrate 501 is removed by etching to make it transparent. In this case, by using an etching solution (for example, TMAH) in which the etching rate of silicon is higher than that of the oxide film,
It can penetrate evenly. At this time, an insulating film 502 such as a LOCOS film can be used as an etching stopper. Alternatively, when a pixel transistor is formed after a silicon nitride film or the like is deposited over the insulating film 502, the silicon nitride film can be used as an etching stopper layer.

As shown in FIG. 10, the liquid crystal driving peripheral circuit of this embodiment is formed on a bulk single crystal semiconductor substrate, and has the advantage of realizing high speed and high reliability. on the other hand,
The display pixel portion is formed of a thin film transistor, is resistant to light leakage, has a thin TFT channel portion of about 300 mm, and has a flat pixel region. Is achieved.

Further, the transparent pixel electrode 513 of the display pixel portion
A conductive layer 503 of polysilicon for forming a storage capacitor is arranged below the drain region 511 connected to the pixel electrode 513, and the height of a through hole for connecting the pixel electrode 513 and the drain region 511 is reduced. Since it is lower than in the past, there is also an advantage in terms of fabrication that connection is easy.

FIG. 11 shows an equivalent circuit diagram of the active matrix type liquid crystal display device of this embodiment. 11, 601 is a pixel TFT, 602 is a scanning line, 603 is a signal line, 604 is a pixel electrode, 605 is a horizontal shift register, 606 is a vertical shift register, 607 is a video signal transfer switch driven by the horizontal shift register, 6
Reference numeral 08 denotes a capacitor for temporarily holding the video signal, and reference numeral 609 denotes a second video singo transfer switch for batch-transferring the video signal temporarily stored in the storage capacitor to the pixel electrode. The video signal is sequentially transferred from the video signal input terminal 610 at a shifted timing. 611 is a reset switch for the signal line 603.

FIG. 12 and FIG. 13 are drive pulse timing diagrams of the active matrix liquid crystal display device of this example. As the video signal, a signal corresponding to an odd-numbered row and a signal corresponding to an even-numbered row are alternately sent for each field period.
Therefore, as an operation of the liquid crystal display device, first, a scanning signal is sent from the vertical shift register 606 to the odd-numbered scanning line (ODD1) in the odd-numbered field, and the odd-numbered pixel TF
T601 is made conductive. In the meantime, a video signal to be recorded on the liquid crystal is transferred to a pixel electrode 604 (2) of each pixel via a transfer switch 607 sequentially driven by a horizontal shift register 605 (ODD) for generating a horizontal scanning pulse synchronized with the video signal. ), 604 (4). At the same time, the video signal is transferred to the capacitor 608 via a transfer switch 607 that is sequentially driven by a horizontal shift register 605 (EVEN) that outputs a horizontal scanning pulse synchronized with the video signal. Next, during the horizontal blanking period, after the reset switch 611 is turned on and the signal line 603 is reset once, a scan signal is sent to the even-numbered scan line (EVEN1) to make the even-numbered pixel TFT 601 conductive, and The second video signal transfer switch 609 is turned on, and a video signal is recorded on the pixel electrodes 604 (1) and 604 (3) of each pixel. In this way, video signals are sequentially recorded on the pixel electrodes. When the liquid crystal molecules forming the cell move in response to the signal voltage transferred in this manner, the transmittance of the liquid crystal cell changes depending on the direction of a polarizing plate provided separately in relation to a cross polarizer. This is shown in FIG.

The signal voltage value V _SIG shown on the horizontal axis in FIG.
Is known to have different contents depending on the liquid crystal used. For example, when a twisted nematic (TN) liquid crystal is used, the value is defined as an effective voltage value (V _rms ). A qualitative explanation of this value is shown in FIG. That is, in order to prevent the DC component from being applied to the liquid crystal and burning of the liquid crystal, a signal is applied by changing the polarity of the signal voltage for each frame, but the liquid crystal itself is applied with the AC voltage indicated by oblique lines in the figure. It operates on components. Therefore, the effective voltage V _rms is the time for two frames tF,
Assuming that the signal voltage transferred to the liquid crystal is V _LC (t), it is expressed by the following equation.

[0054]

(Equation 1)

In FIG. 14, V _{rms corresponds} to V _SIG and V _rms
Accordingly, the transmittance of the liquid crystal cell changes in accordance with the condition, and a desired image can be displayed.

As means for improving the resolution in the horizontal direction,
As shown in FIG. 11, there is a method of displacing the positions of the pixels by, for example, 0.5 pixels, whereby, for example, a pixel between an odd-numbered row and a pixel adjacent thereto is viewed at a horizontal interval. Then, the pixels of the even rows are filled, and the apparent horizontal resolution is improved. At this time, as shown in the timing chart of FIG. 13, it is necessary to shift the timing of the horizontal scanning pulse between the odd-numbered row and the even-numbered row in accordance with the spatial shift between the pixels of the odd-numbered row and the even-numbered row.

Further, it is possible to drive the panel according to the present embodiment without having the storage capacitor 608. In this case, only one horizontal shift register is required. An example of driving using 605 (ODD) will be described. In addition, 605 (EVEN),
Steps 607, 608, and 609 become unnecessary.

The video signal input terminal 610 receives data from an external memory. Horizontal shift register 605
By driving (ODD) at twice the speed of the example of FIG. 11, writing for one row is performed in a 1/2 horizontal scanning period.
Even without batch writing during blanking period,
The same number of pixels as in the example of FIG. 11 can be driven. At this time, the main drive can be performed by reading from the external memory at double speed in accordance with horizontal scanning.

This example can be easily realized by the effect of the present invention that the capacity of the signal line is small and the time constant of writing is small. Also, since the number of shift registers and switches are reduced, the size of the panel can be reduced.
Lighter weight and lower cost can be achieved. Further, there is an advantage that the production yield is improved and the cost can be reduced.

In general, as described above, in a liquid crystal display device, the DC voltage is applied to the liquid crystal while changing the polarity of the signal voltage in order to prevent the liquid crystal from burning. When the polarity is switched, a slight change occurs in the transmittance of the liquid crystal cell. For example, in a 1/30 second cycle, this change is recognized by a human, causing flicker of brightness and flicker. As described above, the two-line simultaneous driving method in which the same video signal is written in the odd-numbered rows and the even-numbered rows is used, thereby reducing the polarity inversion cycle of the video signal to 1 / 260th of a second and suppressing flicker. be able to.

[0061]

【Example】

[Embodiment 1] A feature of this embodiment is that the thickness of the insulating layer below the source of the transistor is made larger than the thickness of the insulating layer below the drain. In the present embodiment, the description will be made focusing on the characteristic portions. However, the present invention relates to all the structures disclosed in the above-described reference examples, such as a method of manufacturing an element substrate, a driving circuit, a material forming a liquid crystal display device, and the like. Also includes partially substituted, incorporated or added.

In this embodiment, an example in which a conductive silicon substrate containing impurities is used as an element substrate will be described.

An element substrate according to this embodiment will be described with reference to a schematic sectional view of FIG. In the following description and FIG. 4, the description and display of the interlayer insulating layer are omitted.

In FIG. 4, reference numeral 301 denotes a conductive silicon substrate containing impurities. Reference numeral 302 denotes SiO ₂ formed by selective oxidation, which is hereinafter referred to as a LOCOS oxide film. 3
03 is an oxide film thinner than the LOCOS oxide film 302. On the LOCOS oxide film 302 and the oxide film 303,
There is polysilicon or amorphous silicon 304 to be a transistor, and a gate electrode 306 is present on the surface thereof via a gate oxide film 305. Further, a source 307 and a drain 308 are formed by diffusion of impurities. The source and drain regions can be formed as an LDD structure in which the impurity concentration changes stepwise by implanting two types of ions having different diffusion coefficients or offsetting the mask, thereby improving the breakdown voltage. The source 307 is connected to the signal wiring 309 via a contact hole. The drain 308 is connected to the pixel electrode 310 via a through hole. 311 is a conductor layer,
A capacitor is formed between the pixel electrode 310 and the pixel electrode 310. By shielding the transistor portion from light with the conductor layer 311, light leakage of the transistor can be reduced.

The reflection type panel is manufactured by making the element substrate having the above configuration face the counter substrate on which the counter electrode and the like are formed, and filling liquid crystal between them. In the reflection type liquid crystal display device of this embodiment, the pixel electrode 310 uses a metal electrode such as aluminum.

Also in this embodiment, it is of course possible to configure a display device without forming the conductor layer 311. In this case, if the thin film transistor is shielded from light by the pixel electrode 310, it is needless to say that the light leakage current is reduced and the contrast and gradation of the display device are improved.

In this embodiment, a storage capacitor for holding the potential of the pixel electrode 310 is also formed between the drain 308 and the substrate 301 via the thin oxide film 303. The potential of the substrate 301 only needs to be fixed to a certain potential in at least a part of the substrate, and the parasitic capacitance of the substrate is large. If there is almost no change in the potential, no particular potential need be applied. When the conductive layer 311 is provided, the storage capacitance is the capacitance between the drain 308 and the substrate 301 and the capacitance between the drain 308 and the substrate 301.
0, which is a parallel capacitance with the capacitance between the conductor layers 311.

It should be noted that in this embodiment, the insulating film 303 between the substrate 301 and the drain 308 is thin, and the insulating layer 302 between the substrate 301 and the source 307 is thick, so that the storage capacitance is large and the parasitic capacitance of the signal line is low. That is, a small display device can be realized. When the thin insulating film 303 is formed by thermally oxidizing a silicon substrate, dielectric breakdown and leakage hardly occur even when a high electric field is applied. It is possible to increase the capacity.

In the present invention, the possible thickness of the thin insulating film 303 is generally in the range of 50 ° to 2000 °, more preferably in the range of 500 ° to 1500 °, and optimally 70 ° to 2000 °.
It can be in the range of 0 ° to 1000 °.

On the other hand, the possible thickness of the thick insulating film 302 can be generally in the range of 2000-15,000, more preferably in the range of 2000-10000, and most preferably in the range of 4000-8000.

By the way, when the parasitic capacitance of the signal line becomes large, the time constant becomes large, and there is a problem that the drive becomes impossible when the number of pixels is increased or when the display device is enlarged. In addition, when a driving method in which a video signal is stored in a capacity in a chip and then written to a pixel is employed,
An increase in the parasitic capacitance of the signal line necessitates an increase in the memory capacity, which causes an increase in chip size and a decrease in the number of chips obtained per wafer. However, in this embodiment, since the source 307 and the signal line 309 pass over the LOCOS oxide film 302, the parasitic capacitance of the signal line can be reduced.

Although the light-shielding layer 311 is provided in this embodiment, the light-shielding layer 311 is not necessarily provided when the capacity formed between the drain 308 and the substrate 301 is sufficiently large. In this case, light can be shielded by a black matrix on the counter substrate side having a color filter and the like. Further, the pixel electrode 310 in this embodiment is
A high-brightness reflective panel that does not require a polarizing plate can also be realized by using a polymer-dispersed liquid crystal layer that is disposed obliquely with respect to 1 and is used as a liquid crystal layer between itself and the counter substrate.

[Embodiment 2] This embodiment will be described with reference to FIG. In addition to the first embodiment, by providing the impurity diffusion layer 312 to stabilize the capacitance between the drain 308 and the substrate 301, the storage capacitance can be stabilized. The impurity diffusion layer 312 is of the same conductivity type as the substrate 301, and can prevent the depletion layer from spreading below the drain 308 to change the capacitance value. Alternatively, an inversion capacitor can be formed by setting the potential of the substrate 301 so that an inversion region is formed below the drain 308. In this case, if an impurity diffusion region having a conductivity type opposite to that of the substrate is provided so as to be in contact with the inversion region in order to supply charges in the inversion region, the capacitance value is further stabilized.

In the step of forming the gate electrode 306, it is also possible to form a wiring 313 and form a capacitor between the wiring 313 and the drain 308. The wiring 313 is routed in one direction or in a lattice on the display portion, and can apply a potential around the display portion. In order to inject impurities into the drain region below the wiring 313, in the case of offsetting the dark layer of the source and drain on the mask, the deep layer is ion-implanted before forming the wiring 313, and the thin layer is ion-implanted. By performing the process after the formation of the wiring 313 and the gate electrode 306, the gate self-aligned transistor can be formed with high consistency. This capacitance is connected in parallel with the capacitance between the drain 308 and the substrate 301 and the capacitance between the pixel electrode 310 and the light-shielding film 311, so that a larger storage capacitance can be formed.

[Embodiment 3] In order to reduce the leak current of the thin film transistor and secure the driving force, the source,
It is effective to increase the thickness of the drain region and the thickness of the channel region. On the other hand, considering the driving force of the transistor, the parasitic resistance between the channel and the source and between the channel and the drain becomes a problem, and it is possible to reduce the parasitic resistance by increasing the film thickness. Further, increasing the thickness of the source and drain portions has the advantage that the contact resistance can be reduced and the contact can be easily etched. In this embodiment, an example of a liquid crystal display device taking these factors into consideration will be described.

FIG. 6 is a schematic view of an active matrix substrate constituting such a liquid crystal display device. In this figure, the same reference numerals as those in FIG. 3 denote the same parts, and a detailed description thereof will be omitted.

In the active matrix substrate shown in FIG. 6, a semiconductor region 412 is provided in the source and drain portions. That is, the semiconductor layer forming the source and the drain is formed thicker than the semiconductor layer 304 forming the channel region. After patterning the semiconductor region 412, the structure of FIG. 6 can be obtained by depositing a semiconductor layer constituting 307. The region 412 can be formed to have the same conductivity type as the source and drain by ion implantation before depositing the semiconductor layer constituting 307. However, the source and drain after depositing the semiconductor layer 307 or patterning the gate 306 can be used. It is possible to perform impurity implantation simultaneously with the source and drain in the ion implantation and diffusion steps.

With this structure, a transistor having a smaller leakage current and a higher driving force can be formed.

[0079]

According to the present invention, a liquid crystal display device having a large storage capacity can be realized without significantly impairing the aperture ratio even when the pixel size is reduced. Further, even when the size of the display device is increased by increasing the number of pixels, a liquid crystal display device capable of appropriately driving the liquid crystal can be realized.

Therefore, according to the liquid crystal display device of the present invention,
High brightness, high gradation and high definition image display can be performed.

[Brief description of the drawings]

FIG. 1 is an equivalent circuit diagram of a pixel cell of a conventional active matrix type liquid crystal display device.

FIG. 2 is a diagram showing a cross-sectional structure and a planar structure of a pixel cell of a conventional liquid crystal display device.

FIG. 3 is a schematic view showing an example of a conventional liquid crystal display device.

FIG. 4 is a schematic partial cross-sectional view illustrating an example of a matrix substrate according to the liquid crystal display device of the present invention.

FIG. 5 is a schematic partial cross-sectional view illustrating an example of a matrix substrate according to the liquid crystal display device of the present invention.

FIG. 6 is a schematic partial cross-sectional view illustrating an example of a matrix substrate according to the liquid crystal display device of the present invention.

FIG. 7 is a schematic partial cross-sectional view of a matrix substrate of a liquid crystal display device according to a reference example of the present invention.

FIG. 8 is a schematic partial cross-sectional view of a matrix substrate of a liquid crystal display device according to a reference example of the present invention.

FIG. 9 is a schematic partial cross-sectional view of a matrix substrate of a liquid crystal display device according to a reference example of the present invention.

FIG. 10 is a schematic sectional view of a liquid crystal cell of a liquid crystal display device according to a reference example of the present invention.

FIG. 11 is a partial equivalent circuit diagram of a liquid crystal display device according to a reference example of the present invention.

FIG. 12 is a diagram illustrating an example of a drive pulse timing of the liquid crystal display device.

FIG. 13 is a diagram illustrating an example of a drive pulse timing of the liquid crystal display device.

FIG. 14 is a diagram illustrating a relationship between signal voltage and transmittance of a liquid crystal display device.

FIG. 15 is a diagram illustrating an operation of the liquid crystal display device.

[Explanation of symbols]

 Reference Signs List 11 silicon wafer 13 insulating layer 17 drain 21 source 27 gate oxide film 29 gate 31 insulating layer 33 pixel electrode 36 constituent member 101 transparent insulating substrate 102 conductive film 103 insulating film 104 polysilicon 105 gate insulating film 106 gate polysilicon 107 source Region 108 drain region 109 signal wiring 110 conductive light-shielding film 111 transparent pixel electrode 201 transparent insulating substrate 202 conductive film 203 transparent region 204 insulating film 205 polysilicon 206 gate oxide film 207 gate electrode 208 source 209 drain 210 signal wiring 211 conductive Opaque film 212 transparent pixel electrode 301 silicon substrate 302 LOCOS film 303 oxide film 304 amorphous silicon 305 gate oxide film 306 gate electrode 307 source 30 Drain 309 Signal wiring 310 Pixel electrode 311 Conductive layer 312 Impurity diffusion layer 313 Wiring 401 Semiconductor substrate 402 LOCOS film 403 Insulating film 404 Well region 405 Gate electrode 406 Source 407 Drain 408 Low-concentration electric field relaxation layer 409 Gate electrode 410 Source 411 Drain 412 Low-concentration electric field relaxation layer 413 Pixel electrode 414 Signal wiring 501 Semiconductor substrate 502 Insulating layer 503 Conductive layer 504 MOSFET well 505 MOSFET source / drain diffusion layer 506 Metal wiring 507 MOSFET gate electrode 508 Signal line wiring 509 Pixel TFT source 510 Gate of pixel TFT 511 Drain of pixel TFT 512 Channel of pixel TFT 513 Transparent pixel electrode 514 Interlayer insulating layer 515 Alignment film 516 Liquid Crystal layer 517 Transparent counter substrate 518 Transparent counter electrode layer 601 Pixel TFT 602 Scanning line 603 Signal line 604 Pixel electrode 605 Horizontal shift register 606 Vertical shift register 607 Video signal transfer switch 608 Capacity 609 Second video signal transfer switch 610 Video signal input End 611 reset switch 1001 signal wiring 1002 pixel transistor 1003 gate line 1004 liquid crystal 1005 storage capacitor 1101 transparent insulating substrate 1102 signal wiring 1103 gate line 1104 insulating film 1105 pixel transistor source 1106 pixel transistor drain 1107 common electrode 1108 insulating film 1109 pixel electrode

──────────────────────────────────────────────────続 き Continued on front page (58) Field surveyed (Int.Cl. ⁷ , DB name) G02F 1/136 500

Claims (10)

(57) [Claims] 1. A transistor is disposed at an intersection of a data signal line and a scanning signal line, the data signal line being a source of the transistor, the scanning signal line being a gate of the transistor, and a pixel electrode being a pixel electrode. A matrix substrate connected to the drain of the transistor; and a counter substrate having a counter electrode facing the pixel electrode. In a liquid crystal display device including a liquid crystal layer disposed between: A semiconductor layer constituting the matrix substrate via an insulating layer, or a conductive layer is disposed, the layer thickness of the insulating layer located between the source and the semiconductor layer or the conductive layer, the drain is A liquid crystal display having a thickness greater than a thickness of the insulating layer located between the semiconductor layer and the conductive layer. Indicating device. 2. The liquid crystal display device according to claim 1, further comprising means for applying a predetermined potential to said conductive layer. 3. The liquid crystal display device according to claim 1, wherein at least a part of a peripheral circuit for driving the transistor is formed over a single crystal semiconductor substrate. 4. The insulating layer located between the source and the semiconductor layer or the conductive layer has a thickness of 2000
2. The liquid crystal display device according to claim 1, wherein the angle is in the range of {15000}. 5. The insulating layer according to claim 1, wherein said insulating layer has a thickness of 2,000.degree.
5. The liquid crystal display device according to claim 4, wherein the angle is in the range of 000 °. 6. The insulating layer has a thickness of 4000 ° to 80 °.
5. The liquid crystal display device according to claim 4, which is in the range of 00 °. 7. The insulating layer located between the drain and the semiconductor layer or the conductive layer has a thickness of 50 °.
2. The liquid crystal display device according to claim 1, wherein the angle is in the range of Å2000 °. 8. The insulating layer has a thickness of 500 ° to 150 °.
The liquid crystal display device according to claim 7, wherein the angle is in the range of 0 °. 9. The insulating layer has a thickness of 700 to 100.
The liquid crystal display device according to claim 7, wherein the angle is in the range of 0 °. 10. The liquid crystal display device according to claim 1, wherein a semiconductor layer forming the source or the drain has a greater thickness than a semiconductor layer forming a channel region of the transistor.