JPH09191231A - Filter device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain a digital band-pass filter which is small in circuit scale and small in operation quantity as a filter which extracts signals of frequencies f1 and f2 from an input signal. SOLUTION: When f1 :f2 =1:2, an input signal is sampled at a frequency fs =6f1 and A/D-converted by an A/D converter 2, and then inputted to the comb filter 5 of the digital band-pass filter 4 to remove frequencies which are equal to and 1/6, 1/3, and 1/2 time as high as fs , so that the resulting signal is inputted to notch filters 6 and 7. The notch filter 6 further removes frequencies which are equal to and 1/3 and 1/2 time as high as fs , and then a signal of f1 is extracted. The notch filter 7, on the other hand, removes frequencies which are equal to and 1/6 and 1/2 time as high as fs to extract a signal of f2 .

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a filter device for separating and extracting two specific frequencies from an input signal, and is used as a bandpass filter for extracting a tracking signal of a consumer digital VTR, for example. Is suitable.

[0002]

2. Description of the Related Art In the format of a consumer digital VTR, f ₁ (= fb / 9) generated by 24-25 modulation is used.
0) and f ₂ (= fb / 60), two levels of pilot signals leak into the F0 track are detected, and tracking is performed.
Therefore, it is necessary to separate and extract two frequencies f ₁ and f ₂ from the signal component. Conventionally, various forms of filters have been realized as bandpass filter circuits for extracting a specific frequency from a signal.

For example, there is an active filter using an OP amplifier as shown in FIG. Further, a digital bandpass filter in which this characteristic is replaced by a digital circuit is known. FIG. 27 shows an example of IIR type, and FIG. 28 shows an example of FIR type. Conventionally, in the case of an application in which two frequencies are separated and extracted from one signal, two such bandpass filters are used and they are configured to operate in parallel.

[0004]

However, the conventional bandpass filter has a problem in that when a narrow band filter is to be created, the order of the filter becomes high and the circuit scale and stability are deteriorated. That is, in the case of the analog filter as shown in FIG. 26, the number of elements that give a constant is increased and oscillation is likely to occur, which is difficult to manufacture. Further, even in the IIR type digital as shown in FIG. 27, limit oscillation is likely to occur, and the multiplier is used, so that the circuit scale becomes large. Further, in the FIR type digital of FIG. 28, the number of multipliers for giving a complicated coefficient is increased, and it takes a long time to execute the operation and the circuit scale becomes extremely large. Furthermore, when it is necessary to separate and extract the two frequencies, mutual adjustment is difficult and the circuit scale is large.

The present invention has been made to solve the above problems, and an object thereof is to obtain a filter device having a small circuit scale and a small amount of calculation.

[0006]

According to the invention of claim 1, two specific frequencies f ₁ having a frequency ratio of 1: 2,
sampling means for sampling an input signal including a signal of f ₂ (f ₁ <f ₂ ) at a basic operating frequency f _s which is 6 times the frequency f ₁ , and 0 of the frequency f _s from the sampled input signal, First filter means for passing signals having frequencies equal to 1/6, 1/3, 1/2 times, and 0, 1/3 of the frequency f _s from the signal passed through the first filter means, Second filter means for removing signals having frequencies equal to ½ times, and 0, 1 / of the frequency f _s from the signal passed through the first filter means.
Third filter means for removing signals having frequencies equal to 6, 1/2 times are provided.

According to the sixth aspect of the invention, two specific frequencies f ₁ and f ₂ (f ₁ <f having a frequency ratio of 2: 3 are used.
₂ ) sampling means for sampling an input signal including the signal at a basic operating frequency f _s which is 6 times the frequency f ₁ , and the frequency f from the sampled input signal.
0, 1/12, 1/6, 1/4, 1/3, 5/1 of _s
First, to pass signals of frequencies equal to 2, 1/2 times
0, 1/12, 1/4, 1 / of the frequency f _s from the signal that has passed through the filter means and the first filter means.
Second filter means for removing signals of frequencies equal to 3, 5/12, 1/2 times, and 0, 1/12, 1 / of the frequency f _s from the signal passed through the first filter means.
Third filter means for removing signals having frequencies equal to 6, 1/3, 5/12, and 1/2 times are provided.

[0008]

According to the first aspect of the invention, there are two types of separation and extraction.
Frequency is f₁, F_TwoAs f ₁: F_Two= 1: 2 relationship
F₁6 times the frequency (f_Two3 times the frequency
Number) is the basic clock frequency f_sDigit that works as
A digital filter is configured, and
Is the fundamental frequency f_s0, 1/6, 1/3, 1/2 times
Filter circuit that extracts the frequency of
Notch filter times to remove 1/3 and 1/2 frequency
And the frequencies 0, 1/6, and 1/2 times the fundamental frequency
And a notch filter circuit to be removed. to this
Requires no adjustment, and has a small circuit scale and a small amount of computation.
A depass filter is realized.

According to the invention of claim 6, the separation and extraction 2
Two frequencies f₁, F_TwoAs f ₁: F_Two= 1: 2
When there is a relationship, f₁6 times the frequency (f_Two3 times the circumference
Wave number) is the basic clock frequency f_sDizzy acting as
A digital filter is constructed, and the digital filter is
Is the fundamental frequency f_s0, 1/12, 1/6, 1 /
4/3, 5/12, 1/2 frequency extraction
Filter circuit and fundamental frequency 0, 1/12, 1 /
It removes frequencies of 4, 1/3, 5/12, and 1/2 times.
Switch filter circuit and 0, 1/12, 1 / of the fundamental frequency
The frequency that removes 6, 1/3, 5/12, and 1/2 times the frequency
Switch filter circuit. This allows
A bandpass filter that does not require adjustment, and has a small circuit scale and a small amount of computation.
The filter is realized.

[0010]

DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 shows an embodiment of the present invention. Reference numeral 1 is an analog low-pass filter, 2 is an A / D converter, and 4 is a digital band-pass filter as a filter device according to the present invention. Reference numeral 3 is a basic clock generation circuit, which generates a basic clock for the A / D converter 2 and the filter 4.

First, as a first embodiment. The frequencies of the signals to be extracted are f ₁ and f _2, and f ₁ : f ₂ = 1: 2
The following is a description of the case. At this time, the frequency f _{s of the} basic clock is assumed to be f _s = 6 · f ₁ (= 3 · f ₂ ).

F above₁, F_TwoThe input signal, including the signal of
First, f with analog filter 1₁, F _TwoBands other than frequencies
After removing the region, A / D conversion is performed by the A / D converter 2, and f
₁Is sampled at a frequency of 3 times. Then, the main
Enter the clear digital bandpass filter 4 and f₁And f
_TwoEach is extracted. This bandpass filter 4
Removes unnecessary frequency with comb filter 5 inside
It is composed of notch filters 6 and 7 for the purpose.

Next, specific characteristics and configuration examples of the digital bandpass filter 4 of the present invention will be described with reference to FIGS.
It is explained together with. In the figure, the common comb filter 5 is 0, 1/6, 1 / of the fundamental frequency f _s from the input signal.
It has a function of extracting the frequency of 3 1/2 times, and is expressed by the following transfer function. (Hereinafter, the characteristics of the filter will be described excluding the amount amplified by the filter.)

[0014]

[Equation 1]

The frequency characteristic of this circuit is shown in FIG. FIG.
As can be seen from the above, in the comb filter 5, the fundamental frequency f
_s of, and extracted 0,1 / 6,1 / 3,1 / 2 times the frequency. The formula (1) can be easily transformed into the following form.

[0016]

[Equation 2]

FIG. 3 shows the circuit configuration when N = 8 in the equation (2). In FIG. 3, 8 is a delay device, and 48
It consists of delay elements. 9 is a subtractor and 10 is an adder. Reference numeral 11 is a delay device, which is composed of six delay elements. The signal input to this circuit is transmitted to the subtractor 9 and also input to the delay device 8. The subtractor 9 subtracts the signal delayed by the delay device 8 from the input signal. This difference signal becomes one input of the adder 10, and here the delay device 11
Is added to the signal that has passed. The output of the adder 10 becomes an input to the next notch filters 6 and 7, and also an input to the delay device 11. Further, when N = 8, the equation (1) can be modified as follows.

[0018]

(Equation 3)

Here, FIG. 4 realizes the configuration of the formula (1) according to the modification of the formula, and FIG. 5 realizes the configuration of the formula (3). In any configuration, the frequency characteristic is the characteristic shown in FIG. Therefore, any configuration serves the purpose of the comb filter of the present invention. However, it is rational because usually the configuration of FIG. 3 can be realized with the fewest components. In the present embodiment, the transfer function N
Although it was configured in the case of = 8, by increasing this value,
A comb filter having a narrower pass band can be made without changing the target pass frequency.

Next, the notch filters 6 and 7 will be described.
I do. The notch filter is f₁And f _TwoConfigured separately for
It is. First, f₁Notch fill that extracts only the frequency
The transfer function of this filter is expressed by the following equation.
It is.

[0021]

(Equation 4)

This equation (4) can be easily modified as follows.

[0023]

(Equation 5)

The frequency characteristic of this circuit is shown in FIG. As can be seen from the figure, the notch filter 6 completely removes frequencies 0, 1/3, and 1/2 times the fundamental frequency f _s . Therefore, when combined with the characteristics of the comb filter 5, it is a bandpass filter that passes only a frequency ⅙ of the fundamental frequency, that is, f _1, as shown in FIG. Here, FIG. 7 shows an example in which the notch filter 6 is configured according to the equation (5). In addition, an example configured according to the equation (4) is shown in FIG.
Shown in Either configuration serves the purpose of the notch filter of the present invention. However, it is rational because normally the configuration of FIG. 7 can be realized with the fewest components.

Next, the notch filter 7 for extracting only the frequency f ₂ is used, and the transfer function of this filter is expressed by the following equation.

[0026]

(Equation 6)

This equation can be easily modified as follows.

[0028]

(Equation 7)

The frequency characteristic of this circuit is shown in FIG. As can be seen from the figure, in the notch filter 7, frequencies 0, 1/6, and 1/2 times the fundamental frequency f _s are completely removed. Therefore, in combination with the characteristics of the comb filter 5, it is a bandpass filter that passes only a frequency ⅓ of the fundamental frequency, that is, f ₂ as shown in FIG. Here, FIG. 11 shows an example in which a notch filter is constructed according to the equation (7). In addition, an example configured according to the equation (6) is shown in FIG.
It is shown in FIG. Either configuration serves the purpose of the notch filter of the present invention. However, normally, the configuration of FIG.
It is rational because it can be realized with the fewest components.

According to the first embodiment, the two frequencies to be separated and extracted are f ₁ and f ₂ , and f ₁ : f ₂ =
In the case of the 1: 2 relationship, a digital circuit composed only of a delay circuit and an addition (subtraction) circuit that operates with a frequency six times f ₁ (three times f ₂ ) as the basic clock frequency f _s Yes, 0, 1/6, 1 / of the fundamental frequency f _s
A comb filter circuit that extracts 3 or 1/2 times the frequency,
Notch filter circuit that removes frequencies 0, 1/3, and 1/2 times the fundamental frequency, and 0, 1/6, 1 / of the fundamental frequency
By configuring a digital filter with a notch filter circuit that removes twice the frequency, a bandpass filter that does not require adjustment and has a small circuit scale and a small amount of calculation can be realized.

Next, as a second embodiment, FIG.
And the frequency of the signal to be extracted is f ₁, F_Twoage,
f₁: F_TwoThe case where = 2: 3 is described. this
When the basic clock f_sFrequency f_sIs f_s= 6f
₁(= 4 · f_Two). Input signal containing this signal
First, the analog filter 1₁, F_TwoBelow the frequency
After removing the outside band, A / D converter 2
And f₁Is sampled at a frequency of 3 times. Next
Then, the digital bandpass filter 4 is entered, and f₁And f
_TwoEach is extracted.

Next, specific characteristics and configuration examples of the digital bandpass filter 4 in the case of f ₁ : f ₂ = 2: 3 will be described with reference to FIGS. Of the digital bandpass filters 4 shown in FIG. 1, the common comb filter 5 is used.
Is 0, 1/12 of the fundamental frequency f _s from the input signal,
It acts to extract frequencies of 1/6, 1/4, 1/3, 5/12, and 1/2 times, and is expressed by the following transfer function.

[0033]

(Equation 8)

The frequency characteristic of this circuit is shown in FIG. As can be seen from the figure, in the comb filter 5, the fundamental frequency f
_s of 0, 1/12, 1/6, 1/4, 1/3, 5/1
The frequency of 2 and 1/2 times is extracted. Equation (8) can be easily transformed into the following form.

[0035]

[Equation 9]

FIG. 15 shows the circuit configuration when N = 8 in the equation (9). In FIG. 15, 12 is a delay device, which is composed of 96 delay elements. Reference numeral 13 is a subtractor, and 14 is an adder. Reference numeral 15 is a delay device, which is composed of 12 delay elements. The signal input to this circuit is transmitted to the subtractor 13 and also input to the delay device 12. The subtracter 12 subtracts the signal delayed by the delay device 12 from the input signal. This difference signal serves as one input of the adder 14 and is added to the signal that has passed through the delay device 15. The output of the adder 14 becomes an input to the next notch filters 6 and 7, and also an input to the delay device 15. Further, when N = 8, the equation (1) can be modified as follows.

[0037]

(Equation 10)

Here, FIG. 16 shows that the configuration of the equation (8) is realized and FIG. 17 shows that of the equation (9) according to the modification of the equation. In either configuration, the frequency characteristic is the characteristic shown in FIG. Therefore, any configuration serves the purpose of the comb filter of the present invention. However, it is rational because normally the configuration of FIG. 15 can be realized with the fewest components. In this embodiment, the transfer function is configured to be N = 8, but by increasing this value, a comb filter having a narrower pass band can be created without changing the target pass frequency. You can

Next, the notch filters 6 and 7 will be described. First, the notch filter 6 that extracts only the frequency of f ₁ is expressed by the following equation.

[0040]

[Equation 11]

This equation 11 can be easily modified as follows.

[0042]

(Equation 12)

The frequency characteristic of this circuit is shown in FIG. As can be seen from the figure, in this comb filter 6, 0, 1/12, 1/4, 1/3, 5/12, 1 / of the fundamental frequency f _s
The double frequency is completely removed. Therefore, when combined with the characteristics of the comb filter 5, it is a bandpass filter that passes only 1/6 of the fundamental frequency, that is, f _1, as shown in FIG. Here, an example in which the notch filter 6 is configured according to the equation (12) is shown in FIG. Also,
FIG. 20 shows an example configured according to equation (11). Either configuration serves the purpose of the notch filter of the present invention. However, it is rational because normally the configuration of FIG. 19 can be realized with the fewest components.

Next, the notch filter 7 for extracting only the frequency of f ₂ is used, and the transfer function of this filter is expressed by the following equation.

[0045]

(Equation 13)

This equation can be easily modified as follows.

[0047]

[Equation 14]

The frequency characteristic of this circuit is shown in FIG. As can be seen from the figure, in the comb filter 7, the fundamental frequency f
0, 1/12, 1/6, 1/3, 5/12, 1/2 of _s
The double frequency is completely removed. Therefore, when combined with the characteristics of the comb filter 5, it is a bandpass filter that passes only a frequency ¼ of the fundamental frequency, that is, f _2, as shown in FIG. Here, an example in which the notch filter 7 is configured according to the equation (14) is shown in FIG. Also,
FIG. 24 shows an example configured according to the equation (13). Either configuration serves the purpose of the notch filter of the present invention. However, it is rational because the configuration of FIG. 23 can be usually realized with the fewest number of components.

Each delay device in each of the drawings of the first and second embodiments is reset by a reset circuit (not shown) at the start of operation. Further, the circuits such as the adder and the delay device have been described as the constituent elements, but they can be replaced with the addition, the memory and the like and can be realized on a computer. In particular, according to the present invention, since it is not necessary to perform coefficient multiplication that requires a long calculation processing time, it can be realized by simple calculation processing. Further, in the bandpass filter of the present invention, f ₁ and f
₂₎ Ripple component remains, but sufficient practical characteristics can be obtained in applications where this effect is small.

According to the second embodiment, two frequencies to be separated and extracted are f ₁ and f ₂ , and f ₁ : f ₂ =
When the ratio is 2: 3, a frequency that is twice the least common multiple of the two frequencies, that is, six times f ₁ is added to the delay circuit that operates with the basic clock frequency f _s (subtraction).
It is a digital circuit composed of only circuits, and is 0, 1/12, 1/6, 1/4, 1/3, 5 of the fundamental frequency f _s.
/ 12, 1/2 times the frequency of the comb filter circuit, and 0, 1/12, 1/4, 1/3, 5 / of the fundamental frequency
Notch filter circuit that removes the frequency of 12, 1/2 times, and 0, 1/12, 1/6, 1/3, 5 / of the fundamental frequency
By constructing a digital filter with a notch filter circuit that removes 12 and 1/2 times the frequency,
It is possible to realize a bandpass filter that requires no adjustment and has a small circuit scale and a small amount of calculation.

[0051]

As described above, according to the present invention,
As a filter for extracting signals of frequencies f ₁ and f ₂ having a relationship of f ₁ : f ₂ = 1: 2 or 2: 3 from the input signal,
It is possible to obtain a filter which requires no adjustment and has a small circuit scale and a small amount of calculation.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention.

FIG. 2 is a frequency characteristic diagram of a comb filter in the bandpass filter according to the first embodiment.

FIG. 3 is a block diagram showing a configuration example of a comb filter.

FIG. 4 is a block diagram showing another configuration example of a comb filter.

FIG. 5 is a block diagram showing another configuration example of a comb filter.

FIG. 6 is a frequency characteristic diagram of a notch filter in a bandpass filter.

FIG. 7 is a block diagram showing a configuration example of a notch filter.

FIG. 8 is a block diagram showing another configuration example of a notch filter.

FIG. 9 is a frequency characteristic diagram of the f ₁ extraction circuit.

FIG. 10 is a frequency characteristic diagram of a notch filter.

FIG. 11 is a block diagram showing another configuration example of a notch filter.

FIG. 12 is a block diagram showing another configuration example of a notch filter.

FIG. 13 is a frequency characteristic diagram of the f ₂ extraction circuit.

FIG. 14 is a frequency characteristic diagram of a comb filter in the bandpass filter according to the second embodiment.

FIG. 15 is a block diagram showing a configuration example of a comb filter.

FIG. 16 is a block diagram showing another configuration example of the comb filter.

FIG. 17 is a block diagram showing another configuration example of the comb filter.

FIG. 18 is a frequency characteristic diagram of a notch filter in a bandpass filter.

FIG. 19 is a block diagram showing a configuration example of a notch filter.

FIG. 20 is a block diagram showing another configuration example of a notch filter.

FIG. 21 is a frequency characteristic diagram of the f ₁ extraction circuit.

FIG. 22 is a frequency characteristic diagram of a notch filter.

FIG. 23 is a block diagram showing another configuration example of a notch filter.

FIG. 24 is a block diagram showing another configuration example of a notch filter.

FIG. 25 is a frequency characteristic diagram of the f ₂ extraction circuit.

FIG. 26 is a configuration diagram of a conventional analog bandpass filter.

FIG. 27 is a block diagram of a conventional digital IIR filter.

FIG. 28 is a block diagram of a conventional digital FIR filter.

[Explanation of symbols]

 2 A / D converter 3 Basic clock generation circuit 4 Digital bandpass filter 5 Comb filter 6 Notch filter 7 Notch filter 8 Delay device 9 Subtractor 10 Adder 11 Delay device 12 Delay device 13 Subtractor 14 Adder 15 Delay device

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁶ Identification code Internal reference number FI Technical display location G11B 15/467 7736-5D G11B 15/467 B

Claims (10)

[Claims] 1. Two specific circles having a frequency ratio of 1: 2.
Wave number f₁, F_Two(F ₁<F_Two) Input signals including
The frequency f₁6 times the basic operating frequency f_sIn the sample
Sampling means for sampling and the frequency f from the sampled input signal._sof
Signals with frequencies equal to 0, 1/6, 1/3, and 1/2 times
A first filter means for passing the signal, and the frequency from the signal passed through the first filter means.
f_sSignals of frequencies equal to 0, 1/3, and 1/2 times
The second filter means for removing the signal and the frequency from the signal passed through the first filter means.
f_sA signal with a frequency equal to 0, 1/6, and 1/2 times
A filter device comprising: third filter means for removing. 2. The transfer function of the second filter means is 1 + z ⁻¹ −z ⁻³ −z ⁻⁴ , where z ⁻¹ is the delay element corresponding to the basic operating frequency f _s , and 3. The filter device according to claim 1, wherein the transfer function of the third filter means is 1-z ^<-2 > + z < ³ > -z ^{< -4} >. 3. The second filter means comprises a first delayer having three delay elements, a first adder, a second delayer having one delay element, and a first subtractor. The output signal of the first filter means is input to the first adder and the first delay device, and the first adder outputs the output signal of the first filter means. And the output of the first delay device are added, and the output of the first adder is input to the first subtractor and the second delay device, and the first subtractor is the first subtractor. The output of the second delay device is subtracted from the output of the adder to obtain the output of the second filter means, and the third filter means has a third delay element having three delay elements.
And a second subtractor, a fourth delayer having one delay element, and a second adder, wherein the output signal of the first filter means is subtracted from the second subtractor. The second subtractor subtracts the output of the third delay device from the output signal of the first filter means and outputs the output of the second subtractor. Input to the second adder and the fourth delay device, and the second adder adds the output of the second subtractor and the output of the fourth delay device to add the third filter. 3. The filter device according to claim 2, which is an output of the means. 4. When the delay element corresponding to the basic operating frequency f _s is z ^-1 , the transfer function of the first filter means is 1 + z ^-6 + z ^-12 + ... + z ^{-6 (N-1).} The filter device according to claim 1, wherein (N: natural number). 5. The first filter means includes a fifth delay device having delay elements in multiples of six, a third subtractor, a sixth delay device having six delay elements, and a sixth delay device. The input signal is input to the third subtractor and the fifth delay device, and the third subtractor outputs the output of the fifth delay device from the input signal. Subtracting, inputting the output of the third subtractor to the third adder, the third adder adding the output of the third subtractor and the output of the sixth delayer, The filter device according to claim 4, wherein the output of the third adder is used as an output signal of the first filter means and is input to the sixth delay device. 6. Two specific circles having a frequency ratio of 2: 3.
Wave number f₁, F_Two(F ₁<F_Two) Input signals including
The frequency f₁6 times the basic operating frequency f_sIn the sample
Sampling means for sampling and the frequency f from the sampled input signal._sof
0, 1/12, 1/6, 1/4, 1/3, 5/12, 1
/ 1st filter that passes signals of frequencies that are twice as high
Filter means and the signal passed through the first filter means from the frequency
f_s0, 1/12, 1/4, 1/3, 5/12, 1 /
A second filter that removes signals of frequencies that are twice as high
Means and the frequency from the signal passed through the first filter means
f_s0, 1/12, 1/6, 1/3, 5/12, 1 /
Third filter for removing signals having frequencies that are twice as high
And a filter device having means. 7. The basic operating frequency f_sCorresponding delay
Element z^-1Then, the transmission of the second filter means
Function is 1 + z^-1-Z^-3-Z^-Four+ Z^-6+ Z^-7-Z^-9-Z
^-TenAnd the transfer function of the third filter means is 1-
z^-2+ Z^-Four-Z ^-6+ Z^-8-Z^-TenIs characterized by
The filter device according to claim 6, wherein 8. The second filter means comprises a first delay device having six delay elements, a first adder, a second delay device having three delay elements, and a first subtractor. And a third adder having one delay element and a second adder, and outputs the output signal of the first filter means to the first adder and the first delayer. The first adder adds the output signal of the first filter means and the output of the first delay device, and outputs the output of the first adder to the first subtractor and the first subtractor. 2 delay device, the first subtractor subtracts the output of the second delay device from the output of the first adder, and outputs the output of the first subtractor to the second delay device. Input to an adder and a third delay device, and the second adder adds the output of the first subtractor and the output of the third delay device to add the second filter. The third filter means has a fourth delay element having four delay elements.
A delay unit, a third adder, a fifth delay unit having four delay elements, a fourth adder, a sixth delay unit having two delay elements, and a second subtractor. The output signal of the first filter means is input to the third adder and the fourth delayer, and the third adder outputs the output signal of the first filter means and the output signal of the first filter means. The output of the fourth delay device is added, the output of the third adder is input to the fourth adder, and the output of the fourth delay device is added to the third adder and the fifth adder. A delay device, the fourth adder adds the output of the third adder and the output of the fifth delay device, and the output of the fourth adder is added to the second subtractor. And a sixth delay unit, the second subtractor subtracts the output of the sixth delay unit from the output of the fourth adder, and outputs the output of the third filter unit. Filter device according to claim 7, characterized in that a. 9. When the delay element corresponding to the basic operating frequency f _s is z ^-1 , the transfer function of the first filter means is 1 + z ^-12 + z ^-24 + ... + z ^{-12 (N-1).} The filter device according to claim 6, wherein (N: natural number). 10. The first filter means comprises a seventh delayer having delay elements in a multiple of 12, a third subtractor, an eighth delayer having 12 delay elements, and And an input signal is input to the third subtractor and the seventh delay device, and the third subtractor outputs the input signal from the input signal to the seventh delay device. The output is subtracted, the output of the third reducer is input to the fifth adder, and the fifth adder adds the output of the third subtractor and the output of the eighth delayer. 10. The filter device according to claim 9, wherein the output of the fifth adder is used as an output signal of the first filter means and is input to the eighth delay device.