JPH03242024A - D/a conversion method - Google Patents

Abstract

PURPOSE:To obtain an analog signal with fidelity to an original signal with low cost by multiplying a sampling function with a data of a sampling point so as to interpolate the sampling point. CONSTITUTION:A D/A converter consists of 8-bit DFFs 1-5, current addition D/A converter sections 6-9, a 1/4 frequency divider circuit 10, a shift register 11, multipliers 12-15, an adder 16, a 4-multiplier 17, a standardized function generator 18, a D/A converter section 19 including a filter, and delay circuits 20-22 having a delay characteristic by one clock. Each of plural sampling data in the vicinity multiplied with a standardized function is summed to obtain an interpolation data. Thus, the use of a digital filter is not required, the cost is reduced and D/A conversion with fidelity to an original signal waveform is attained.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention is directed to a digital signal converter that converts a digital signal into an analog signal.
Regarding the A conversion circuit.

[Conventional technology]

This D/A conversion circuit has a sampling frequency fs
There is one that performs D/A conversion and then attaches an analog low-pass filter. However, the waveform immediately after D/A conversion has a step-like shape that changes with the width of the sampling period (1/fs), so unnecessary harmonic components (aliasing noise) are added to it, and glitches also occur, causing the signal to deteriorate. deterioration,
This may lead to problems such as equipment damage. For this reason, high-order analog low-pass filters have been used to remove them, but because these filters are required to have steep roll-off characteristics, they degrade the phase characteristics of the signals passing through them. There was a problem.

Therefore, oversampling technology has come to be used as a method to remove aliasing noise components without degrading the signal. This is done by increasing the sampling frequency at the stage before D/A conversion to keep aliasing noise components away from high frequencies. In other words, new interpolated data obtained by calculation is inserted between discrete data strings input using a digital filter.

[Problem to be solved by the invention]

However, this method has problems in that the scale of the digital filter for interpolation calculations becomes extremely large, and the clock frequency for signal processing also becomes high, resulting in high costs.

The present invention has been made in view of these points, and an object of the present invention is to provide a D/A conversion method that makes it possible to obtain an analog signal faithful to the original signal at low cost.

[Means to solve the problem]

For this purpose, the present invention performs D/A conversion on a digital signal with consecutive sample points at every appropriate number of sampling clocks to obtain the appropriate number of parallel outputs, and multiplies each signal of the parallel outputs by a sampling function. After that, the parallel outputs were added together.

[Examples] Examples of the present invention will be described below. First, according to the sampling theorem, the pig interpolation between sampling points is the following sampling function Φ(1) Φ(t) = 5in2πωt/2πωt ・(1
) is ideally done. Add this function to the third
Shown in the figure.

In this embodiment, this sampling function is multiplied by the data at the sampling points to perform interpolation between the sampling points.

FIG. 1 is a diagram showing a circuit of one embodiment for this purpose. 1
5 is an 8-bit DFF, 6 to 9 are 8-bit D/A converters of current adding type, etc., and 10 is an 8-bit D/A converter that converts the clock CLK to A.
A frequency divider that doubles the frequency; 11 is a shift register that shifts the clock CLK multiplied by A for each clock CLK; 12 to 15;
is a multiplier, 16 is an adder, 17 is a quadruple multiplier that quadruples the clock CLK, and 18 is the waveform after time t0 (see Figure 3) that shows the maximum value of the function of equation (1) above. A function generator that generates a signal, 19 a D/A converter (also has a low-pass filter) that converts the function generated by the function generator 18, and 20 to 22 delays that have delay characteristics of one clock. It is a circuit.

In this circuit, 8-bit digital data is sent to DF and Fl.
When the data is input to the DFF2 and latched by the clock CLK, the data is transferred to the next DFF2 and latched by the clock at that time. This latched digital data is then converted into an analog voltage in the D/A converter 6 and input to the multiplier 12.

This DFF2 is latched once every 4 clocks, so DFF2 is latched once every 4 clocks.
On the output side of the /A converter 6, a step-like signal that changes every four clocks is obtained. The above is the same for the D/A converters 7 to 9, but their change timings are shifted by one clock.

Figure 3 (al is the clock CLK, (bl is the original signal waveform and sampling points (Pi to P8), (C) is the output waveform of the D/A converter 6, (di is the output of the D/A converter 7) waveform, tel shows the output waveform of the D/A converter 8, and (fl shows the output waveform of the D/A converter 9).

Then, the multiplier 12 multiplies the function Φ(1) in FIG. 3 starting from time t0 in accordance with the generation timing of the data P1. Furthermore, the multiplier 13 multiplies the data P2 by the same function in synchronization with the generation timing of the data P2. Furthermore, in the multiplier 14, in accordance with the generation timing of data P3,
The same function is multiplied. Further, the multiplier 15 multiplies the data P4 by the same function in synchronization with the generation timing of the data P4.

Therefore, the influence of the data P1 to P4 is given by the function Φ(1) from the time when the data P1 to P4 are generated until four clocks have elapsed.

Then, since the data whose parts other than the sampling points have been corrected by the function Φ(1) are mutually added by the adder 16, there is a difference between each sampling data such as Pl, 22, etc. , data interpolation is performed taking into account data up to four samplings ago at most.

In this way, in this embodiment, the interpolated data is obtained by adding the values obtained by multiplying each of the neighboring sampling data by the sampling function, so that it is possible to obtain an analog output that is extremely faithful to the original signal. become.

In addition, in the above embodiment, up to the following three sampling points, 1
Although the influence is exerted by the sampling function of each sampling data, a more faithful /A conversion can be realized if the influence is exerted on four or more sampling points.

〔Effect of the invention〕

As described above, according to the present invention, there is an advantage that there is no need to use a digital filter, cost can be reduced, and A/A conversion can be performed faithfully to the original signal waveform.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram of a D/A conversion circuit according to an embodiment of the present invention,
FIG. 2 is an explanatory diagram of the operation, and FIG. 3 is a waveform diagram of the sampling function. 1 to 5... 8-bit DFF, 6 to 9... D/A converter of current addition type, etc., 10... A frequency dividing circuit, 11...
・Shift register, 12-15... Multiplier, 16...
- D/A converter including an adder, 17...quadruple multiplier, 18...standardization function generator, 19...filter.

Claims (1)

[Claims] (1) D/A convert a digital signal with consecutive sampling points every appropriate number of sampling clocks to obtain the appropriate number of parallel outputs, multiply each signal of the parallel outputs by a sampling function, and then , a D/A conversion method characterized by adding the parallel outputs.