JPH09189737A - Liquid crystal display element - Google Patents
Liquid crystal display elementInfo
- Publication number
- JPH09189737A JPH09189737A JP8002866A JP286696A JPH09189737A JP H09189737 A JPH09189737 A JP H09189737A JP 8002866 A JP8002866 A JP 8002866A JP 286696 A JP286696 A JP 286696A JP H09189737 A JPH09189737 A JP H09189737A
- Authority
- JP
- Japan
- Prior art keywords
- liquid crystal
- electrodes
- thin film
- short
- film wiring
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Testing Of Short-Circuits, Discontinuities, Leakage, Or Incorrect Line Connections (AREA)
- Testing Electric Properties And Detecting Electric Faults (AREA)
- Liquid Crystal (AREA)
Abstract
Description
【0001】[0001]
【発明の属する技術分野】本発明は、特に液晶パネルを
構成する片側の回路基板上に液晶パネル駆動用半導体チ
ップを搭載した液晶表示素子に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display element, in which a semiconductor chip for driving a liquid crystal panel is mounted on a circuit board on one side constituting a liquid crystal panel.
【0002】[0002]
【従来の技術】従来、液晶表示パネルは金属薄膜配線を
パターン状に形成した一方の基板の該金属薄膜配線上
に、液晶パネル駆動用半導体チップ(以下ICと称す)
内電極中の少なくとも1か所が複数の電極によりIC内
部で短絡されたICを直接接続した構造よりなる。(図
1、図2) 図1はガラスからなる下側基板2及び上側基板4の内面
には透明電極9,10が形成され、これら上側、下側基
板2,4間には液晶8が封入され、その周囲をシール剤
3で封止して液晶パネルを形成している。下側基板2上
には、金属薄膜配線11が形成されている。また金属薄
膜配線11を外部環境から保護するため、これを絶縁性
保護膜12で被覆していた。2. Description of the Related Art Conventionally, in a liquid crystal display panel, a semiconductor chip for driving a liquid crystal panel (hereinafter referred to as an IC) is formed on a metal thin film wiring of one substrate on which a metal thin film wiring is formed in a pattern.
At least one of the inner electrodes has a structure in which an IC short-circuited inside the IC is directly connected by a plurality of electrodes. (FIGS. 1 and 2) In FIG. 1, transparent electrodes 9 and 10 are formed on the inner surfaces of a lower substrate 2 and an upper substrate 4 made of glass, and a liquid crystal 8 is sealed between the upper and lower substrates 2 and 4. Then, the periphery thereof is sealed with the sealant 3 to form a liquid crystal panel. Metal thin film wiring 11 is formed on the lower substrate 2. Further, in order to protect the metal thin film wiring 11 from the external environment, it is covered with the insulating protective film 12.
【0003】図2はIC接続部周辺の説明図で、IC6
内で短絡のない独立した電極5は導電性接続部材7を介
してそれぞれ個別接続部を有する金属薄膜配線13上に
固定接続されている。また、IC内で短絡している複数
の電極15は導電性接続部材7を介して、接続面積を確
保するために複数のIC内短絡電極15に対応した一括
した接続部を有する金属薄膜配線14と接続していた。FIG. 2 is an explanatory view of the periphery of the IC connecting portion, and IC6
The independent electrodes 5 which are not short-circuited therein are fixedly connected to the metal thin film wirings 13 each having an individual connecting portion via the conductive connecting member 7. Further, the plurality of electrodes 15 short-circuited in the IC are connected via the conductive connecting member 7 to the metal thin film wiring 14 having a collective connection portion corresponding to the plurality of IC short-circuit electrodes 15 in order to secure a connection area. I was connected to.
【0004】[0004]
【発明が解決しようとする課題】従来例では搭載したI
CのCOG(チップオングラス)接続状態の評価を搭載
直後ではなく、液晶モジュール組立ての最終工程の点灯
試験ではじめてICのCOG接続状態の良否を判断して
いた。このためIC内の各電極と下側基板とが電気的に
どんな接続状態にあるかはこれまで正確に把握されてい
ないということ、またICリペアへのフィードバックを
かけるまでに時間がかかるという点で問題があった。In the conventional example, the mounted I
The evaluation of the COG (chip on glass) connection state of C was not performed immediately after mounting, but the lighting test in the final step of the liquid crystal module assembly was used to determine whether the COG connection state of the IC was good or bad. For this reason, it is not known exactly what kind of electrical connection between each electrode in the IC and the lower substrate, and it takes time to give feedback to the IC repair. There was a problem.
【0005】本発明の目的は搭載したICのCOG接続
状態の個別評価と、ICリペアへのフィードバックを早
くすることにある。An object of the present invention is to speed up the individual evaluation of the COG connection state of the mounted IC and the feedback to the IC repair.
【0006】[0006]
【課題を解決するための手段】まず、ICのCOG接続
状態を電気的に測定可能とするために、図3に示すよう
に、IC6内の複数の短絡電極15と接続される下側基
板2上の金属薄膜配線において、該IC6内短絡電極1
5の各電極に対応して全て個別の接続部を有する金属薄
膜配線1を形成する。次に導電接続部材7を介して下側
基板にIC6を搭載する。絶縁性保護膜12に覆われて
いない2本の金属薄膜配線1の終端部に抵抗測定用のプ
ローブを接触させ2端子法により抵抗測定を行うことが
できる。これによりCOG接続部分の抵抗測定管理を行
うことが可能となる。First, as shown in FIG. 3, a lower substrate 2 connected to a plurality of short-circuit electrodes 15 in an IC 6 in order to electrically measure the COG connection state of the IC. In the upper metal thin film wiring, the short-circuit electrode 1 in the IC6
The metal thin film wiring 1 having all individual connection portions is formed corresponding to each of the electrodes 5. Next, the IC 6 is mounted on the lower substrate via the conductive connecting member 7. The resistance measurement can be performed by the two-terminal method by bringing a probe for resistance measurement into contact with the end portions of the two metal thin film wirings 1 not covered with the insulating protective film 12. This makes it possible to perform resistance measurement management of the COG connection part.
【0007】IC内各短絡電極に対して全て個別の対向
する接続部を有する金属薄膜配線を設けることにより、
金属薄膜配線とIC内各短絡電極毎の接続部との抵抗を
2端子法により測定することができるため、点灯試験前
に接続状態のよくないICを特定できる。By providing metal thin-film wirings having individual facing connecting portions for each short-circuit electrode in the IC,
Since the resistance between the metal thin-film wiring and the connection portion of each short-circuit electrode in the IC can be measured by the two-terminal method, it is possible to identify the IC in a poor connection state before the lighting test.
【0008】[0008]
【発明の実施の形態】本発明による一実施例を図を用い
て説明する。通常の方法によりアモルファスシリコンを
用いたTFT液晶セルを作製した。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment according to the present invention will be described with reference to the drawings. A TFT liquid crystal cell using amorphous silicon was produced by a usual method.
【0009】図3に本発明による液晶表示素子のIC接
続部周辺の説明図を示す。まず、下側基板2(旭ガラス
製AN−635)上にスパッタ法とエッチングにより金
属薄膜配線1、13(例えば、第一層目の膜厚100n
m、シート抵抗1オームのクロム層に第二層目の膜厚1
00nm、シート抵抗20オームの酸化インジウム層を
積層したもの)及び絶縁性保護膜12(膜厚1300n
mの窒化珪素)を形成して下側回路基板を作製した。次
いで下側回路基板上に導電性接続部材7(日立化成製A
C−8301X)をセッティングした。次にIC6をC
OG接続用ボンダー装置により搭載した。絶縁性保護膜
12に覆われていない2本の金属薄膜配線1の終端部
に、抵抗測定用プローブを接触させ2端子法により抵抗
値を測定し、COG接続状態の良否を判定した。2端子
法により測定した抵抗値が、IC内各短絡電極間及び接
続部の抵抗値1オームに、2本の金属薄膜配線の配線抵
抗値を加味した抵抗値の範囲内にあるとき、COG接続
状態を良品と判定した。更に本実施例による抵抗測定管
理による結果がその後の点灯試験において反映されるこ
とを確認した。FIG. 3 is an explanatory view of the periphery of the IC connecting portion of the liquid crystal display element according to the present invention. First, on the lower substrate 2 (AN-635 manufactured by Asahi Glass Co., Ltd.), metal thin film wirings 1 and 13 (for example, a first layer having a film thickness of 100 n are formed by sputtering and etching).
m, sheet resistance 1 ohm chrome layer on second layer thickness 1
Indium oxide layers having a thickness of 00 nm and a sheet resistance of 20 ohms) and an insulating protective film 12 (film thickness 1300 n)
m silicon nitride) to form a lower circuit board. Next, the conductive connecting member 7 (A Hitachi product)
C-8301X) was set. Then IC6 to C
It was mounted by a bonder device for OG connection. A resistance measuring probe was brought into contact with the end portions of the two metal thin film wirings 1 not covered with the insulating protective film 12, and the resistance value was measured by the two-terminal method to determine whether the COG connection state was good or bad. When the resistance value measured by the 2-terminal method is within the resistance value range in which the resistance value between the short-circuit electrodes in the IC and the connection portion is added to the resistance value of two metal thin film wirings, the COG connection is performed. The condition was judged to be good. Furthermore, it was confirmed that the results of the resistance measurement management according to this example were reflected in the subsequent lighting test.
【0010】[0010]
【発明の効果】本発明によればこれまで電気的に正確に
把握されていなかった搭載ICのCOG接続評価を、搭
載直後に個別のIC内各短絡電極接続部の抵抗測定管理
により行うことができるため、ICリペアへのフィード
バックを早くすることが可能である。According to the present invention, the COG connection evaluation of an on-board IC, which has not been electrically grasped accurately until now, can be performed immediately after mounting by resistance measurement management of each short-circuit electrode connection part in an individual IC. Therefore, it is possible to speed up the feedback to the IC repair.
【図1】従来及び本発明における液晶表示素子の断面
図。FIG. 1 is a cross-sectional view of a liquid crystal display device according to the related art and the present invention.
【図2】従来における液晶表示素子の搭載IC接続部周
辺の説明図。FIG. 2 is an explanatory diagram around a mounting IC connection portion of a conventional liquid crystal display element.
【図3】本発明による液晶表示素子の搭載IC接続部周
辺の説明図。FIG. 3 is an explanatory diagram around a mounting IC connection portion of a liquid crystal display element according to the present invention.
1…金属薄膜配線、 2…下側基板、 5…電極、 6…半導体チップ、 7…導電性接続部材、 12…絶縁性保護膜、 13…金属薄膜配線、 15…IC内短絡電極。 DESCRIPTION OF SYMBOLS 1 ... Metal thin film wiring, 2 ... Lower substrate, 5 ... Electrode, 6 ... Semiconductor chip, 7 ... Conductive connection member, 12 ... Insulating protective film, 13 ... Metal thin film wiring, 15 ... Short circuit electrode in IC.
───────────────────────────────────────────────────── フロントページの続き (72)発明者 諌田 尚哉 神奈川県横浜市戸塚区吉田町292番地株式 会社日立製作所生産技術研究所内 (72)発明者 折橋 律郎 神奈川県横浜市戸塚区吉田町292番地株式 会社日立製作所生産技術研究所内 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Naoya Isada, 292 Yoshida-cho, Totsuka-ku, Yokohama-shi, Kanagawa Stock, Ltd., Institute of Industrial Science, Hitachi, Ltd. Production Engineering Research Laboratory, Hitachi, Ltd.
Claims (1)
液晶パネル駆動用の半導体チップを搭載した液晶表示素
子において、少なくとも1か所で複数の電極によりチッ
プ内部で短絡された液晶パネル駆動用の半導体チップ
と、前記半導体チップ内で短絡した複数の電極に対応す
るすべて個別の接続部及び金属薄膜配線を有する液晶パ
ネルとが、導電性接続部材により接続されていることを
特徴とする液晶表示素子。1. A liquid crystal display device having a semiconductor chip for driving a liquid crystal panel mounted on a circuit board on one side constituting a liquid crystal panel, wherein the liquid crystal panel is short-circuited inside the chip by a plurality of electrodes at at least one place. The liquid crystal display characterized in that the semiconductor chip and the liquid crystal panel having all the individual connection parts corresponding to the plurality of electrodes short-circuited in the semiconductor chip and the metal thin film wiring are connected by a conductive connection member. element.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8002866A JPH09189737A (en) | 1996-01-11 | 1996-01-11 | Liquid crystal display element |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8002866A JPH09189737A (en) | 1996-01-11 | 1996-01-11 | Liquid crystal display element |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH09189737A true JPH09189737A (en) | 1997-07-22 |
Family
ID=11541296
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP8002866A Pending JPH09189737A (en) | 1996-01-11 | 1996-01-11 | Liquid crystal display element |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH09189737A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2005292282A (en) * | 2004-03-31 | 2005-10-20 | Seiko Epson Corp | Mounting structure, electro-optical device, and electronic apparatus |
KR100790525B1 (en) * | 1999-07-22 | 2007-12-31 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | Contact structure and semiconductor device |
CN100388100C (en) * | 2004-07-23 | 2008-05-14 | 精工爱普生株式会社 | Electro-optical device, electronic apparatus, and mounting structure |
-
1996
- 1996-01-11 JP JP8002866A patent/JPH09189737A/en active Pending
Cited By (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100790525B1 (en) * | 1999-07-22 | 2007-12-31 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | Contact structure and semiconductor device |
US7411211B1 (en) | 1999-07-22 | 2008-08-12 | Semiconductor Energy Laboratory Co., Ltd. | Contact structure and semiconductor device |
US7626202B2 (en) | 1999-07-22 | 2009-12-01 | Semiconductor Energy Laboratory Co., Ltd. | Contact structure and semiconductor device |
US7956359B2 (en) | 1999-07-22 | 2011-06-07 | Semiconductor Energy Laboratory Co., Ltd. | Contact structure and semiconductor device |
US8258515B2 (en) | 1999-07-22 | 2012-09-04 | Semiconductor Energy Laboratory Co., Ltd. | Contact structure and semiconductor device |
US8368076B2 (en) | 1999-07-22 | 2013-02-05 | Semiconductor Energy Laboratory Co., Ltd. | Contact structure and semiconductor device |
US8624253B2 (en) | 1999-07-22 | 2014-01-07 | Semiconductor Energy Laboratory Co., Ltd. | Contact structure and semiconductor device |
JP2005292282A (en) * | 2004-03-31 | 2005-10-20 | Seiko Epson Corp | Mounting structure, electro-optical device, and electronic apparatus |
JP4617694B2 (en) * | 2004-03-31 | 2011-01-26 | セイコーエプソン株式会社 | Mounting structure, electro-optical device, and electronic apparatus |
CN100388100C (en) * | 2004-07-23 | 2008-05-14 | 精工爱普生株式会社 | Electro-optical device, electronic apparatus, and mounting structure |
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