JPH09186560A5 - - Google Patents

Info

Publication number
JPH09186560A5
JPH09186560A5 JP1996351953A JP35195396A JPH09186560A5 JP H09186560 A5 JPH09186560 A5 JP H09186560A5 JP 1996351953 A JP1996351953 A JP 1996351953A JP 35195396 A JP35195396 A JP 35195396A JP H09186560 A5 JPH09186560 A5 JP H09186560A5
Authority
JP
Japan
Prior art keywords
output
multiplexer
latch
input
coupled
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1996351953A
Other languages
English (en)
Japanese (ja)
Other versions
JPH09186560A (ja
Filing date
Publication date
Priority claimed from US08/570,034 external-priority patent/US5684744A/en
Application filed filed Critical
Publication of JPH09186560A publication Critical patent/JPH09186560A/ja
Publication of JPH09186560A5 publication Critical patent/JPH09186560A5/ja
Pending legal-status Critical Current

Links

JP8351953A 1995-12-11 1996-12-11 構成可能な多機能フリップフロップ Pending JPH09186560A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US570,034 1990-08-20
US08/570,034 US5684744A (en) 1995-12-11 1995-12-11 Configurable multifunction flip-flop

Publications (2)

Publication Number Publication Date
JPH09186560A JPH09186560A (ja) 1997-07-15
JPH09186560A5 true JPH09186560A5 (https=) 2004-10-14

Family

ID=24277924

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8351953A Pending JPH09186560A (ja) 1995-12-11 1996-12-11 構成可能な多機能フリップフロップ

Country Status (2)

Country Link
US (2) US5684744A (https=)
JP (1) JPH09186560A (https=)

Families Citing this family (36)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5684744A (en) * 1995-12-11 1997-11-04 Hewlett-Packard Company Configurable multifunction flip-flop
US6104642A (en) * 1997-12-11 2000-08-15 Intrinsity, Inc. Method and apparatus for 1 of 4 register file design
US7716330B2 (en) 2001-10-19 2010-05-11 Global Velocity, Inc. System and method for controlling transmission of data packets over an information network
US6573775B2 (en) 2001-10-30 2003-06-03 Integrated Device Technology, Inc. Integrated circuit flip-flops that utilize master and slave latched sense amplifiers
US6700425B1 (en) 2001-10-30 2004-03-02 Integrated Device Technology, Inc. Multi-phase clock generators that utilize differential signals to achieve reduced setup and hold times
US6792545B2 (en) * 2002-06-20 2004-09-14 Guidance Software, Inc. Enterprise computer investigation system
US6992503B2 (en) 2002-07-08 2006-01-31 Viciciv Technology Programmable devices with convertibility to customizable devices
US20040004251A1 (en) * 2002-07-08 2004-01-08 Madurawe Raminda U. Insulated-gate field-effect thin film transistors
US7673273B2 (en) * 2002-07-08 2010-03-02 Tier Logic, Inc. MPGA products based on a prototype FPGA
US7129744B2 (en) * 2003-10-23 2006-10-31 Viciciv Technology Programmable interconnect structures
US7112994B2 (en) 2002-07-08 2006-09-26 Viciciv Technology Three dimensional integrated circuits
US7812458B2 (en) * 2007-11-19 2010-10-12 Tier Logic, Inc. Pad invariant FPGA and ASIC devices
US8643162B2 (en) 2007-11-19 2014-02-04 Raminda Udaya Madurawe Pads and pin-outs in three dimensional integrated circuits
US7042756B2 (en) * 2002-10-18 2006-05-09 Viciciv Technology Configurable storage device
US7068080B1 (en) * 2003-01-17 2006-06-27 Xilinx, Inc. Method and apparatus for reducing power consumption within a logic device
US20040187086A1 (en) * 2003-03-17 2004-09-23 Trivedi Pradeep R. Single edge-triggered flip-flop design with asynchronous programmable reset
US7030651B2 (en) 2003-12-04 2006-04-18 Viciciv Technology Programmable structured arrays
US7176713B2 (en) * 2004-01-05 2007-02-13 Viciciv Technology Integrated circuits with RAM and ROM fabrication options
KR100564611B1 (ko) * 2004-02-14 2006-03-29 삼성전자주식회사 하드 디스크 드라이브의 완충 구조체
US7489164B2 (en) * 2004-05-17 2009-02-10 Raminda Udaya Madurawe Multi-port memory devices
US7187222B2 (en) * 2004-12-17 2007-03-06 Seiko Epson Corporation CMOS master/slave flip-flop with integrated multiplexor
US7486111B2 (en) * 2006-03-08 2009-02-03 Tier Logic, Inc. Programmable logic devices comprising time multiplexed programmable interconnect
US7759971B2 (en) * 2007-06-21 2010-07-20 Easic Corporation Single via structured IC device
US20090128189A1 (en) * 2007-11-19 2009-05-21 Raminda Udaya Madurawe Three dimensional programmable devices
US7635988B2 (en) * 2007-11-19 2009-12-22 Tier Logic, Inc. Multi-port thin-film memory devices
US7602213B2 (en) * 2007-12-26 2009-10-13 Tier Logic, Inc. Using programmable latch to implement logic
US7573293B2 (en) * 2007-12-26 2009-08-11 Tier Logic, Inc. Programmable logic based latches and shift registers
US7573294B2 (en) * 2007-12-26 2009-08-11 Tier Logic, Inc. Programmable logic based latches and shift registers
US7795913B2 (en) * 2007-12-26 2010-09-14 Tier Logic Programmable latch based multiplier
US8230375B2 (en) 2008-09-14 2012-07-24 Raminda Udaya Madurawe Automated metal pattern generation for integrated circuits
US8159266B1 (en) 2010-11-16 2012-04-17 Raminda Udaya Madurawe Metal configurable integrated circuits
US8159265B1 (en) 2010-11-16 2012-04-17 Raminda Udaya Madurawe Memory for metal configurable integrated circuits
US8159268B1 (en) 2010-11-16 2012-04-17 Raminda Udaya Madurawe Interconnect structures for metal configurable integrated circuits
US8631292B2 (en) 2011-08-29 2014-01-14 Freescale Semiconductor, Inc. Multi-threading flip-flop circuit
US9753086B2 (en) 2014-10-02 2017-09-05 Samsung Electronics Co., Ltd. Scan flip-flop and scan test circuit including the same
CN106817286B (zh) * 2016-12-09 2019-06-21 中国特种设备检测研究院 信号路由装置及检测系统

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4677318A (en) * 1985-04-12 1987-06-30 Altera Corporation Programmable logic storage element for programmable logic devices
US5046035A (en) * 1987-08-26 1991-09-03 Ict International Cmos Tech., Inc. High-performance user programmable logic device (PLD)
US5027011A (en) * 1989-10-31 1991-06-25 Sgs-Thomson Microelectronics, Inc. Input row drivers for programmable logic devices
JPH03187519A (ja) * 1989-12-15 1991-08-15 Ricoh Co Ltd プログラマブル・ロジック・デバイス
US5231312A (en) * 1992-03-12 1993-07-27 Atmel Corporation Integrated logic circuit with functionally flexible input/output macrocells
US5440247A (en) * 1993-05-26 1995-08-08 Kaplinsky; Cecil H. Fast CMOS logic with programmable logic control
US5410194A (en) * 1993-08-11 1995-04-25 Xilinx, Inc. Asynchronous or synchronous load multifunction flip-flop
US5502403A (en) * 1994-12-20 1996-03-26 Cypress Semiconductor Corp. High speed configuration independent programmable macrocell
US5528169A (en) * 1995-04-26 1996-06-18 Xilinx, Inc. Method and structure for providing a flip flop circuit with a configurable data input path
US5684744A (en) * 1995-12-11 1997-11-04 Hewlett-Packard Company Configurable multifunction flip-flop

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