JPH09181176A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

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Publication number
JPH09181176A
JPH09181176A JP35144795A JP35144795A JPH09181176A JP H09181176 A JPH09181176 A JP H09181176A JP 35144795 A JP35144795 A JP 35144795A JP 35144795 A JP35144795 A JP 35144795A JP H09181176 A JPH09181176 A JP H09181176A
Authority
JP
Japan
Prior art keywords
interlayer insulating
insulating film
gas
film
chemical vapor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP35144795A
Other languages
Japanese (ja)
Inventor
Junichi Sato
淳一 佐藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP35144795A priority Critical patent/JPH09181176A/en
Publication of JPH09181176A publication Critical patent/JPH09181176A/en
Pending legal-status Critical Current

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  • Formation Of Insulating Films (AREA)
  • Chemical Vapour Deposition (AREA)
  • Local Oxidation Of Silicon (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

PROBLEM TO BE SOLVED: To obtain a semiconductor device in which the permittivity of an interlayer insulating film is reduced and in which there is no fear that a contamination due to an additive gas is left by using a compound of fluorine and oxygen as at least one gas used for chemical vapor growth to form an insulator thin film. SOLUTION: When at least one layer of an insulator thin film 14 is formed, by a chemical vapor growth method, on a substrate 11 on which an electronic circuit is formed, a compound of fluorine and oxygen as at least one gas used for a chemical vapor growth operation is used. For example, an interlayer insulating film 12 and an Al interconnection layer 13 are formed sequentially on a semiconductor substrate 11, and an interlayer insulating film 14 is formed on them by a CVD operation. At this time, the temperature of the substrate 11 is set to about 300 deg.C, SiH4 is introduced as a compound which contains silane, and O2 and COF2 are introduced as oxidizing agents. Then, the pressure inside a reaction container is lowered to a prescribed pressure, a high frequency is applied, and a silicon oxide film which contains F much is formed as the interlayer insulating film 14.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明の属する技術分野】本発明は半導体装置製造方法
に関し、特に絶縁膜の形成方法に適用して好適なもので
ある。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device manufacturing method, and is particularly suitable for application to an insulating film forming method.

【0002】[0002]

【従来の技術】今日、メモリ素子や論理演算素子を始め
とする半導体集積回路は高密度化の傾向にあり、配線技
術はますます微細化と多層化の方向に進んでいる。これ
に伴い、半導体集積回路の製造プロセスにおけるいわゆ
る多層配線技術の占める比重がますます大きくなつてき
ている。
2. Description of the Related Art Today, semiconductor integrated circuits such as memory devices and logical operation devices tend to have higher densities, and wiring technologies are becoming finer and more multilayered. Along with this, the so-called multi-layer wiring technology in the manufacturing process of semiconductor integrated circuits has become more and more important.

【0003】これは配線の微細化と多層化が進むにつれ
て層間絶縁膜の段差が大きくかつ急峻となり、層間絶縁
膜上に金属配線パターンを形成するのが困難になるから
である。また微細化と多層化が進んだ配線では配線の抵
抗や配線間の容量が問題になり始め、いわゆるスケーリ
ング則に合わなくなるからである。簡単に言うと、スケ
ーリング則はトランジスタレベルや簡単なリングオシレ
ータレベルでは合うが、実際のデバイスレベルでは配線
間の容量を低減するため層間絶縁膜自体の誘電率を低下
させることが課題となつている。
This is because as the wiring becomes finer and the number of layers increases, the step of the interlayer insulating film becomes larger and steeper, which makes it difficult to form a metal wiring pattern on the interlayer insulating film. Further, in the wiring that has been miniaturized and multilayered, the resistance of the wiring and the capacitance between the wirings start to become a problem, and the so-called scaling law cannot be met. To put it simply, the scaling rule is satisfied at the transistor level and the simple ring oscillator level, but at the actual device level, the problem is to lower the dielectric constant of the interlayer insulating film itself in order to reduce the capacitance between wirings. .

【0004】[0004]

【発明が解決しようとする課題】そのため各半導体デバ
イスメーカにおいては、シリコン酸化膜(SiO2 )に
フツ素(F)元素をドーピングしてSiOF化し、低容
量化を実現する試みがなされている。これはシリコン酸
化膜(SiO2 )中にシリコン(Si )とフツ素(F)
との結合を作ることにより、誘電率を大きくする要因の
一つであつたOH基をなくす方法で誘電率を低下させる
というものである。なおSiOF化処理にはシリコン酸
化膜(SiO2 )の生成ガスにSiF4 ガスを添加する
方法が一般に採られる。
Therefore, each semiconductor device maker has attempted to realize a low capacitance by doping a silicon oxide film (SiO 2 ) with a fluorine (F) element to form SiOF. This is because silicon (Si) and fluorine (F) are contained in the silicon oxide film (SiO 2 ).
By making a bond with, the dielectric constant is lowered by a method of eliminating the OH group, which is one of the factors that increase the dielectric constant. For the SiOF treatment, a method of adding SiF 4 gas to the generated gas of the silicon oxide film (SiO 2 ) is generally adopted.

【0005】しかしこれらの方法にも様々な解決すべき
課題がある。例えばSiF4 ガスを添加した場合はプラ
ズマ中での乖離が低いので十分にフツ素(F)を取り込
むことができない。またNH3 ガスを添加した系では誘
電率が余り下がらない。一方、CF4 ガスやC2 6
スを添加すれば誘電率を低下できる反面、炭素(C)が
汚染物として残る問題がある。そこで1995年 8月に開催
された第56回応用物理学会学術講演会ではSF6 ガスを
添加する技術が報告されている(講演番号26P-ZB-2)。
しかしこのガスを用いると比誘電率を約 3.3まで低下さ
せることができるものの、SF6 ガスを加え過ぎると硫
黄(S)がやはり汚染物として残る問題があつた。
However, these methods also have various problems to be solved. For example, when SiF 4 gas is added, the dissociation in plasma is so low that fluorine (F) cannot be taken in sufficiently. Moreover, the dielectric constant does not decrease so much in the system to which NH 3 gas is added. On the other hand, if CF 4 gas or C 2 F 6 gas is added, the dielectric constant can be reduced, but there is a problem that carbon (C) remains as a contaminant. Therefore, at the 56th Annual Meeting of the Japan Society of Applied Physics held in August 1995, a technique of adding SF 6 gas was reported (lecture number 26P-ZB-2).
However, although using this gas can reduce the relative dielectric constant to about 3.3, there was a problem that sulfur (S) remained as a contaminant when too much SF 6 gas was added.

【0006】本発明は以上の点を考慮してなされたもの
で、層間絶縁膜の誘電率低減と添加ガスによる汚染物の
残留のおそれのない半導体装置製造方法を提案しようと
するものである。
The present invention has been made in view of the above points, and it is an object of the present invention to propose a method of manufacturing a semiconductor device in which the dielectric constant of an interlayer insulating film is not reduced and contaminants due to an added gas are not likely to remain.

【0007】[0007]

【課題を解決するための手段】かかる課題を解決するた
め本発明においては、電子回路を形成した基板上に少な
くとも1層以上の絶縁体薄膜を化学的気相成長法にて形
成する方法において、化学的気相成長に用いる少なくと
も一つのガスとしてフツ素と酸素の化合物を用いるよう
にする。これによりプラズマ中で乖離した化学的気相成
長ガスからO−F結合を有する反応種を生成することが
できる。またこの際、プラズマ中に単独で存在するOは
ガスの他の構成分子と酸化物を構成して反応系から排気
されるので生成される膜中に構成分子が汚染物として残
らないようにできる。
In order to solve the above problems, the present invention provides a method of forming at least one insulating thin film on a substrate having an electronic circuit formed thereon by chemical vapor deposition. A compound of fluorine and oxygen is used as at least one gas used for chemical vapor deposition. This makes it possible to generate reactive species having an OF bond from the chemical vapor deposition gas dissociated in plasma. Further, at this time, O existing alone in the plasma forms an oxide with other constituent molecules of the gas and is exhausted from the reaction system, so that the constituent molecules can be prevented from remaining as contaminants in the produced film. .

【0008】[0008]

【発明の実施の形態】以下図面について、本発明の一実
施例を詳述する。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below in detail with reference to the drawings.

【0009】(1)成膜装置の構成 図1に本発明の実施に使用するプラズマCVD(Chemic
al Vapor Deposition)装置の概略断面構造を示す。な
おウエハ載置の構成や使用方法の工夫については、本発
明の本質に係わりのある限り特に限定されるものではな
い。反応室となる反応容器1には、その上部にシラン含
有化合物(例えばSiH4やTEOS)と酸化剤(例え
ば酸素とフツ素の化合物ガス)とを矢印Aの方向から導
入する導入管2が設けられている。
(1) Structure of Film Forming Apparatus FIG. 1 shows a plasma CVD (Chemic) used for carrying out the present invention.
al Vapor Deposition) shows a schematic sectional structure of the device. It should be noted that the configuration of the wafer mounting and the devising of the usage method are not particularly limited as long as they are related to the essence of the present invention. A reaction vessel 1 serving as a reaction chamber is provided with an introduction pipe 2 above which a silane-containing compound (for example, SiH 4 or TEOS) and an oxidizing agent (for example, a compound gas of oxygen and fluorine) are introduced from the direction of arrow A. Has been.

【0010】ここで導入管2の開口付近には分散板3及
びシヤワーヘツド4が開口と対面するように配置されて
おり、導入されたガスを高い面内均一性を確保した状態
で均一に分散できるようになされている。因に導入され
たガスはシヤワーヘツド4の直前で混合されるようにな
されている。なおシヤワーヘツド4は上部電極を兼ねて
おり、高周波電源5から 13.56〔MHz〕の高周波を印加
されるようになつている。
Here, a dispersion plate 3 and a shower head 4 are arranged near the opening of the introduction pipe 2 so as to face the opening, and the introduced gas can be uniformly dispersed while ensuring high in-plane uniformity. It is done like this. The introduced gases are mixed just before the shower head 4. The shower head 4 also serves as an upper electrode, and a high frequency of 13.56 [MHz] is applied from the high frequency power source 5.

【0011】このシヤワーヘツド4の下部には、被処理
基板であるウエハ6を載置するサセプタ7が収容されて
おり、埋設されたヒータ8によつて一定温度に保たれる
ようになされている。これにより所定の温度で反応が進
むようになつている。なおサセプタ7中には超音波を印
加する超音波印加装置9が組み込まれており、超音波源
10から超音波を印加することもできるようになつてい
る。この超音波印加装置9を用いる場合には、フツ素と
酸素とでなる化合物ガスの乖離を一層促進でき、O−F
結合を有する反応膜として膜中にフツ素を効率良く取り
込むことができる。また超音波印加装置9を用いる場合
には、同時に汚染物を効率良く排除することができる。
A susceptor 7 on which a wafer 6 as a substrate to be processed is placed is accommodated in the lower portion of the shower head 4 and is kept at a constant temperature by an embedded heater 8. This allows the reaction to proceed at a predetermined temperature. An ultrasonic wave applying device 9 for applying ultrasonic waves is incorporated in the susceptor 7 so that ultrasonic waves can be applied from an ultrasonic wave source 10. When this ultrasonic wave applying device 9 is used, the dissociation of the compound gas composed of fluorine and oxygen can be further promoted, and OF
Fluorine can be efficiently incorporated into the film as a reaction film having a bond. Further, when the ultrasonic wave applying device 9 is used, contaminants can be efficiently removed at the same time.

【0012】(2)成膜条件例 (2−1)第1実施例 ここではAl配線層間を平坦化する場合について説明す
る。なお図2(A)はCVD膜の成膜前におけるウエハ
6の断面構造を示し、図2(B)は成膜後におけるウエ
ハ6の断面構造を示す。またこの図2に示すウエハ6
は、シリコン等からなる半導体基板11上に酸化シリコ
ン等でなる層間絶縁膜12とAl配線層13とを順に積
層してなる。また次の成膜条件で積層されるCVD膜が
層間絶縁膜14である。
(2) Example of Film Forming Conditions (2-1) First Example Here, the case of flattening the Al wiring layers will be described. Note that FIG. 2A shows the sectional structure of the wafer 6 before the CVD film is formed, and FIG. 2B shows the sectional structure of the wafer 6 after the film is formed. The wafer 6 shown in FIG.
Is formed by sequentially stacking an interlayer insulating film 12 made of silicon oxide or the like and an Al wiring layer 13 on a semiconductor substrate 11 made of silicon or the like. Further, the CVD film stacked under the following film forming conditions is the interlayer insulating film 14.

【0013】まずヒータ8の加熱によりウエハ6の温度
を約 300〔℃〕とする。次いで反応容器1内を排気して
室内の圧力を低下させ、導入管2からシラン含有化合物
と酸化剤とを導入する。この例では、SiH4 をシラン
含有化合物として導入し、O2 及びCOF2 を酸化剤と
して導入する。このときSiH4 及びO2 は50〔SCCM〕
で導入され、COF2 は30〔SCCM〕で導入される。この
後、反応容器1内の圧力を所定の圧力(例えば27〔P
a〕)に低下させ、0.08〔W/cm2 〕の出力で高周波を印
加する。
First, the temperature of the wafer 6 is set to about 300 ° C. by heating the heater 8. Then, the inside of the reaction vessel 1 is evacuated to reduce the pressure inside the chamber, and the silane-containing compound and the oxidizing agent are introduced from the introduction pipe 2. In this example, SiH 4 is introduced as a silane-containing compound, and O 2 and COF 2 are introduced as oxidizing agents. At this time, SiH 4 and O 2 are 50 [SCCM]
COF 2 is introduced at 30 [SCCM]. After that, the pressure in the reaction vessel 1 is adjusted to a predetermined pressure (for example, 27 [P
a)) and apply a high frequency with an output of 0.08 [W / cm 2 ].

【0014】この高周波によつてプラズマが発生し、反
応容器1内に導入されたO2 及びCOF2 が乖離され
る。なおこのプラズマ中のOはFと反応し、多くはO−
F結合を含む反応種になる。続いてこのO−F結合を含
む反応種はSiH4 を活性化させて結合し、層間絶縁膜
14としてFを多く含むシリコン酸化膜が形成される。
このとき層間絶縁膜14の主な組成はSiOFとなる。
なおプラズマ中ではOとFとの結合が切れた状態、すな
わちO単独でも存在し得るが、このOはプラズマ内で炭
素(C)と酸化物(すなわちCO)を形成し、反応容器
1内から排気されるので層間絶縁膜14中に炭素が汚染
物として残るおそれをなくすことができる。
Plasma is generated by this high frequency, and O 2 and COF 2 introduced into the reaction vessel 1 are separated. O in this plasma reacts with F, and most of it is O-
It becomes a reactive species containing an F bond. Subsequently, the reactive species containing the O—F bond activates SiH 4 and bonds to form a silicon oxide film containing a large amount of F as the interlayer insulating film 14.
At this time, the main composition of the interlayer insulating film 14 is SiOF.
It should be noted that in plasma, the state where the bond between O and F is broken, that is, even O alone can exist, but this O forms carbon (C) and oxide (that is, CO) in the plasma, Since the air is exhausted, it is possible to eliminate the possibility that carbon remains in the interlayer insulating film 14 as a contaminant.

【0015】このように導入ガスに酸素とフツ素との化
合物ガスとしてCOF2 を用いたことにより、成膜状態
の良い層間絶縁膜を成長速度を低下させることなく成長
させることができる。また層間絶縁膜14の比誘電率は
3.3と低い値になつた。すなわちこの成膜条件を採用す
れば、汚染がない低誘電率の層間絶縁膜14を実現する
ことができる。
By using COF 2 as the compound gas of oxygen and fluorine as the introduction gas in this way, it is possible to grow an interlayer insulating film in a good film formation state without lowering the growth rate. The relative dielectric constant of the interlayer insulating film 14 is
It was as low as 3.3. That is, if this film forming condition is adopted, the interlayer dielectric film 14 having a low dielectric constant and no contamination can be realized.

【0016】(2−2)第2実施例 次に第2実施例の成膜条件を説明する。本例もAl配線
層間を平坦化した場合の例である。因にこの実施例で
は、導入する酸化剤としてO2 とNOF2 を用いること
を除き、他の導入条件は第1実施例の場合と同じであ
る。従つて層間絶縁膜14は第1実施例の場合と同様、
成膜状態の良い層間絶縁膜を成長速度を低下させること
なく成長できる。なおこの場合にも層間絶縁膜14の比
誘電率は 3.3であつた。またこの例の場合にはプラズマ
中に存在するOは窒素(N)と酸化物(すなわちNO)
を形成して反応容器1内から排気される。
(2-2) Second Embodiment Next, the film forming conditions of the second embodiment will be described. This example is also an example in which the Al wiring layers are flattened. Incidentally, in this embodiment, the other introduction conditions are the same as those in the first embodiment except that O 2 and NOF 2 are used as the oxidizing agents to be introduced. Therefore, the interlayer insulating film 14 is the same as in the case of the first embodiment.
It is possible to grow an interlayer insulating film having a good film formation state without lowering the growth rate. In this case as well, the relative dielectric constant of the interlayer insulating film 14 was 3.3. In the case of this example, O existing in the plasma is nitrogen (N) and oxide (that is, NO).
And is exhausted from inside the reaction vessel 1.

【0017】(2−3)第3実施例 続いて第3実施例の成膜条件を説明する。本例もAl配
線層間を平坦化する場合の例である。なおこの実施例で
は導入する酸化剤としてO2 とSOF2 を用いることを
除き、他の導入条件は第1実施例の場合と同じである。
ただしこの実施例の場合、成膜時に、超音波印加装置9
に超音波源10から 200〔kHz〕の超音波を反応容器1
内に印加する。これによりプラズマ中にあるSOF2
乖離が一段と促進され、O−F結合を有する反応種がよ
り多く生成され、層間絶縁膜14中に取り込まれる。す
なわち層間絶縁膜14中に取り込まれるフツ素の量を増
進できる。この結果、本成膜条件で成膜した層間絶縁膜
14の比誘電率は 3.2と一層低い値になる。
(2-3) Third Example Next, the film forming conditions of the third example will be described. This example is also an example of flattening the Al wiring layers. In this example, the other introducing conditions were the same as those in the first example except that O 2 and SOF 2 were used as the oxidizing agents to be introduced.
However, in the case of this embodiment, the ultrasonic wave applying device 9
200 [kHz] ultrasonic waves from the ultrasonic source 10 to the reaction vessel 1
Apply within. As a result, the dissociation of SOF 2 in the plasma is further promoted, more reactive species having OF bonds are generated, and are taken into the interlayer insulating film 14. That is, the amount of fluorine taken in the interlayer insulating film 14 can be increased. As a result, the relative dielectric constant of the interlayer insulating film 14 formed under the present film forming conditions becomes a lower value of 3.2.

【0018】(3)他の実施例 なお上述の実施例においては、反応容器1に導入するガ
スの種類、流量、圧力、温度、印加RF、超音波出力を
それぞれ第1、第2及び第3実施例で説明した条件に設
定する場合について述べたが、本発明はこれに限らず、
これら趣旨を逸脱しない範囲で変更し得る。例えばシラ
ン含有化合物としてSiH4 を用いたが、高次シランや
絶縁膜形成が可能である有機金属アルコキシドを用いて
も良い。またこの他、TEOS(tetraethoxysilane
)、OMCTS(octa methyl cyclo siloxane)、T
POS(tetra propoxy silane)、TMCTS(tetra
methyl cyclo tetra siloxane )等でも良い。また酸化
剤としても酸素の他、オゾン、水、酸化窒素等を用いて
も良い。また上述の実施例においては、いずれも図1に
示す構成のプラズマCVD装置について述べたが、本発
明はこれに限らず、他の構成のプラズマCVD装置にも
広く適用し得る。
(3) Other Embodiments In the above embodiment, the type, flow rate, pressure, temperature, applied RF, and ultrasonic output of the gas introduced into the reaction vessel 1 are set to the first, second and third, respectively. Although the case of setting the conditions described in the embodiment is described, the present invention is not limited to this,
Modifications can be made without departing from these spirits. For example, SiH 4 was used as the silane-containing compound, but higher order silane or an organic metal alkoxide capable of forming an insulating film may be used. In addition, TEOS (tetraethoxysilane)
), OMCTS (octa methyl cyclo siloxane), T
POS (tetra propoxy silane), TMCTS (tetra
methyl cyclo tetra siloxane) or the like. In addition to oxygen, ozone, water, nitric oxide or the like may be used as the oxidizing agent. Further, in each of the above-described embodiments, the plasma CVD apparatus having the configuration shown in FIG. 1 has been described, but the present invention is not limited to this and can be widely applied to the plasma CVD apparatuses having other configurations.

【0019】[0019]

【発明の効果】上述のように本発明によれば、電子回路
を形成した基板上に少なくとも1層以上の絶縁体薄膜を
化学的気相成長法にて形成する方法において、化学的気
相成長に用いる少なくとも一つのガスとしてフツ素と酸
素の化合物を用いるようにしたことにより、比誘電率が
低くかつガスの構成分子による汚染のない膜を容易に成
膜することができる半導体装置製造方法を実現すること
ができる。
As described above, according to the present invention, in a method of forming at least one insulating thin film on a substrate having an electronic circuit formed thereon by chemical vapor deposition, chemical vapor deposition By using a compound of fluorine and oxygen as at least one gas used for the above, a semiconductor device manufacturing method capable of easily forming a film having a low relative dielectric constant and no contamination by gas constituent molecules is provided. Can be realized.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明に係る半導体製造方法を用いる半導体製
造装置の一例を示す略線的断面図である。
FIG. 1 is a schematic cross-sectional view showing an example of a semiconductor manufacturing apparatus using a semiconductor manufacturing method according to the present invention.

【図2】本発明に係る半導体製造方法の処理工程を示す
略線図である。
FIG. 2 is a schematic diagram showing processing steps of a semiconductor manufacturing method according to the present invention.

【符号の説明】[Explanation of symbols]

1……反応容器、2……導入管、3……分散板、4……
シヤワーヘツド、5……高周波電源、6……ウエハ、7
……サセプタ、8……ヒータ、9……超音波印加装置、
10……超音波源。
1 ... Reaction container, 2 ... Introduction tube, 3 ... Dispersion plate, 4 ...
Shower head, 5 ... High frequency power supply, 6 ... Wafer, 7
...... Susceptor, 8 ... Heater, 9 ... Ultrasonic wave applying device,
10 ... Ultrasonic source.

───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.6 識別記号 庁内整理番号 FI 技術表示箇所 H01L 21/95 ─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. 6 Identification code Office reference number FI technical display location H01L 21/95

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】電子回路を形成した基板上に少なくとも1
層以上の絶縁体薄膜を化学的気相成長法にて形成する方
法において、 上記化学的気相成長に用いる少なくとも一つのガスとし
てフツ素と酸素の化合物を用いることを特徴とする半導
体装置製造方法。
1. At least one substrate on which an electronic circuit is formed.
A method for forming an insulating thin film having a number of layers or more by a chemical vapor deposition method, characterized in that a compound of fluorine and oxygen is used as at least one gas used for the chemical vapor deposition, .
【請求項2】上記フツ素と酸素の化合物は、COF2
NOF、NOF2 、SO2 2 、SOF2 のガス群から
選ばれた少なくとも一つのガスであることを特徴とする
請求項1に記載の半導体装置製造方法。
2. The compound of fluorine and oxygen is COF 2 ,
2. The method of manufacturing a semiconductor device according to claim 1, wherein the gas is at least one gas selected from the group consisting of NOF, NOF 2 , SO 2 F 2 , and SOF 2 .
【請求項3】上記化学的気相成長の際、超音波を印加す
ることを特徴とする請求項1に記載の半導体装置製造方
法。
3. The method of manufacturing a semiconductor device according to claim 1, wherein ultrasonic waves are applied during the chemical vapor deposition.
JP35144795A 1995-12-26 1995-12-26 Manufacture of semiconductor device Pending JPH09181176A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP35144795A JPH09181176A (en) 1995-12-26 1995-12-26 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP35144795A JPH09181176A (en) 1995-12-26 1995-12-26 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPH09181176A true JPH09181176A (en) 1997-07-11

Family

ID=18417356

Family Applications (1)

Application Number Title Priority Date Filing Date
JP35144795A Pending JPH09181176A (en) 1995-12-26 1995-12-26 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPH09181176A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN116837354A (en) * 2023-09-01 2023-10-03 上海陛通半导体能源科技股份有限公司 Semiconductor heating device and vapor deposition apparatus
CN118028784A (en) * 2024-04-09 2024-05-14 陛通半导体设备(苏州)有限公司 Wafer heating plate and semiconductor device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN116837354A (en) * 2023-09-01 2023-10-03 上海陛通半导体能源科技股份有限公司 Semiconductor heating device and vapor deposition apparatus
CN116837354B (en) * 2023-09-01 2023-11-24 上海陛通半导体能源科技股份有限公司 Semiconductor heating device and vapor deposition apparatus
CN118028784A (en) * 2024-04-09 2024-05-14 陛通半导体设备(苏州)有限公司 Wafer heating plate and semiconductor device

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