JPH0616505B2 - Insulation film formation method - Google Patents

Insulation film formation method

Info

Publication number
JPH0616505B2
JPH0616505B2 JP62206087A JP20608787A JPH0616505B2 JP H0616505 B2 JPH0616505 B2 JP H0616505B2 JP 62206087 A JP62206087 A JP 62206087A JP 20608787 A JP20608787 A JP 20608787A JP H0616505 B2 JPH0616505 B2 JP H0616505B2
Authority
JP
Japan
Prior art keywords
film
substrate
reaction
insulating film
silicon oxide
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP62206087A
Other languages
Japanese (ja)
Other versions
JPS6448425A (en
Inventor
舜平 山崎
健二 伊藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Semiconductor Energy Laboratory Co Ltd
Original Assignee
Semiconductor Energy Laboratory Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Semiconductor Energy Laboratory Co Ltd filed Critical Semiconductor Energy Laboratory Co Ltd
Priority to JP62206087A priority Critical patent/JPH0616505B2/en
Publication of JPS6448425A publication Critical patent/JPS6448425A/en
Publication of JPH0616505B2 publication Critical patent/JPH0616505B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Landscapes

  • Local Oxidation Of Silicon (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Formation Of Insulating Films (AREA)

Description

【発明の詳細な説明】 〔イ〕発明の利用分野 本発明は有機珪素化合物、例えばテトラエトキシシラン
(TEOS)を用いてプラズマ化学気相反応により被形
成面上に高速でしかも高品質の絶縁膜を減圧下で形成す
る方法を提供するものである。
DETAILED DESCRIPTION OF THE INVENTION [b] Field of Use of the Invention The present invention uses an organic silicon compound, for example, tetraethoxysilane (TEOS), to form a high-speed and high-quality insulating film on a surface to be formed by plasma chemical vapor reaction. The present invention provides a method for forming under pressure.

〔ロ〕従来の技術 最近LSIの高集積化,大規模化に伴いICチップに占
める配線の面積が増えている。
[B] Prior Art Recently, the area of wiring occupied in an IC chip is increasing with the high integration and large scale of LSI.

そのため,配線の多層化,パターン,配線巾の微細化が
ますます重要となりつつある。
Therefore, it is becoming more and more important to make the wiring multi-layered and the pattern and wiring width finer.

配線や接続孔などのパターンの横方向寸法は,スケーリ
ング則に従って,微細化するのに対し,電極配線や絶縁
膜の厚さなど縦方向寸法は,配線抵抗、浮遊容量,絶縁
耐圧や耐マイグレーション性など素子のスペックを満た
す必要があり,横方向並みに微細化することは容易でな
い。
The horizontal dimension of the pattern such as wiring and connection hole is miniaturized according to the scaling rule, while the vertical dimension such as the thickness of electrode wiring and insulating film is wiring resistance, stray capacitance, withstand voltage and migration resistance. It is necessary to meet the device specifications, and it is not easy to miniaturize it in the horizontal direction.

さらに配線や接続孔のパターンは微細化の為異方性の強
いエッチングにより形成されるのでLSIのパターンの
端面形状は急唆となる。
Further, since the patterns of the wirings and the connection holes are formed by etching with strong anisotropy for miniaturization, the shape of the end face of the LSI pattern becomes sharp.

また,配線が多層となるため,当然LSIチップ表面の
凹凸が激しくなる。このようなLSIチップ表面の凹凸
はパターンの加工精度の低下,配線の断線等信頼性の低
下を招くことになる。
Further, since the wiring is multi-layered, the unevenness on the LSI chip surface is naturally severe. Such unevenness on the surface of the LSI chip leads to a decrease in pattern processing accuracy and a decrease in reliability such as disconnection of wiring.

このような問題を解決する手段として,層間絶縁膜を平
坦化する技術が重要視されている。
As a means for solving such a problem, a technique for flattening an interlayer insulating film is emphasized.

この層間絶縁膜を作製する方法としては,従来の化学的
気相反応(以下CVD という)による薄膜形成技術として
熱CVD 法が広く知られている。この熱CVD 法は反応室内
に導入した被膜形成用反応気体に熱エネルギを加え、該
気体を分解または活性化させ、被膜を形成するものであ
った。この場合、反応のためのエネルギ供給は熱のみで
あるため、その温度も高く、500 〜800 ℃の範囲で行わ
れていた。
As a method of forming this interlayer insulating film, the thermal CVD method is widely known as a conventional thin film forming technology by chemical vapor reaction (hereinafter referred to as CVD). In this thermal CVD method, heat energy is applied to a reaction gas for film formation introduced into a reaction chamber to decompose or activate the gas to form a film. In this case, since the energy supply for the reaction is only heat, the temperature is also high, and it is performed in the range of 500 to 800 ° C.

このため、高温に弱い半導体素子を作製することは不可
能であり、次世代LSI 素子として有望な低温で被膜を形
成する技術が求められていた。
For this reason, it is impossible to fabricate a semiconductor element that is susceptible to high temperatures, and there has been a demand for a technique for forming a film at a low temperature, which is promising as a next-generation LSI element.

またより低温で被膜を形成する方法としてプラズマCVD
法が知られている。この場合は反応室内に導入した反応
性気体に外部より高周波電力を印加し、該気体を分解、
活性化せしめ、加熱された基板上に被膜を形成するもの
である。この場合、加熱温度は200 〜400 ℃の範囲であ
るが、プラズマという高エネルギ状態をとるため、分
解、活性化された反応種が被膜形成面上をたたき、損傷
を与えてしまうため、形成された被膜と下地基板との界
面において良好な特性が得られにくいという欠点を有し
ていた。この場合も熱CVD のときと同様にGaAs等の化合
物半導体には使用不可能であった。
In addition, plasma CVD is used as a method to form a film at a lower temperature.
The law is known. In this case, high frequency power is applied to the reactive gas introduced into the reaction chamber from the outside to decompose the gas,
It is activated to form a film on a heated substrate. In this case, the heating temperature is in the range of 200 to 400 ℃, but because of the high energy state of plasma, the reactive species decomposed and activated hit the film-forming surface and damage it, so that it is formed. Moreover, it has a drawback that it is difficult to obtain good characteristics at the interface between the coating film and the base substrate. In this case as well, as in the case of thermal CVD, it could not be used for compound semiconductors such as GaAs.

一方、最近、これらの問題を解決する技術として光CVD
法がある。この方法は反応性気体に対して、光エネルギ
を与えて分解、活性化させて、基板上に被膜を形成する
ものであり、熱CVD 法のように高温にする必要がなく、
またプラズマCVD 法のように物理的に下地物質にダメー
ジを与えず、理想的な成膜法である。
On the other hand, recently, as a technique to solve these problems, photo CVD
There is a law. This method applies light energy to a reactive gas to decompose and activate it to form a film on the substrate, which does not require high temperature as in the thermal CVD method.
Moreover, unlike the plasma CVD method, it is an ideal film formation method without physically damaging the underlying material.

上述のような作製方法により形成される絶縁膜を,平坦
化する方法としては有機シリコン化合物の液体を凹凸形
状を有する基板面上に塗布し,加熱処理を施しガラス化
する方法,凹凸形状を有する絶縁膜にエッチバックを施
し,凹凸の形状をなめらかにするエッチバック法等の種
々の方法が行われている。これら平坦な層間絶縁膜を形
成する方法はいづれも,絶縁膜を形成する工程と平坦化
する工程とに分かれており,工程を増やし,作製装置の
数を増やしコスト高につながっていた。
As a method of flattening the insulating film formed by the above-described manufacturing method, a method of applying a liquid of an organic silicon compound onto a substrate surface having an uneven shape and subjecting it to vitrification by heat treatment, or having an uneven shape Various methods such as an etch-back method, in which the insulating film is etched back to smooth the uneven shape, are used. Each of these methods for forming a flat interlayer insulating film is divided into a step of forming an insulating film and a step of flattening, resulting in an increase in the number of steps, an increase in the number of manufacturing apparatuses, and a high cost.

〔ハ〕本発明の目的 本発明はこれら従来の問題点を解決するものであり急唆
な段差のない層間絶縁膜を形成することを目的としてい
る。
[C] Object of the present invention The present invention solves these conventional problems, and an object of the present invention is to form an interlayer insulating film without abrupt steps.

〔本発明の構成〕[Configuration of the present invention]

本発明はTEOSとN2Oとの反応を用いたプラズマCV
D法にて,さらに所定の膜厚にまで酸化珪素被膜を形成
した後同一反応室内にてエッチバック処理を施すことを
特徴とするものである。
The present invention is a plasma CV using the reaction of TEOS and N 2 O.
According to the method D, a silicon oxide film is further formed to a predetermined film thickness, and then an etchback process is performed in the same reaction chamber.

さらに必要に応じてこれらの工程を繰り返し急唆な凹凸
段差のない絶縁膜を形成するものである。
Further, if necessary, these steps are repeated to form an insulating film having no sudden uneven steps.

すなわち,絶縁膜形成した後,被処理基板へ出すことな
く,急唆な凹凸段差のない酸素珪素絶縁膜を形成する方
法を提供するものであります。
In other words, it provides a method for forming an oxygen silicon insulating film without forming abrupt uneven steps without forming it on the substrate to be processed after forming the insulating film.

以下に実施例を示し、本発明に示された酸素珪素被膜の
作製方法を示す。
Examples will be shown below to show a method for producing the oxygen silicon film shown in the present invention.

実施例1 第2図に本実験で用いた酸化珪素被膜形成用装置の概略
図を示す。
Example 1 FIG. 2 shows a schematic view of a silicon oxide film forming apparatus used in this experiment.

図面において、反応室(1)内の紫外光源室(4)内には複数
の紫外光源(6)が設置されており、前記紫外光源室(4)は
反応室(1)の圧力とほぼ等しくなるように調整されてい
る。また被膜形成用基板(3)は基板加熱用ヒータを兼ね
た基板支持体(2)により反応室(1)内に被膜形成面を下向
きになるように設置されている。本装置では成膜時に発
生するフレーク等のゴミが基板に付着しないようにデポ
ジションアップ方式を採用した。
In the drawing, a plurality of ultraviolet light sources (6) are installed in the ultraviolet light source chamber (4) in the reaction chamber (1), and the ultraviolet light source chamber (4) is almost equal to the pressure in the reaction chamber (1). Has been adjusted to The film-forming substrate (3) is installed in the reaction chamber (1) with the film-forming surface facing downward by the substrate support (2) which also functions as a substrate heating heater. This equipment uses a deposition-up method so that dust such as flakes generated during film formation does not adhere to the substrate.

また反応性気体のうち、珪化物気体及び酸化物気体は配
管内でMIX されガスノズル(7)より反応室内へ導入し基
板(3)近くで混合するようになっている。光化学気相反
応を行う紫外光源(6)より照射される紫外光は透過窓(5)
を通って反応性気体に照射される直接励起法を採用し
た。また、透過窓(5)上に被膜が形成されることを防止
するための低蒸気圧のオイルをコートせずに反応を行っ
た。特に本発明の場合、酸化珪素膜を作製するため、透
過窓上に被膜が形成されても紫外光は十分透過するた
め、特にその必要はなかった。
Among the reactive gases, the silicide gas and the oxide gas are mixed in the pipe, introduced into the reaction chamber through the gas nozzle (7), and mixed near the substrate (3). Ultraviolet light emitted from an ultraviolet light source (6) that undergoes a photochemical vapor phase reaction is transmitted through a transmission window (5).
A direct excitation method was adopted in which the reactive gas was irradiated through the glass. In addition, the reaction was carried out without coating low vapor pressure oil for preventing the formation of a film on the transmission window (5). In particular, in the case of the present invention, since a silicon oxide film is formed, even if a coating film is formed on the transmission window, ultraviolet light is sufficiently transmitted, and thus it is not particularly necessary.

さらに,透外光透過窓(5) の上は,エッチング用のメッ
シュ電極(8) が載せられている。このメッシュ電極(8)
には,基板支持体(2) との間に電源(9) により高周波電
力を印加可能なように構成されており,必要に応じてメ
ッシュ電極(8) と基板支持体(2) 間に電力及びバイアス
電圧を加え透過光窓(5) のエッチング,被処理基板(3)
のエッチバックが同一反応室内にて行なえる構成となっ
ている。
Furthermore, a mesh electrode (8) for etching is placed on the transparent window (5). This Mesh Electrode (8)
Is configured so that high-frequency power can be applied between the substrate support (2) and the power supply (9). If necessary, power can be applied between the mesh electrode (8) and the substrate support (2). And applying bias voltage, etching of transmitted light window (5), substrate to be processed (3)
Etching back can be done in the same reaction chamber.

本装置を用いて、第1図(A)に示すような凹凸を有す
る基板に反応圧力1500Pa〜7000Pa、(11〜53Torr)基板温
度200 ℃〜400 ℃、投入紫外光源電力13.56 MHz,200W
〜300Wの条件下にて反応性気体としてモノシランと亜酸
化窒素との割合を変化させて酸化珪素被膜を形成した。
Using this device, the reaction pressure is 1500 Pa to 7000 Pa, (11 to 53 Torr), the substrate temperature is 200 ℃ to 400 ℃, and the input ultraviolet light source power is 13.56 MHz, 200 W on a substrate having irregularities as shown in FIG. 1 (A).
A silicon oxide film was formed by changing the ratio of monosilane and nitrous oxide as a reactive gas under the condition of ~ 300W.

光化学気相反応の場合、酸化性気体はその活性化される
割合が高い為、珪素量に対してN2O の比を0.005 から〜
0.05の範囲で若干過剰に加え、単結晶珪素半導体基板上
に形成し、エリプソメータにて膜厚と屈折率の測定を行
った。SiH4とN2O の反応は例えば紫外光源として低圧水
銀ランプの185nmと254nmの共鳴線を使うと光子エネ
ルギーはそれぞれ6.eV(153Kcal/mol)4.9eV(112.5Kcal/m
ol)であり反応性気体分子に吸収が起こり得れば原子間
結合エネルギーを切ることは容易である。
In the case of photochemical gas phase reaction, the oxidizing gas has a high activation rate, so the ratio of N 2 O to the amount of silicon is 0.005 to
It was added in a slight excess in the range of 0.05, formed on a single crystal silicon semiconductor substrate, and the film thickness and refractive index were measured by an ellipsometer. The reaction between SiH 4 and N 2 O is 6.eV (153Kcal / mol) 4.9eV (112.5Kcal / m) when the resonance line of 185nm and 254nm of a low pressure mercury lamp is used as an ultraviolet light source, respectively.
ol), it is easy to cut the interatomic bond energy if absorption can occur in the reactive gas molecule.

各原子結合エネルギーを以下に示す。Each atomic bond energy is shown below.

Si−H 74.6Kcal/mol Si−Si 76 Kcal/mol H−N 86 Kcal/mol H−H 104 Kcal/mol Si−N 105 Kcal/mol O−O 119 Kcal/mol N−O 149 Kcal/mol Si−O 192 Kcal/mol N−N 227 Kcal/mol SiH4分子の光吸収端は185nmより短波長側にピークを
もっているが若干の光吸収は行われていると考える。
Si-H 74.6 Kcal / mol Si-Si 76 Kcal / mol H-N 86 Kcal / mol H-H 104 Kcal / mol Si-N 105 Kcal / mol O-O 119 Kcal / mol N-O 149 Kcal / mol The light absorption edge of Si-O 192 Kcal / mol N-N 227 Kcal / mol SiH 4 molecule has a peak on the shorter wavelength side than 185 nm, but it is considered that some light absorption is performed.

一方N2O の光分解反応は次の過程が考えられる。On the other hand, the photolysis reaction of N 2 O is considered to be the following process.

N2O +hr(185nm)→N2+O(1D) 活性化されたO(1D)がSiH4分子にアタックすると結合が
弱いSi−Hは解離され、酸素ラジカルと置換されSi−O結
合が形成される。
N 2 O + hr (185nm) → N 2 + O ( 1 D) When activated O ( 1 D) attacks SiH 4 molecule, weak bond Si−H is dissociated and replaced with oxygen radical to replace Si−O. A bond is formed.

SiH4/N2O比を0.005から0.05の範囲での酸素珪素
被膜の屈折率、赤外吸収から次の反応が考えられる。
The following reactions can be considered from the refractive index and infrared absorption of the oxygen-silicon coating in the range of SiH 4 / N 2 O of 0.005 to 0.05.

SiH4+2N2O→SiO2+2N2 +2H2 ヒドラジン、アンモニアの生成も考えられるが本分析結
果からは考えにくいといえる。
The formation of SiH 4 + 2N 2 O → SiO 2 + 2N 2 + 2H 2 hydrazine and ammonia may be considered, but it is difficult to think from the results of this analysis.

第3図は反応圧力に対する成膜速度の関係を示してい
る。ガス組成比としてはSiH4/N2O 比0.01基板温度400
℃、投入紫外光源電力13.56MHz、300 Wの成膜条件下で
行った。
FIG. 3 shows the relationship between the reaction pressure and the film formation rate. Gas composition ratio is SiH 4 / N 2 O ratio 0.01 Substrate temperature 400
The film was formed under the conditions of a temperature of 300 ° C., an ultraviolet light source power of 13.56 MHz and a power of 300 W.

反応圧力に上げていくにしたがって単位時間当たりに気
相中に存在する原料(反応)ガスが増加し、成膜に寄与
する活性種が増え、成膜速度は増加するが20〜25torr付
近にピークを持ち、それ以上の領域では活性種が他分子
と衝突する回数が増え成膜に寄与しない(例えば2次生
成物になる等)ことにより成膜速度が低下することも予
想される。
As the reaction pressure increases, the amount of raw material (reaction) gas present in the gas phase per unit time increases, the number of active species that contribute to film formation increases, and the film formation rate increases, but peaks near 20-25 torr. In other regions, the number of times that the active species collide with other molecules increases and it does not contribute to film formation (for example, it becomes a secondary product), and it is expected that the film formation rate will decrease.

すなわち反応圧力に於いては最適領域が存在することが
考えられる。
That is, it is considered that there is an optimum region in the reaction pressure.

第4図はTEOSと酸化窒素との反応を用いたプラズマ
CVD法において高周波電力密度を可変した時の成膜速
度を示している。
FIG. 4 shows the film formation rate when the high frequency power density was varied in the plasma CVD method using the reaction of TEOS and nitric oxide.

反応圧力は0.4torr,基板温度は200 ℃でありバブリン
グ用キャリアガスの亜酸化窒素流量は100SCCM である。
The reaction pressure is 0.4 torr, the substrate temperature is 200 ° C, and the nitrous oxide flow rate of the bubbling carrier gas is 100 SCCM.

この可変範囲内では高周波電力密度に対しリニアな増加
傾向を示している。
Within this variable range, there is a linear increasing tendency with respect to the high frequency power density.

即ちTEOSの供給律速にはなってない。That is, the rate of TEOS supply is not limited.

TEOSは普通600 ℃以下では熱分解しないので反応空
間に導入される際,液体状もしくは粘性の高いガス状態
で基板表面,あるいは気相中に存在することから基板温
度が低く高周波電力密度が小さい条件下では良好なステ
ップカバレージ性を有するが反面,膜質は−OH基やC
が膜中に残り必ずしも良好とは言えない。
TEOS usually does not thermally decompose below 600 ° C, so when it is introduced into the reaction space, it exists on the substrate surface or in the gas phase in a liquid or highly viscous gas state, so that the substrate temperature is low and the high frequency power density is small. Although it has good step coverage under the following conditions, the film quality is -OH group or C
Remains in the film and is not necessarily good.

一方,基板温度が高く高周波電力密度が大きい条件下で
はステップカバレージ性は若干低下するが,膜質は改善
される。しかし,Al上にヒロックの発生が多くなり問
題となる。
On the other hand, under the condition that the substrate temperature is high and the high frequency power density is large, the step coverage is slightly reduced, but the film quality is improved. However, hillocks are often generated on Al, which is a problem.

以上から基板温度と高周波電力密度の2つのパラメータ
に最適な条件が存在することが考えられる。
From the above, it is considered that there are optimum conditions for the two parameters of the substrate temperature and the high frequency power density.

ある反応圧力において基板温度はあまり上げず粘性流動
を促進させ膜質は高周波電力と基板にバイアス電力を加
えることで安定化がはかれることが判明した。
It was found that at a certain reaction pressure, the substrate temperature was not raised too much, the viscous flow was promoted, and the film quality was stabilized by applying high frequency power and bias power to the substrate.

尚,ここでキャリアガスとして用いた亜酸化窒素は形成
される酸化珪素被膜の酸素供給源でもある。
The nitrous oxide used as the carrier gas here is also an oxygen supply source for the silicon oxide film formed.

第5図はプラズマCVD法において,亜酸化窒素の流量
を可変した時の成膜速度を示している。
FIG. 5 shows the film formation rate when the flow rate of nitrous oxide was varied in the plasma CVD method.

反応圧力は0.4torr,基板温度は200 ℃であり,高周波
電力密度は0.35W/cmある。亜酸化窒素の流量を5
倍に増加しても成膜速度は15%程度しか増加しない。
すなわち,TEOSの分解によって酸化珪素膜形成に必
要な酸素は十分供給されていることがわかる。さらに本
発明に示す如く酸化窒素を用いることにより、酸化珪素
膜中に窒素をSi−N結合を有して存在させるため耐ア
ルカリ性のブロッキング効果が向上し、有効であった。
また反応が表面反応が多くかつラジカルの寿命が長くな
り、下地の凹凸に対しても十分凹部に酸化珪素被膜を形
成させることができた。
The reaction pressure is 0.4 torr, the substrate temperature is 200 ° C, and the high frequency power density is 0.35 W / cm 2 . Nitrous oxide flow rate 5
Even if it is doubled, the film forming rate is increased only by about 15%.
That is, it is understood that the oxygen necessary for forming the silicon oxide film is sufficiently supplied by the decomposition of TEOS. Further, by using nitric oxide as shown in the present invention, nitrogen is allowed to exist in the silicon oxide film with Si-N bond, and the blocking effect of alkali resistance is improved, which is effective.
Further, the reaction was surface reaction and the life of radicals was long, and it was possible to form a silicon oxide film in the recesses sufficiently even for the unevenness of the base.

第6図は酸化珪素被膜を六フッ化イオウを用いてプラズ
マ,エッチングを行った際の高周波電力密度を可変した
時のエッチング速度である。反応圧力は0.4torr,基板
温度は200 ℃,SF流量は25SCCMである。0.56W/c
で500 Å/min程度が得られ十分エッチバックプ
ロセスに使えてなおかつ基板に負のバイアス電力を加え
ることで、等方性あるいは異方性のエッチング形状のコ
ントロールができることが判明した。
FIG. 6 shows the etching rate when the high frequency power density was varied when the silicon oxide film was plasma-etched using sulfur hexafluoride. The reaction pressure is 0.4 torr, the substrate temperature is 200 ° C, and the SF 6 flow rate is 25 SCCM. 0.56W / c
It has been found that an isotropic or anisotropic etching shape can be controlled by applying a negative bias power to the substrate, which is sufficient for the etch-back process because it can obtain about 500 Å / min in m 2 .

第7図は,基板温度を可変した時のエッチング速度であ
る。
FIG. 7 shows the etching rate when the substrate temperature is changed.

反応圧力0.4torr 高周波電力密度0.56W/cm,SF
流量25SCCMでは基板温度依存性はほとんどなく,高周
波電力密度でほぼ決まってしまうと考えられる。
Reaction pressure 0.4 torr High frequency power density 0.56 W / cm 2 , SF
At 6 flow rate of 25 SCCM, there is almost no substrate temperature dependence, and it is considered that the high frequency power density determines the temperature.

層間絶縁膜を連続形成する際のエッチグ工程ではプロセ
スに選択性がもてる為,基板温度は重要なパラメータの
1つであるといえる。
It can be said that the substrate temperature is one of the important parameters because the process has selectivity in the etching process when the interlayer insulating film is continuously formed.

このような光CVD法にて,第1図(A)に示すような
凹凸形状を有する基板上に酸化珪素被膜を前述の条件で
約5000Å程度形成した。
By such a photo-CVD method, a silicon oxide film was formed on the substrate having the uneven shape as shown in FIG.

この基板上の凸部は、高さ1μm、程度スペース0.8
μmの形状を有していた。この基板上にまず光CVD法
にて酸化珪素被膜(10)を形成したので,この凹凸形状を
均一におおうことができた。(第1図(B)) この後 反応室内の圧力を10Paに調整し、前述の透過光
窓(5) 上のメッシュ電極(8) と基板支持体(2) の間に電
源(9) により高周波電力例えば13.56MHzの電力を80W 印
加した。反応気体はTEOS/N2Oとしバブリング用N2O 流量
は100SCCM でその他の条件は光CVDと同様で行いプラ
ズマCVD法にて,酸化珪素被膜(11)を約1.5μm〜
2.0μm形成した(第1図(C))このプラズマCV
D法による酸化珪素形成はステップカバレージ性は光C
VDに比べて若干おとるが,成膜速度が0.5〜1μm
/分と速く,生産性に富む。
The convex portion on this substrate has a height of 1 μm and a space of about 0.8.
It had a shape of μm. Since the silicon oxide film (10) was first formed on this substrate by the photo-CVD method, this uneven shape could be uniformly covered. (Fig. 1 (B)) After that, the pressure in the reaction chamber was adjusted to 10 Pa, and a power source (9) was used between the mesh electrode (8) on the transmitted light window (5) and the substrate support (2). High frequency power, for example, 13.56 MHz power of 80 W was applied. The reaction gas is TEOS / N 2 O, the flow rate of N 2 O for bubbling is 100 SCCM, and other conditions are the same as the photo-CVD, and the silicon oxide film (11) is about 1.5 μm by plasma CVD method.
This plasma CV was formed with a thickness of 2.0 μm (FIG. 1 (C)).
Silicon oxide formation by the D method has a step coverage of light C
It is slightly slower than VD, but the film formation rate is 0.5-1 μm
/ Min, fast and highly productive.

第1図(C)のように凹凸をおおって酸化珪素被膜を厚
く形成した後,反応室内の反応性ガスを排気して除去し
た後,エッチング用気体であるハロゲン化物気体例えば
SF6,NF3,CF4,CF3H等を反応室内に導入し,圧力を10Paに
調整して,メッシュ電極(8) と基板支持体(2) 間に電力
を印加しプラズマ放電を起こし,形成された被膜(11)の
エッチングを行い凹凸段差の急唆な部分をなくした。
(第1図(D))この時、同時にメッシュ電極(8) と基
板支持体(2) の間にバイアス電圧を加えるとエッチング
により凹凸段差の形状をコントロールすることができ
た。すなわち基板側に負のバイアス電圧を加えると凹凸
段差がよりなめらかにすることができた。
As shown in FIG. 1 (C), after a silicon oxide film is formed thickly so as to cover the irregularities, the reactive gas in the reaction chamber is exhausted and removed, and then a halide gas such as an etching gas is used.
SF 6 , NF 3 , CF 4 , CF 3 H, etc. were introduced into the reaction chamber, the pressure was adjusted to 10 Pa, and power was applied between the mesh electrode (8) and the substrate support (2) to cause plasma discharge. The formed coating film (11) was etched to eliminate the abrupt portions of uneven steps.
(FIG. 1 (D)) At this time, if a bias voltage was applied between the mesh electrode (8) and the substrate support (2) at the same time, the shape of the uneven step could be controlled by etching. That is, when a negative bias voltage was applied to the substrate side, the uneven step could be made smoother.

この処理を行い約0.2〜0.5μmエッチングを行い
第1図(D)に示すように凹凸段差の急唆な部分を取り
除いた。このようにして同一装置,同一反応室にて急唆
な段差のない層間絶縁膜を作製することができた。
This treatment was carried out to perform etching of about 0.2 to 0.5 μm, and as shown in FIG. In this way, an interlayer insulating film without abrupt steps could be produced in the same device and reaction chamber.

また,エッチング処理時に,同時に反応室内壁及び透過
光窓(5) 上についた被膜を除去することができ,装置を
クリーニングのために停止することも必要がなく生産性
向上につながった。
In addition, the coating on the reaction chamber inner wall and the transmitted light window (5) could be removed at the same time during the etching process, and it was not necessary to stop the device for cleaning, which led to improved productivity.

また本実施例においては酸化珪素被膜の作製をプラズマ
CVD法と光CVD法とを併用したが,光CVD法のみ
で作製してもいいことは明らかである。
Further, although the plasma CVD method and the photo-CVD method are used in combination in the production of the silicon oxide film in the present embodiment, it is obvious that the photo-CVD method alone may be employed.

実施例2 第1図(A)に示す基板上に実施例1と全く同じ条件下
にて、光CVD法にて酸化珪素被膜を約5000Å形成した
後,反応室内の反応性気体を入れかえ,実施例1と同様
の条件下にてエッチバックを約500 Å程度施した。その
後さらに反応性気体を入れかえ,同様の条件にて再度光
CVD法にて酸化珪素被膜を形成する,このようなサイ
クルを複数回繰り返して実施例1と同様な急唆な凹凸段
差のない層間絶縁膜を形成することができた。
Example 2 Under the same conditions as in Example 1 on the substrate shown in FIG. 1 (A), a silicon oxide film was formed to about 5000 Å by a photo-CVD method, and then a reactive gas in the reaction chamber was replaced. Under the same conditions as in Example 1, about 500 Å of etch back was performed. After that, a reactive gas is further replaced, and a silicon oxide film is formed again by the photo-CVD method under the same conditions. Such a cycle is repeated a plurality of times, and the interlayer insulation without sharp irregularities and steps as in Example 1 is performed. A film could be formed.

本実施例においては光CVDによる被膜形成とプラズマ
エッチングとの交互に行うので被膜形成により汚れた反
応室をエッチング工程によりクリーニングを同時に行な
えるという特徴を持つ。
In this embodiment, the film formation by photo-CVD and the plasma etching are alternately performed, so that the reaction chamber contaminated by the film formation can be simultaneously cleaned by the etching process.

なお、層間絶縁膜の積層構造に於いて最上部は光CVD 膜
であることが望ましいことをつけ加えておく。なぜなら
第2層目Al膜をスパッタ被着する際に、最上部がTEOS酸
化珪素膜では膜からの放出ガス(水分,H2 etc)によ
り、Alの膜質に悪影響をおよぼすおそれがあるからで
ある。
In addition, it should be added that it is desirable that the uppermost part of the laminated structure of the interlayer insulating film is a photo CVD film. This is because when the second layer Al film is sputter-deposited, the TEOS silicon oxide film at the uppermost portion may adversely affect the Al film quality due to the gas (moisture, H 2 etc.) emitted from the film. .

よって理想的な層間絶縁膜の積層構造としては光CVD 膜
/プラズマCVD 膜/光CVD 膜となる。
Therefore, the ideal laminated structure of the interlayer insulating film is photo CVD film / plasma CVD film / photo CVD film.

尚層間絶縁膜として重要な耐圧は1層目の光CVD 膜でも
たせることは十分可能である。
The withstand voltage, which is important as an interlayer insulating film, can be sufficiently given by the photo CVD film of the first layer.

参考までに光CVD 膜の耐圧は5MV/cm以上である。For reference, the breakdown voltage of the photo CVD film is 5 MV / cm or more.

以上の実施例において絶縁膜として酸化珪素被膜を開示
したがその他の絶縁膜,窒化珪素膜,PSG,BPS
G,アルミナ膜でも応用可能である。
Although a silicon oxide film is disclosed as an insulating film in the above embodiments, other insulating films, silicon nitride films, PSG, BPS are disclosed.
It is also applicable to G and alumina films.

さらに反応性気体としてシランのみでなく、その他のポ
リシラン類(SinH2n+2),ジメチルシラン,テトラメチ
ルシラン等の有機珪素化合物(SiHr(CH4)4-n)を必要に
応じて使用することも可能である。
Further, not only silane but also other polysilanes (SinH 2n + 2 ), dimethylsilane, tetramethylsilane, and other organosilicon compounds (SiH r (CH 4 ) 4-n ) are used as a reactive gas as needed. It is also possible.

〔ホ〕効果 以上示したように、本発明は従来用いられていた条件と
は明らかに異なった条件下にて高速で、しかも高品質の
酸化珪素被膜の形成方法であり、LSI 、超LSI 等に使用
される層間絶縁膜にも光CVD 法にて形成された被膜で始
めて使用可能となった。
[E] Effect As described above, the present invention is a method for forming a high-quality and high-quality silicon oxide film under conditions that are clearly different from the conditions conventionally used, such as LSI, VLSI, etc. It became possible to use the interlayer insulating film used for the first time only by the film formed by the photo-CVD method.

本発明方法により,急唆な凹凸段差のない層間絶縁膜を
同一の装置の同一反応室内で行なえることができ,装置
コスト製造コストを下げることができた。
According to the method of the present invention, it is possible to form an interlayer insulating film having no abrupt unevenness in the same reaction chamber of the same device, and it is possible to reduce the manufacturing cost of the device.

また,エッチバック工程時に反応室内壁及び透過光窓の
エッチングも同時に行なえるという特徴を持つ。
In addition, it has the feature that the inner wall of the reaction chamber and the transmitted light window can be etched simultaneously during the etch back process.

【図面の簡単な説明】[Brief description of drawings]

第1図は本発明の層間絶縁膜作製の工程を示す。 第2図は本発明にて用いた装置の概略図を示す。 第3図は光CVD 法による酸化珪素被膜の反応圧力に対す
る成膜速度の関係を示す。 第4図はプラズマCVD 法による酸化珪素被膜の高周波電
力密度に対する成膜速度の関係を示す。 第5図はプラズマCVD 法による亜鉛化窒素流量に対する
成膜速度の関係を示す。 第6図は酸化珪素被膜の高周波電力密度に対するエッチ
ング速度の関係を示す。 第7図は酸化珪素被膜のプラズマエッチング時の基板温
度に対するエッチング速度の関係を示す。
FIG. 1 shows a step of producing an interlayer insulating film of the present invention. FIG. 2 shows a schematic view of the apparatus used in the present invention. FIG. 3 shows the relationship between the reaction pressure of the silicon oxide film formed by the photo-CVD method and the film formation rate. Figure 4 shows the relationship between the deposition rate and the high-frequency power density of a silicon oxide film formed by the plasma CVD method. Fig. 5 shows the relationship between the deposition rate and the flow rate of nitrogen-zinc oxide by the plasma CVD method. FIG. 6 shows the relationship between the etching rate and the high frequency power density of the silicon oxide film. FIG. 7 shows the relationship between the substrate temperature and the etching rate during plasma etching of the silicon oxide film.

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】有機珪素化合物と酸化窒素との反応を用い
たプラズマCVD法により、凹凸段差を有する基板表面
上に,酸化珪素絶縁膜を均一に形成する工程とを有する
ことを特徴とする絶縁膜形成方法。
1. An insulating process, which comprises a step of uniformly forming a silicon oxide insulating film on a substrate surface having uneven steps by a plasma CVD method using a reaction of an organic silicon compound and nitric oxide. Film forming method.
【請求項2】特許請求の範囲第1項において、プラズマ
CVD法には、テトラエトキシシラン(TEOS)とバ
ブリングガスとして亜酸化窒素を用いたことを特徴とし
た絶縁膜形成方法。
2. The method for forming an insulating film according to claim 1, wherein the plasma CVD method uses tetraethoxysilane (TEOS) and nitrous oxide as a bubbling gas.
【請求項3】特許請求の範囲第1項において、同一チャ
ンバー内で、プラズマCVD膜及びハロゲン化物気体を
用いてかつ負のバイアスを加えたプラズマエッチングに
よりエッチバックが連続で行えることを特徴とした絶縁
膜形成方法。
3. The etch back can be continuously performed in the same chamber by plasma etching using a plasma CVD film and a halide gas and applying a negative bias. Insulating film forming method.
JP62206087A 1987-08-18 1987-08-18 Insulation film formation method Expired - Lifetime JPH0616505B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62206087A JPH0616505B2 (en) 1987-08-18 1987-08-18 Insulation film formation method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62206087A JPH0616505B2 (en) 1987-08-18 1987-08-18 Insulation film formation method

Related Child Applications (2)

Application Number Title Priority Date Filing Date
JP7287857A Division JP2997743B2 (en) 1995-10-09 1995-10-09 Insulating film
JP7287856A Division JP2767572B2 (en) 1995-10-09 1995-10-09 Insulating film formation method

Publications (2)

Publication Number Publication Date
JPS6448425A JPS6448425A (en) 1989-02-22
JPH0616505B2 true JPH0616505B2 (en) 1994-03-02

Family

ID=16517598

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62206087A Expired - Lifetime JPH0616505B2 (en) 1987-08-18 1987-08-18 Insulation film formation method

Country Status (1)

Country Link
JP (1) JPH0616505B2 (en)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0828362B2 (en) * 1988-01-21 1996-03-21 松下電器産業株式会社 Method for manufacturing semiconductor device
US5022958A (en) * 1990-06-27 1991-06-11 At&T Bell Laboratories Method of etching for integrated circuits with planarized dielectric
DE4302860A1 (en) * 1993-01-22 1994-08-04 Chemie Linz Deutschland N-Cyclic and N, N'dicyclic ureas
AT400566B (en) * 1993-01-22 1996-01-25 Chemie Linz Gmbh Use and process for the preparation of N-cyclic and N,N'- dicyclic ureas
TW371796B (en) 1995-09-08 1999-10-11 Semiconductor Energy Lab Co Ltd Method and apparatus for manufacturing a semiconductor device
JP5225268B2 (en) * 2006-05-30 2013-07-03 アプライド マテリアルズ インコーポレイテッド A novel deposition plasma hardening cycle process to enhance silicon dioxide film quality
US8232176B2 (en) * 2006-06-22 2012-07-31 Applied Materials, Inc. Dielectric deposition and etch back processes for bottom up gapfill
US8980382B2 (en) 2009-12-02 2015-03-17 Applied Materials, Inc. Oxygen-doping for non-carbon radical-component CVD films
US9285168B2 (en) 2010-10-05 2016-03-15 Applied Materials, Inc. Module for ozone cure and post-cure moisture treatment
US10283321B2 (en) 2011-01-18 2019-05-07 Applied Materials, Inc. Semiconductor processing system and methods using capacitively coupled plasma
US9404178B2 (en) 2011-07-15 2016-08-02 Applied Materials, Inc. Surface treatment and deposition for reduced outgassing
US8889566B2 (en) 2012-09-11 2014-11-18 Applied Materials, Inc. Low cost flowable dielectric films
US9018108B2 (en) 2013-01-25 2015-04-28 Applied Materials, Inc. Low shrinkage dielectric films
US9412581B2 (en) 2014-07-16 2016-08-09 Applied Materials, Inc. Low-K dielectric gapfill by flowable deposition

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5987834A (en) * 1982-11-11 1984-05-21 Toshiba Corp Forming method of thin-film
JPH0691068B2 (en) * 1985-04-02 1994-11-14 株式会社日立製作所 Thin film formation method
JPS6428925A (en) * 1987-07-24 1989-01-31 Semiconductor Energy Lab Formation of insulating film

Also Published As

Publication number Publication date
JPS6448425A (en) 1989-02-22

Similar Documents

Publication Publication Date Title
US5290736A (en) Method of forming interlayer-insulating film using ozone and organic silanes at a pressure above atmospheric
KR100437068B1 (en) Method of forming a carbon silicon oxide
KR101732187B1 (en) METHOD OF FORMING CONFORMAL DIELECTRIC FILM HAVING Si-N BONDS BY PECVD
EP0519079A1 (en) Process for forming silicon oxide film
US20020160626A1 (en) Siloxan polymer film on semiconductor substrate
KR20060129471A (en) Method for producing silicon oxide film
JPH0616505B2 (en) Insulation film formation method
JPH11251308A (en) Low dielectric constant fluorinated amorphous carbon dielectric and formation method therefor
JPH04360533A (en) Chemical vapor deposition method
JP4825418B2 (en) Plasma chemical vapor deposition method for depositing silicon nitride or silicon oxynitride, method for producing layer structure, and layer structure
JPH077759B2 (en) Insulation film formation method
JPH0766186A (en) Anisotropic depositing method of dielectric
JP2997743B2 (en) Insulating film
JP3038473B2 (en) Insulating film forming method
JPH06163523A (en) Fabrication of semiconductor device
JP2767572B2 (en) Insulating film formation method
TW202236508A (en) Underlayer film for semiconductor device formation
JPH07288251A (en) Manufacture of semiconductor device
JPH09172010A (en) Layer insulating film
JP3134875B2 (en) Plasma gas phase reactor
JP3211955B2 (en) Interlayer insulating film and manufacturing method thereof
JP3167995B2 (en) Fabrication method of interlayer insulating film
JP2000311896A (en) Method for creating interlayer insulation film
KR0160916B1 (en) Method of manufacturing low dielectric late thin using sf6 gas
JPH09199501A (en) Process and apparatus for depositing stable fluorine-doped film by using sif4