JP2997743B2 - Insulating film - Google Patents

Insulating film

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Publication number
JP2997743B2
JP2997743B2 JP7287857A JP28785795A JP2997743B2 JP 2997743 B2 JP2997743 B2 JP 2997743B2 JP 7287857 A JP7287857 A JP 7287857A JP 28785795 A JP28785795 A JP 28785795A JP 2997743 B2 JP2997743 B2 JP 2997743B2
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JP
Japan
Prior art keywords
film
silicon oxide
insulating film
forming
oxide film
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JP7287857A
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JPH08213389A (en
Inventor
舜平 山崎
健二 伊藤
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Semiconductor Energy Laboratory Co Ltd
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Semiconductor Energy Laboratory Co Ltd
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  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Formation Of Insulating Films (AREA)
  • Local Oxidation Of Silicon (AREA)

Description

【発明の詳細な説明】 【0001】 【産業上の利用分野】本発明は光化学気相反応及びプラ
ズマ化学気相反応により被形成面上に高速で形成され、
しかも高品質の絶縁膜に関するものである。 【0002】 【従来の技術】最近LSIの高集積化,大規模化に伴い
ICチップに占める配線の面積が増えている。そのた
め,配線の多層化,パターン,配線巾の微細化がますま
す重要となりつつある。 【0003】配線や接続孔などのパターンの横方向寸法
は,スケーリング則に従って,微細化するのに対し,電
極配線や絶縁膜の厚さなど縦方向寸法は,配線抵抗、浮
遊容量,絶縁耐圧や耐マイグレーション性など素子のス
ペックを満たす必要があり,横方向並みに微細化するこ
とは容易でない。さらに配線や接続孔のパターンは微細
化の為異方性の強いエッチングにより形成されるのでL
SIのパターンの端面形状は急唆となる。 【0004】また,配線が多層となるため,当然LSI
チップ表面の凹凸が激しくなる。このようなLSIチッ
プ表面の凹凸はパターンの加工精度の低下,配線の断線
等信頼性の低下を招くことになる。このような問題を解
決する手段として,層間絶縁膜を平坦化する技術が重要
視されている。 【0005】この層間絶縁膜を作製する方法としては,
従来の化学的気相反応(以下CVD という)による薄膜形
成技術として熱CVD 法が広く知られている。この熱CVD
法は反応室内に導入した被膜形成用反応気体に熱エネル
ギを加え、該気体を分解または活性化させ、被膜を形成
するものであった。この場合、反応のためのエネルギ供
給は熱のみであるため、その温度も高く、500 〜800 ℃
の範囲で行われていた。このため、高温に弱い半導体素
子を作製することは不可能であり、次世代LSI素子とし
て有望な低温で被膜を形成する技術が求められていた。
またより低温で被膜を形成する方法としてプラズマCVD
法が知られている。この場合は反応室内に導入した反応
性気体に外部より高周波電力を印加し、該気体を分解、
活性化せしめ、加熱された基板上に被膜を形成するもの
である。この場合、加熱温度は200 〜400 ℃の範囲であ
るが、プラズマという高エネルギ状態をとるため、分
解、活性化された反応種が被膜形成面上をたたき、損傷
を与えてしまうため、形成された被膜と下地基板との界
面において良好な特性が得られにくいという欠点を有し
ていた。この場合も熱CVD のときと同様にGaAs等の化合
物半導体には使用不可能であった。 【0006】一方、最近、これらの問題を解決する技術
として光CVD 法がある。この方法は反応性気体に対し
て、光エネルギを与えて分解、活性化させて、基板上に
被膜を形成するものであり、熱CVD 法のように高温にす
る必要がなく、またプラズマCVD 法のように物理的に下
地物質にダメ−ジを与えず、理想的な成膜法である。上
述のような作製方法により形成される絶縁膜を,平坦化
する方法としては有機シリコン化合物の液体を凹凸形状
を有する基板面上に塗布し,加熱処理を施しガラス化す
る方法,凹凸形状を有する絶縁膜にエッチバックを施
し,凹凸の形状をなめらかにするエッチバック法等の種
々の方法が行われている。これら平坦な層間絶縁膜を形
成する方法はいづれも,絶縁膜を形成する工程と平坦化
する工程とに分かれており,工程を増やし,作製装置の
数を増やしコスト高につながっていた。 【0007】 【発明が解決しようとする課題】本発明はこれら従来の
問題点を解決するものであり急唆な段差のない層間絶縁
膜を形成することを目的としている。 【0008】 【課題を解決するための手段】本発明はLSIあるいは
超LSIの層間絶縁膜が、有機珪素化合物を用いて作成
されることにより、珪素と窒素との結合を含む酸化珪素
膜からなることを特徴とする絶縁膜、および凹凸形状を
有する被形成面上に形成された絶縁膜が、有機珪素化合
物を用いて作成されることにより、珪素と窒素との結合
を含む酸化珪素膜からなることを特徴とする絶縁膜であ
る。この絶縁膜は紫外光源による光化学気相反応を伴っ
て、珪化物気体及び酸化性気体を分解または活性化せし
め気相反応を起こし、基板上の被形成面上に酸化珪素被
膜を所定の膜厚に形成するか,または光化学気相反応を
行った後,プラズマCVD法にて,さらに所定の膜厚に
まで酸化珪素被膜を形成した後同一反応室内にてエッチ
バック処理を施すことで得られる。 【0009】さらに必要に応じてこれらの工程を繰り返
し急唆な凹凸段差のない絶縁膜を形成するものである。
すなわち,絶縁膜形成した後,被処理基板へ出すことな
く,急唆な凹凸段差のない酸化珪素絶縁膜を形成する方
法を提供するものであります。以下に実験例を示し、本
発明に示された酸素珪素被膜の作製方法を示す。 【0010】 【実施例】 [実施例1]図2に本実施例で用いた酸化珪素被膜形成
用装置の概略図を示す。図面において、反応室(1)内
の紫外光源室(4)内には複数の紫外光源(6)が設置
されており、前記紫外光源室(4)は反応室(1)の圧
力とほぼ等しくなるように調整されている。また被膜形
成用基板(3)は基板加熱用ヒ−タを兼ねた基板支持体
(2)により反応室(1)内に被膜形成面を下向きにな
るように設置されている。本装置では成膜時に発生する
フレ−ク等のゴミが基板に付着しないようにデポジショ
ンアップ方式を採用した。 【0011】また反応性気体のうち、珪化物気体及び酸
化物気体は配管内でMIX されガスノズル(7)より反応
室内へ導入し基板(3)近くで混合するようになってい
る。光化学気相反応を行う紫外光源(6)より照射され
る紫外光は透過窓(5)を通って反応性気体に照射され
る直接励起法を採用した。また、透過窓(5)上に被膜
が形成されることを防止するための低蒸気圧のオイルを
コ−トせずに反応を行った。特に本発明の場合、酸化珪
素膜を作製するため、透過窓上に被膜が形成されても紫
外光は十分透過するため、特にその必要はなかった。 【0012】さらに,透外光透過窓(5)の上は,エッ
チング用のメッシュ電極(8)が載せられている。この
メッシュ電極(8) には,基板支持体(2) との間に電源
(9) により高周波電力を印加可能なように構成されてお
り,必要に応じてメッシュ電極(8) と基板支持体(2) 間
に電力及びバイアス電圧を加え透過光窓(5) のエッチン
グ,被処理基板(3) のエッチバックが同一反応室内にて
行なえる構成となっている。 本装置を用いて、図1
(A)に示すような凹凸を有する基板に反応圧力1500Pa
〜7000Pa、(11 〜53Torr) 基板温度200 ℃〜400 ℃、投
入紫外光源電力13.56 MHz ,200W〜300Wの条件下にて反
応性気体としてモノシランと亜酸化窒素との割合を変化
させて酸化珪素被膜を形成した。 【0013】光化学気相反応の場合、酸化性気体はその
活性化される割合が高い為、珪素量に対してN2O の比を
0.005 から〜0.05の範囲で若干過剰に加え、単結晶珪素
半導体基板上に形成し、エリプソメ−タにて膜厚と屈折
率の測定を行った。SiH4とN2O の反応は例えば紫外光源
として低圧水銀ランプの18nmと254nm の共鳴線を使うと
光子エネルギ−はそれぞれ6.eV(153Kcal/mol)4.9eV(11
2.5Kcal/mol)であり反応性気体分子に吸収が起こり得れ
ば原子間結合エネルギ−を切ることは容易である。 【0014】各原子結合エネルギ−を以下に示す。 Si─H 74.6 Kcal/mol Si─Si 76 Kcal/mol H─N 86 Kcal/mol H─H 104 Kcal/mol Si─N 105 Kcal/mol O─O 119 Kcal/mol N─O 149 Kcal/mol Si─O 192 Kcal/mol N─N 227 Kcal/mol SiH4分子の光吸収端は185nm より短波長側にピ−クをも
っているが若干の光吸収は行われていると考える。 【0015】一方N2O の光分解反応は次の過程が考えら
れる。 N2O +hr(185nm) →N2+O (1D) 活性化されたO(1D) がSiH4分子にアタックすると結合が
弱いSi−H は解離され、酸素ラジカルと置換されSi−O
結合が形成される。SiH4/N2O 比を0.005 から0.05の範
囲での酸素珪素被膜の屈折率、赤外吸収から次の反応が
考えられる。 SiH4+2N2O→SiO2+2N2 +2H2 ヒドラジン、アンモニアの生成も考えられるが本分析結
果からは考えにくいといえる。 【0016】図3は反応圧力に対する成膜速度の関係を
示している。ガス組成比としてはSiH4/N2O 比0.01基板
温度400 ℃、投入紫外光源電力13.56MHz、300 Wの成膜
条件下で行った。反応圧力を上げていくにしたがって単
位時間当たりに気相中に存在する原料(反応)ガスが増
加し、成膜に寄与する活性種が増え、成膜速度は増加す
るが20〜25torr付近にピ−クを持ち、それ以上の領域で
は活性種が他分子と衝突する回数が増え成膜に寄与しな
い(例えば2次生成物になる等)ことにより成膜速度が
低下することも予想される。 【0017】すなわち反応圧力に於いては最適領域が存
在することが考えられる。図4はプラズマCVD法にお
いて高周波電力密度を可変した時の成膜速度を示してい
る。反応圧力は0.4torr,基板温度は200 ℃でありバブリ
ング用キャリアガスの亜酸化窒素流量は100 SCCMであ
る。この可変範囲内では高周波電力密度に対しリニアな
増加傾向を示している。即ちTEOSの供給律速にはな
ってない。TEOSは普通600 ℃以下では熱分解しない
ので反応空間に導入される際,液体状もしくは粘性の高
いガス状態で基板表面,あるいは気相中に存在すること
から基板温度が低く高周波電力密度が小さい条件下では
良好なステップカバレージ性を有するが反面,膜質は−
OH基やCが膜中に残り必ずしも良好とは言えない。 【0018】一方,基板温度が高く高周波電力密度が大
きい条件下ではステップカバレージ性は若干低下する
が,膜質は改善される。しかし,Al上にヒロックの発
生が多くなり問題となる。以上から基板温度と高周波電
力密度の2つのパラメータに最適な条件が存在すること
が考えられる。ある反応圧力において基板温度はあまり
上げず粘性流動を促進させ膜質は高周波電力と基板にバ
イアス電力を加えることで安定化がはかれることが判明
した。尚,ここでキャリアガスとして用いた亜酸化窒素
は形成される酸化珪素被膜の酸素供給源でもある。 【0019】図5はプラズマCVD法において,亜酸化
窒素の流量を可変した時の成膜速度を示している。反応
圧力は0.4torr,基板温度は200 ℃であり,高周波電力密
度は0.35W/cm2 ある。亜酸化窒素の流量を5倍に増
加しても成膜速度は15%程度しか増加しない。すなわ
ち,TEOSの分解によって酸化珪素膜形成に必要な酸
素は十分供給されており,亜酸化窒素の分解による酸素
ラジカルは成膜に大きく寄与しないと考えられる。 【0020】図6は酸化珪素被膜を六フッ化イオウを用
いてプラズマ,エッチングを行った際の高周波電力密度
を可変した時のエッチング速度である。反応圧力は0.4t
orr,基板温度は200 ℃,SF6 流量は25SCCMである。0.
56W/cm2 で500 Å/min程度が得られ十分エッチ
バックプロセスに使えてなおかつ基板に負のバイアス電
力を加えることで、等方性あるいは異方性のエッチング
形状のコントロールができることが判明した。 【0021】図7は,基板温度を可変した時のエッチン
グ速度である。反応圧力0.4torr 高周波電力密度0.56W
/cm2,SF6 流量25SCCMでは基板温度依存性はほとん
どなく,高周波電力密度でほぼ決まってしまうと考えら
れる。層間絶縁膜を連続形成する際のエッチング工程で
はプロセスに選択性がもてる為,基板温度は重要なパラ
メータの1つであるといえる。このような光CVD法に
て,図1(A)に示すような凹凸形状を有する基板上に
酸化珪素被膜を前述の条件で約5000Å程度形成した。こ
の基板上の凸部は、高さ1μm 程度スペース0.8 μm の
形状を有していた。この基板上にまず光CVD法にて酸
化珪素被膜(10)を形成したので,この凹凸形状を均
一におおうことができた。(図1(B)) 【0022】この後、反応室内の圧力を10Paに調整し,
前述の透過光窓(5) 上のメッシュ電極(8) と基板支持体
(2) の間に電源(9) により高周波電力例えば13.56MHzの
電力を80W 印加した。反応気体はTEOS/N2Oとしバブリン
グ用N2O 流量は100SCCM でその他の条件は光CVDと同
様で行いプラズマCVD法にて,酸化珪素被膜(11)
を約1.5 μm 〜2.0 μm 形成した(図1(C))このプ
ラズマCVD法による酸化珪素形成はステップカバレー
ジ性は光CVDに比べて若干おとるが,成膜速度が0.5
〜1μm /分と速く,生産性に富む。 【0023】図1(C)のように凹凸をおおって酸化珪
素被膜を厚く形成した後,反応室内の反応性ガスを排気
して除去した後,エッチング用気体であるハロゲン化物
気体例えばSF6,CF3,CF4,CF3H等を反応室内に導入し,圧
力を10Paに調整して, メッシュ電極(8) と基板支持体
(2) 間に電力を印加しプラズマ放電を起こし,形成され
た被膜(11)のエッチングを行い凹凸段差の急唆な部
分をなくした。(図1(D))この時、同時にメッシュ電
極(8) と基板支持体(2) の間にバイアス電圧を加えると
エッチングにより凹凸段差の形状をコントロールするこ
とができた。 すなわち基板側に負のバイアス電圧を加
えると凹凸段差がよりなめらかにすることができた。 【0024】この処理を行い約0.2 〜0.5 μm エッチン
グを行い図1(D)に示すように凹凸段差の急唆な部分
を取り除いた。このようにして同一装置,同一反応室に
て急唆な段差のない層間絶縁膜を作製することができ
た。また,エッチング処理時に,同時に反応室内壁及び
透過光窓(5) 上についた被膜を除去することができ,装
置をクリーニングのために停止することも必要がなく生
産性向上につながった。また本実施例においては酸化珪
素被膜の作製をプラズマCVD法と光CVD法とを併用
したが,光CVD法のみで作製してもいいことは明らか
である。 【0025】[実施例2]図1(A)に示す基板上に実
施例1と全く同じ条件下にて、光CVD法にて酸化珪素
被膜を約5000Å形成した後,反応室内の反応性気体を入
れかえ,実施例1と同様の条件下にてエッチバックを約
500 Å程度施した。その後さらに反応性気体を入れか
え,同様の条件にて再度光CVD法にて酸化珪素被膜を
形成する,このようなサイクルを複数回繰り返して実施
例1と同様な急唆な凹凸段差のない層間絶縁膜を形成す
ることができた。 【0026】本実施例においては光CVDによる被膜形
成とプラズマエッチングとの交互に行うので被膜形成に
より汚れた反応室をエッチング工程によりクリーニング
を同時に行なえるという特徴を持つ。なお、層間絶縁膜
の積層構造に於いて最上部は光CVD 膜であることが望ま
しいことをつけ加えておく。なぜなら第2層目Al膜をス
パッタ被着する際に、最上部がTEOS酸化珪素膜では膜か
らの放出ガス( 水分,H2 etc)により、Alの膜質に悪影
響をおよぼすおそれがあるからである。よって理想的な
層間絶縁膜の積層構造としては光CVD 膜/プラズマCVD
膜/光CVD 膜となる。 【0027】尚層間絶縁膜として重要な耐圧は1層目の
光CVD 膜でもたせることは十分可能である。参考までに
光CVD 膜の耐圧は5MV/cm以上である。以上の実施例に
おいて絶縁膜として酸化珪素被膜を開示したがその他の
絶縁膜,窒化珪素膜,PSG,BPSG,アルミナ膜で
も応用可能である。さらに反応性気体としてシランのみ
でなく、その他のポリシラン類(SinH2n+2),ジメチル
シラン,テトラメチルシラン等の有機珪素化合物(SiHr
(CH4)4-n)を必要に応じて使用することも可能である。 【0028】 【発明の効果】以上示したように、本発明は従来用いら
れていた条件とは明らかに異なった条件下にて高速で、
しかも高品質の酸化珪素被膜の形成方法であり、LSI 、
超LSI等に使用される層間絶縁膜にも光CVD 法にて形成
された被膜で始めて使用可能となった。 【0029】本発明方法により,急唆な凹凸段差のない
層間絶縁膜を同一の装置の同一反応室内で行なえること
ができ,装置コスト製造コストを下げることができた。
また,エッチバック工程時に反応室内壁及び透過光窓の
エッチングも同時に行なえるという特徴を持つ。
Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of forming a photo-chemical reaction on a surface to be formed at a high speed by a photochemical vapor reaction and a plasma chemical vapor reaction.
Moreover, the present invention relates to a high-quality insulating film. 2. Description of the Related Art Recently, as the integration and scale of LSIs have increased, the area of wiring occupying an IC chip has increased. For this reason, multilayer wiring, miniaturization of patterns and wiring widths are becoming increasingly important. The horizontal dimension of patterns such as wiring and connection holes is miniaturized in accordance with the scaling law, while the vertical dimension such as the thickness of electrode wiring and insulating film is determined by wiring resistance, stray capacitance, withstand voltage, and the like. It is necessary to satisfy the specifications of the element such as migration resistance, and it is not easy to miniaturize the device in the lateral direction. Further, since the wiring and connection hole patterns are formed by highly anisotropic etching for miniaturization, L
The shape of the end face of the pattern of SI becomes sharp. In addition, since the wiring is multi-layered, the
The irregularities on the chip surface become severe. Such unevenness on the surface of the LSI chip causes a reduction in pattern processing accuracy and a reduction in reliability such as disconnection of wiring. As a means for solving such a problem, a technique for flattening an interlayer insulating film is regarded as important. [0005] As a method of manufacturing this interlayer insulating film,
A thermal CVD method is widely known as a conventional thin film forming technique by a chemical vapor reaction (hereinafter referred to as CVD). This thermal CVD
According to the method, thermal energy is applied to a reaction gas for forming a film introduced into a reaction chamber to decompose or activate the gas to form a film. In this case, the energy supply for the reaction is only heat, so the temperature is also high, 500-800 ° C.
Was done in the range. For this reason, it is impossible to fabricate a semiconductor device that is vulnerable to high temperatures, and a technology for forming a film at a low temperature, which is promising as a next-generation LSI device, has been required.
Plasma CVD is also used as a method for forming films at lower temperatures.
The law is known. In this case, high-frequency power is applied to the reactive gas introduced into the reaction chamber from the outside to decompose the gas,
It is activated to form a film on a heated substrate. In this case, the heating temperature is in the range of 200 to 400 ° C., but the high energy state of plasma causes the decomposed and activated reactive species to strike on the surface on which the film is formed, causing damage, thereby forming the film. In addition, it is difficult to obtain good characteristics at the interface between the film and the underlying substrate. Also in this case, it cannot be used for a compound semiconductor such as GaAs as in the case of thermal CVD. On the other hand, recently, there is an optical CVD method as a technique for solving these problems. In this method, a reactive gas is given a light energy to decompose and activate it to form a film on a substrate. It does not need to be heated to a high temperature unlike the thermal CVD method. This is an ideal film forming method without physically damaging the underlying material as in the above. As a method of flattening the insulating film formed by the above-described manufacturing method, a method of applying a liquid of an organic silicon compound on a substrate surface having an uneven shape and performing a heat treatment to vitrify, and a method of forming an uneven shape Various methods, such as an etch-back method for performing an etch-back on an insulating film to smooth the shape of the unevenness, have been performed. Each of these methods for forming a flat interlayer insulating film is divided into a step of forming an insulating film and a step of flattening, and the number of steps is increased, the number of manufacturing apparatuses is increased, and the cost is increased. SUMMARY OF THE INVENTION The present invention has been made to solve these conventional problems, and has as its object to form an interlayer insulating film having no sharp steps. According to the present invention, an interlayer insulating film of an LSI or a super LSI is made of a silicon oxide film containing a bond between silicon and nitrogen by being formed using an organic silicon compound. The insulating film, which is formed using an organosilicon compound, is formed using a silicon oxide film containing a bond between silicon and nitrogen. It is an insulating film characterized by the above. This insulating film is accompanied by a photochemical gas phase reaction by an ultraviolet light source, and decomposes or activates a silicide gas and an oxidizing gas to cause a gas phase reaction. Or by performing a photochemical vapor phase reaction, further forming a silicon oxide film to a predetermined thickness by a plasma CVD method, and then performing an etch-back process in the same reaction chamber. Further, if necessary, these steps are repeated to form an insulating film having no sharp unevenness.
In other words, it is intended to provide a method for forming a silicon oxide insulating film without abrupt irregularities without forming the insulating film on the substrate to be processed. An experimental example will be described below, and a method for forming the oxygen silicon film shown in the present invention will be described. [Embodiment 1] FIG. 2 is a schematic view of an apparatus for forming a silicon oxide film used in this embodiment. In the drawing, a plurality of ultraviolet light sources (6) are installed in an ultraviolet light source chamber (4) in a reaction chamber (1), and the ultraviolet light source chamber (4) is almost equal to the pressure of the reaction chamber (1). It has been adjusted to be. The substrate for film formation (3) is installed in the reaction chamber (1) by a substrate support (2) also serving as a substrate heating heater, with the film formation surface facing downward. In this apparatus, a deposition-up method is employed so that dust such as flakes generated during film formation does not adhere to the substrate. Among the reactive gases, silicide gas and oxide gas are mixed in a pipe, introduced into a reaction chamber from a gas nozzle (7), and mixed near the substrate (3). A direct excitation method in which ultraviolet light emitted from an ultraviolet light source (6) for performing a photochemical vapor phase reaction was applied to a reactive gas through a transmission window (5) was employed. In addition, the reaction was carried out without coating a low vapor pressure oil for preventing a film from being formed on the transmission window (5). In particular, in the case of the present invention, since a silicon oxide film is produced, even if a film is formed on the transmission window, ultraviolet light is sufficiently transmitted therethrough, so there is no particular necessity. Further, a mesh electrode (8) for etching is mounted on the external light transmission window (5). The mesh electrode (8) has a power supply between it and the substrate support (2).
(9) is applied so that high-frequency power can be applied. If necessary, power and bias voltage are applied between the mesh electrode (8) and the substrate support (2) to etch the transmitted light window (5). The substrate to be processed (3) can be etched back in the same reaction chamber. Using this device,
A reaction pressure of 1500 Pa is applied to a substrate having irregularities as shown in (A).
7000Pa, (11-53 Torr) Substrate temperature 200 ° C-400 ° C, input ultraviolet light source power 13.56 MHz, 200W-300W, silicon oxide film by changing the ratio of monosilane and nitrous oxide as reactive gas Was formed. [0013] For photochemical gas phase reaction, because a high proportion oxidizing gas is being its activation, the ratio of N 2 O with respect to silicon content
A slight excess in the range of 0.005 to 0.05 was added, formed on a single crystal silicon semiconductor substrate, and the film thickness and the refractive index were measured by an ellipsometer. In the reaction between SiH 4 and N 2 O, for example, when the 18 nm and 254 nm resonance lines of a low pressure mercury lamp are used as an ultraviolet light source, the photon energy is 6. eV (153 Kcal / mol) 4.9 eV (11
(2.5 Kcal / mol), and if the reactive gas molecules can be absorbed, it is easy to cut off the interatomic bond energy. The respective atomic bond energies are shown below. Si─H 74.6 Kcal / mol Si─Si 76 Kcal / mol H─N 86 Kcal / mol H─H 104 Kcal / mol Si─N 105 Kcal / mol O─O 119 Kcal / mol N─O 149 Kcal / mol Si ─O 192 Kcal / mol N─N 227 Kcal / mol The light absorption edge of SiH 4 molecule has a peak on the shorter wavelength side than 185 nm, but it is considered that some light absorption is performed. On the other hand, the following process is considered for the photolysis reaction of N 2 O. N 2 O + hr (185 nm) → N 2 + O ( 1 D) When activated O ( 1 D) attacks the SiH 4 molecule, the weak bond Si-H is dissociated and replaced with oxygen radicals to replace Si-O.
A bond is formed. The following reaction can be considered from the refractive index and infrared absorption of the oxygen silicon film when the SiH 4 / N 2 O ratio is in the range of 0.005 to 0.05. SiH 4 + 2N 2 O → SiO 2 + 2N 2 + 2H 2 Hydrazine and ammonia may be produced, but it is difficult to think from the results of this analysis. FIG. 3 shows the relationship between the reaction pressure and the film formation rate. The gas composition ratio was a SiH 4 / N 2 O ratio of 0.01, a substrate temperature of 400 ° C., an applied ultraviolet light source power of 13.56 MHz, and a film forming condition of 300 W. As the reaction pressure is increased, the amount of raw material (reaction) gas present in the gas phase per unit time increases, the number of active species contributing to film formation increases, and the film formation rate increases. It is expected that in a region beyond this, the number of times that the active species collides with other molecules increases and does not contribute to the film formation (for example, becomes a secondary product), thereby lowering the film formation rate. That is, it is considered that there is an optimum region in the reaction pressure. FIG. 4 shows the film forming speed when the high frequency power density is varied in the plasma CVD method. The reaction pressure was 0.4 torr, the substrate temperature was 200 ° C., and the nitrous oxide flow rate of the carrier gas for bubbling was 100 SCCM. Within this variable range, it shows a linear increase tendency with respect to the high frequency power density. That is, the supply rate of TEOS is not limited. Since TEOS is not thermally decomposed below 600 ° C and is introduced into the reaction space, it is present in liquid or highly viscous gas state on the substrate surface or in the gas phase. Below, it has good step coverage, but the film quality is-
OH groups and C remain in the film, which is not always good. On the other hand, when the substrate temperature is high and the high frequency power density is high, the step coverage is slightly reduced, but the film quality is improved. However, the generation of hillocks on Al increases, which is a problem. From the above, it is considered that there are optimal conditions for the two parameters of the substrate temperature and the high-frequency power density. At a certain reaction pressure, it was found that the substrate temperature was not increased so much that the viscous flow was promoted, and the film quality was stabilized by applying high-frequency power and bias power to the substrate. Here, nitrous oxide used as a carrier gas is also an oxygen supply source of a silicon oxide film to be formed. FIG. 5 shows the film forming speed when the flow rate of nitrous oxide is varied in the plasma CVD method. The reaction pressure is 0.4 torr, the substrate temperature is 200 ° C., and the high frequency power density is 0.35 W / cm 2 . Even if the flow rate of nitrous oxide is increased by a factor of 5, the deposition rate increases only by about 15%. That is, it is considered that oxygen necessary for forming the silicon oxide film is sufficiently supplied by the decomposition of TEOS, and oxygen radicals by the decomposition of nitrous oxide do not greatly contribute to the film formation. FIG. 6 shows the etching rate when the high-frequency power density is varied when the silicon oxide film is subjected to plasma and etching using sulfur hexafluoride. Reaction pressure is 0.4t
orr, substrate temperature is 200 ° C., SF 6 flow rate is 25 SCCM. 0.
It was found that about 500 Å / min was obtained at 56 W / cm 2, which was sufficient for the etch-back process, and that the isotropic or anisotropic etching shape could be controlled by applying a negative bias power to the substrate. FIG. 7 shows the etching rate when the substrate temperature is varied. Reaction pressure 0.4torr High frequency power density 0.56W
It is considered that there is almost no substrate temperature dependency at a flow rate of 25 SCCM / cm 2 and SF 6 , and it is almost determined by the high-frequency power density. The substrate temperature is one of the important parameters in the etching step when the interlayer insulating film is continuously formed because the process has selectivity. By such a photo-CVD method, a silicon oxide film was formed on a substrate having a concavo-convex shape as shown in FIG. The projection on this substrate had a shape of about 1 μm in height and 0.8 μm in space. First, a silicon oxide film (10) was formed on the substrate by a photo-CVD method, so that the unevenness could be covered uniformly. (FIG. 1 (B)) Thereafter, the pressure in the reaction chamber was adjusted to 10 Pa,
The mesh electrode (8) above the transmitted light window (5) and the substrate support
During (2), a high frequency power of, for example, 13.56 MHz power of 80 W was applied by the power supply (9). The reaction gas is TEOS / N 2 O, the flow rate of N 2 O for bubbling is 100 SCCM, and the other conditions are the same as in the photo CVD, and the silicon oxide film (11) is formed by the plasma CVD method.
(FIG. 1 (C)) Although the step coverage of the silicon oxide formation by the plasma CVD method is slightly lower than that of the photo CVD, the film formation rate is 0.5 μm to 2.0 μm.
High speed of 1 μm / min. As shown in FIG. 1 (C), after forming a thick silicon oxide film over the unevenness, the reactive gas in the reaction chamber is evacuated and removed, and then a halide gas such as SF6, which is an etching gas . CF 3, CF 4, CF 3 introducing H, etc. into the reaction chamber, and the pressure was adjusted to 10 Pa, the mesh electrode (8) and the substrate support
(2) Electric power was applied during the period to cause plasma discharge, and the formed film (11) was etched to eliminate the sharply raised portions of the uneven steps. (FIG. 1 (D)) At this time, when a bias voltage was applied between the mesh electrode (8) and the substrate support (2) at the same time, the shape of the uneven steps could be controlled by etching. That is, when a negative bias voltage was applied to the substrate side, the unevenness step could be made smoother. By performing this process, etching was performed at about 0.2 to 0.5 μm to remove sharply abrupt portions of uneven steps as shown in FIG. 1 (D). In this way, an interlayer insulating film having no sharp steps could be manufactured in the same apparatus and the same reaction chamber. In addition, the coating on the inner wall of the reaction chamber and on the transmitted light window (5) could be removed at the same time during the etching process, and there was no need to stop the apparatus for cleaning, which led to an improvement in productivity. In this embodiment, the silicon oxide film is formed by using both the plasma CVD method and the photo CVD method. However, it is apparent that the silicon oxide film may be formed only by the photo CVD method. Example 2 A silicon oxide film was formed on a substrate shown in FIG. 1A by the photo-CVD method under the same conditions as in Example 1 by about 5,000.degree. Was replaced, and the etch-back was performed under the same conditions as in Example 1.
Applied about 500 Å. Thereafter, the reactive gas is further replaced, and a silicon oxide film is formed again by the photo-CVD method under the same conditions. Such a cycle is repeated a plurality of times, and the interlayer insulating film without sharp irregularities similar to that of the first embodiment is obtained. A film could be formed. The present embodiment is characterized in that the formation of a film by photo CVD and the plasma etching are alternately performed, so that the reaction chamber contaminated by the film formation can be simultaneously cleaned by an etching process. It should be added that the uppermost part in the laminated structure of the interlayer insulating film is preferably a photo CVD film. This is because when the second Al film is deposited by sputtering, the uppermost part of the TEOS silicon oxide film may have an adverse effect on the Al film quality due to outgassing (water, H 2 etc) from the film. . Therefore, the ideal laminated structure of the interlayer insulating film is a photo CVD film / plasma CVD.
Film / photo CVD film. The withstand voltage which is important as an interlayer insulating film can be sufficiently provided by the first-layer photo-CVD film. For reference, the withstand voltage of the photo CVD film is 5 MV / cm or more. Although a silicon oxide film is disclosed as an insulating film in the above embodiments, other insulating films, silicon nitride films, PSG, BPSG, and alumina films can be applied. Not only further silane as a reactive gas, and other polysilanes (SinH 2n + 2), dimethylsilane, organosilicon compounds such as tetramethylsilane (SiH r
(CH 4 ) 4-n ) can be used as needed. As described above, the present invention can be performed at a high speed under conditions clearly different from those used conventionally.
Moreover, it is a method of forming a high quality silicon oxide film,
For the first time, it has become possible to use interlayer insulating films used in VLSIs, etc., with films formed by photo-CVD. According to the method of the present invention, it is possible to form an interlayer insulating film having no sharp unevenness in the same reaction chamber of the same apparatus, thereby reducing the manufacturing cost of the apparatus.
In addition, the etching of the reaction chamber wall and the transmitted light window can be performed at the same time during the etch back process.

【図面の簡単な説明】 【図1】本発明の層間絶縁膜作製の工程を示す。 【図2】本発明にて用いた装置の概略図を示す。 【図3】光CVD 法による酸化珪素被膜の反応圧力に対す
る成膜速度の関係を示す。 【図4】プラズマCVD 法による酸化珪素被膜の高周波電
力密度に対する成膜速度の関係を示す。 【図5】プラズマCVD 法による亜鉛化窒素流量に対する
成膜速度の関係を示す。 【図6】酸化珪素被膜の高周波電力密度に対するエッチ
ング速度の関係を示す。 【図7】酸化珪素被膜のプラズマエッチング時の基板温
度に対するエッチング速度の関係を示す。 【符号の説明】 1 反応室 2 基板支持体 3 皮膜形成用基板 4 紫外光源室 5 透過光窓 6 紫外光源 8 メッシュ電極 9 電源 10 酸化珪素被膜
BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 shows a step of producing an interlayer insulating film of the present invention. FIG. 2 shows a schematic diagram of the apparatus used in the present invention. FIG. 3 shows a relationship between a reaction pressure of a silicon oxide film formed by a photo-CVD method and a film formation rate. FIG. 4 shows a relationship between a high-frequency power density of a silicon oxide film and a film forming rate by a plasma CVD method. FIG. 5 shows the relationship between the film formation rate and the flow rate of zinc zinc oxide by the plasma CVD method. FIG. 6 shows a relationship between an etching rate and a high-frequency power density of a silicon oxide film. FIG. 7 shows a relationship between an etching rate and a substrate temperature during plasma etching of a silicon oxide film. [Description of Signs] 1 Reaction chamber 2 Substrate support 3 Film forming substrate 4 Ultraviolet light source chamber 5 Transmitted light window 6 Ultraviolet light source 8 Mesh electrode 9 Power supply 10 Silicon oxide film

───────────────────────────────────────────────────── フロントページの続き (56)参考文献 特開 昭60−165728(JP,A) 特開 昭62−7122(JP,A) 日経マイクロデバイス[26](1987− 8−1)p.125−133 Journal of Electr onic Materials,Vo l.13,No.3,1984 p.593−602   ────────────────────────────────────────────────── ─── Continuation of front page       (56) References JP-A-60-165728 (JP, A)                 JP-A-62-7122 (JP, A)                 Nikkei Microdevices [26] (1987-               8-1) p. 125-133                 Journal of Electr               onic Materials, Vo               l. 13, No. 3, 1984 p. 593-602

Claims (1)

(57)【特許請求の範囲】 1.LSIの層間絶縁膜形成方法であって、凹凸形状を
有する被形成面上に、凹凸形状に厚みが均一な酸化珪素
膜を形成し、前記均一な酸化珪素膜の上に有機珪素化合
物と酸化窒素を用いて前記均一な酸化珪素膜より厚い酸
化珪素被膜をプラズマCVD法により形成した後に、エ
ッチングによって前記厚い酸化珪素被膜の凹凸段差の急
峻な部分を除去することによって、凹凸形状上に表面が
滑らかな層間絶縁膜を形成することを特徴とする絶縁膜
形成方法。 2.前記均一な酸化珪素膜の形成は、光CVD法を用い
た形成であることを特徴とする請求項1に記載の絶縁膜
形成方法。 3.前記有機珪素化合物をTEOSとしたことを特徴と
する請求項1又は2に記載の絶縁膜形成方法。
(57) [Claims] A method for forming an interlayer insulating film of an LSI, comprising: forming a silicon oxide film having a uniform thickness on an uneven surface on a surface to be formed having the uneven shape.
A film is formed, and an organic silicon compound and nitrogen oxide are used on the uniform silicon oxide film to form an acid thicker than the uniform silicon oxide film.
After the silicon oxide film is formed by the plasma CVD method,
The unevenness of the thick silicon oxide film suddenly
By removing the steep part, the surface becomes uneven
Insulating film characterized by forming a smooth interlayer insulating film
Forming method. 2. The uniform silicon oxide film is formed by using a photo CVD method.
2. The insulating film according to claim 1, wherein the insulating film is formed.
Forming method. 3. The organic silicon compound is TEOS.
The method for forming an insulating film according to claim 1.
JP7287857A 1995-10-09 1995-10-09 Insulating film Expired - Lifetime JP2997743B2 (en)

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Title
Journal of Electronic Materials,Vol.13,No.3,1984 p.593−602
日経マイクロデバイス[26](1987−8−1)p.125−133

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