JPH06112192A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To flatten an uneven surface of a semiconductor board to a satisfactory extent by setting the formation of a silicon oxide film in a specific % range of O3 concentration and heat treating the film at a temperature which exceeds a specific value when forming a silicon oxide film based on a TEOS-O3 CVD process. CONSTITUTION:A surface offset produced by a polysilicon sate 3 and a polysilicon wiring 5 is formed on a semiconductor board 1. When O3 concentration is set from 0.2% to 1.5% based on a TEOS-O3 group atmospheric CVD process and a silicon oxygen film 6 is formed, a flattened shape is obtained on the surface of the oxygen film 6. Then, the oxygen film 6 is heat-treated at a temperature of 750 deg.C and over so as to enhance the film quality. This construction makes it possible to inhibit a base dependence at a film formation speed, flatten the unevenness of the surface and enhance the film quality as well.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device. More specifically, a method of manufacturing a semiconductor device in which unevenness on a semiconductor substrate is flattened by forming a film by using a TEOS (tetra-ethoxy-silane) -O ₃ -based atmospheric pressure CVD (chemical vapor deposition) method. Regarding

[0002]

2. Description of the Related Art Generally, a silane-based atmospheric pressure CVD film or HTO (high temperature oxide) is used as a film for flattening unevenness on a semiconductor substrate. However, with the miniaturization of elements, overhangs and voids (air bubbles) have become prominent, and it has become difficult to fill surface steps. For example, FIG. 3 shows a state in which HTO 16 is formed as an interlayer insulating film and etching back is performed in a state where a surface step due to the polysilicon gate 3 and the metal wiring 5 is formed on the semiconductor substrate 1. (2 is a gate insulating film, and 4 is an interlayer insulating film). As shown in the figure,
A void 17 is generated on the substrate 1 due to the surface step. If wiring is further provided on this, a defect such as etching residue occurs at the void 17 at the time of pattern processing.

Therefore, the present applicant has proposed a method of forming a silicon oxide film as an interlayer insulating film by the TEOS-O ₃ system atmospheric pressure CVD method (Japanese Patent Laid-Open No. 3-41731).
According to this TEOS-O ₃ -based atmospheric pressure CVD method, a so-called reflow shape in which the substrate is flattened can be obtained.
As film forming conditions, the substrate temperature is set to 400 ° C. and the pressure is set to atmospheric pressure. In addition, the gas flow rate depends on the atmosphere N ₂
Gas bubbling 18 SLM, TEOS source N
_{The two} gases are set to 2.2 SLM and the (O ₂ + O ₃ ) flow rate is set to 7.5 SLM. Also, the O ₃ concentration (volume ratio O ₃ /
(Defined as (O ₂ + O ₃ )) is set to 5%.

[0004]

However, the present inventor has found that when a silicon oxide film is formed under the above film forming conditions,
It was discovered that the film formation rate depends on the substrate. For example,
The film formation rate becomes faster on single crystal Si (substrate), AlSi, WSi, polySi, etc., while the film formation rate becomes slower on thermal oxide film, HTO, BPSG (boron phosphorus silicate glass). Become. Therefore, when the base material is not a single material, there is a problem in that the unevenness on the semiconductor substrate cannot be filled well and a good flat shape cannot be obtained.

Therefore, an object of the present invention is TEOS-O.
Provided is a method for manufacturing a semiconductor device, which can suppress the underlying dependency of a film formation rate when a silicon oxide film is formed by a _3- system atmospheric pressure CVD method, and thus can favorably flatten unevenness on a semiconductor substrate. Especially.

[0006]

In order to achieve the above object, the present invention is produced on a semiconductor substrate by forming a silicon oxide film under a predetermined film forming condition by a TEOS-O ₃ system atmospheric pressure CVD method. In the method of manufacturing a semiconductor device for embedding irregularities, the silicon oxide film is formed by setting the O ₃ concentration in the range of 0.2% to 1.5%, and then the temperature of 750 is applied to the silicon oxide film. It is characterized in that heat treatment at a temperature of ℃ or more is applied. Here, the O ₃ concentration means the volume ratio O ₃
It means / (O ₂ + O ₃ ).

Further, it is desirable to etch back the silicon oxide film after the heat treatment is applied to the silicon oxide film.

[0008]

The method of manufacturing a semiconductor device according to the present invention will be described in detail below with reference to embodiments.

The inventor of the present invention has found that TEOS-O ₃ system atmospheric pressure CVD
As a result of forming the silicon oxide film by changing the O ₃ concentration variously by the method, as shown in FIG. 1, the O ₃ concentration is 1.5%.
It was discovered that the dependency of the film formation rate on the base becomes extremely small when set below. In the figure, □ indicates the film forming rate when the film is directly formed on the single crystal Si substrate, and ● indicates the film forming speed when the film is formed on the thermal oxide film. As can be seen from the figure, when the O ₃ concentration is 1.5% or less, the film forming rates of the both are substantially the same, but when the O ₃ concentration exceeds 1.5%, the difference in the film forming rate becomes remarkable. As for the remaining film forming conditions, the substrate temperature is set to 400 ° C. and the pressure is set to atmospheric pressure, as in the conventional case. Further, the gas flow rate is 18 N ₂ gas.
N ₂ gas bubbling SLM and TEOS sources is 2.
The flow rate of ₂ SLM and (O ₂ + O ₃ ) are set to 7.5 SLM, respectively.

Further, as can be seen from FIG. 1, the O ₃ concentration must be 0.2% or more in order to obtain a practical level film formation rate (about 1000 Å / min).

As described above, by setting the O ₃ concentration in the range of 0.2 to 1.5%, it is possible to secure a practical level of film formation rate and suppress the substrate dependency of the film formation rate. it can. Therefore, even when the base material is not a single material, the irregularities on the semiconductor substrate can be satisfactorily filled and the surface can be planarized.

Actually, the unevenness on the semiconductor substrate is flattened as follows.

As shown in FIG. 2A, it is assumed that a surface step is formed on the semiconductor substrate 1 by the polysilicon gate 3 and the polysilicon wiring or the polycide wiring 5. Reference numeral 2 is a gate insulating film, and 4 is an interlayer insulating film.

As shown in FIG. 1B, the silicon oxide film 6 is formed by the TEOS-O ₃ system atmospheric pressure CVD method under the condition that the O ₃ concentration is set to, for example, 1.0%. Thereby, a flat shape can be obtained on the surface of the silicon oxide film 6 without deteriorating the surface morphology.

Here, by setting the O ₃ concentration to 1.0%, the formed silicon oxide film 6 is in a state of containing a large amount of water as compared with the conventional case (O ₃ concentration of 5%). As a result, as shown in Table 1, the film quality is slightly deteriorated. That is, the etching rate with a 1% HF aqueous solution is 290Å /
min. and larger than conventional (220Å / min.). Moreover, the leakage current is 1 × 10 ⁻⁶ A / cm ^{2, which} is the conventional level (2 × 10 ^{−9 A).}
It is about 3 orders of magnitude larger than A / cm ² ).

Therefore, the silicon oxide film 6 is heat-treated at a temperature of 750 ° C. or higher (here, the temperature is 800 ° C., 1
0 minutes) to improve the film quality. In fact, as shown in the lower column of Table 1, the film quality is improved. As a result, it was possible to improve the etching rate with a 1% HF aqueous solution to 120 Å / min. And the leak current to 2 × 10 ^-9 A / cm ² .

Next, as shown in FIG. 3C, the silicon oxide film 6 is entirely etched back by dry etching. As a result, the irregularities on the semiconductor substrate 1 can be filled with the silicon oxide film 6, and a flat shape can be obtained.

[0018]

As is apparent from the above, according to the method of manufacturing a semiconductor device of the present invention, when the silicon oxide film is formed by the TEOS-O ₃ -based atmospheric pressure CVD method, the O ₃ concentration is reduced to 0.
Since it is set in the range of 2 to 1.5%, it is possible to suppress the base dependency of the film formation rate. Therefore, the irregularities on the semiconductor substrate can be satisfactorily filled and the surface can be flattened. Further, since the formed silicon oxide film is subjected to the heat treatment at a temperature of 750 ° C. or higher, the film quality can be improved to be equal to or higher than that under the conventional condition (O ₃ concentration 5%).

After forming the silicon oxide film,
By etching back this silicon oxide film,
The semiconductor substrate can be further flattened.

[Table 1]

[Brief description of drawings]

FIG. 1 is a diagram showing a relationship between an O ₃ concentration and a film formation rate when a silicon oxide film is formed by a TEOS-O ₃ system atmospheric pressure CVD method.

FIG. 2 is a diagram for explaining a manufacturing method to which the present invention is applied to embed irregularities on a semiconductor substrate to planarize it.

FIG. 3 is a diagram showing an example in which flattening is performed using an HTO film.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 Semiconductor substrate 2 Gate insulating film 3 Polysilicon gate 4 Interlayer insulating film 5 Polysilicon wiring or polycide wiring 6 TEOS-O ₃ type silicon oxide film by atmospheric pressure CVD method

Claims (2)

[Claims] 1. A method of manufacturing a semiconductor device, wherein a silicon oxide film is formed under a predetermined film forming condition by a TEOS-O ₃ -based atmospheric pressure CVD method to fill up irregularities formed on a semiconductor substrate. Oxide film with O ₃ concentration of 0.2% to 1.5%
And forming the silicon oxide film in a range of 750 ° C., and then subjecting the silicon oxide film to a heat treatment at a temperature of 750 ° C. or higher. 2. The method of manufacturing a semiconductor device according to claim 1, wherein the silicon oxide film is etched back after the heat treatment is applied to the silicon oxide film.