JPH09181121A - Terminal structure - Google Patents

Terminal structure

Info

Publication number
JPH09181121A
JPH09181121A JP7338583A JP33858395A JPH09181121A JP H09181121 A JPH09181121 A JP H09181121A JP 7338583 A JP7338583 A JP 7338583A JP 33858395 A JP33858395 A JP 33858395A JP H09181121 A JPH09181121 A JP H09181121A
Authority
JP
Japan
Prior art keywords
board
sub
substrate
connector
terminal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP7338583A
Other languages
Japanese (ja)
Inventor
Yoshiyuki Ando
善之 安藤
Toshimasa Akamatsu
敏正 赤松
Yuji Uno
雄二 鵜野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Denso Ten Ltd
Original Assignee
Denso Ten Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Denso Ten Ltd filed Critical Denso Ten Ltd
Priority to JP7338583A priority Critical patent/JPH09181121A/en
Publication of JPH09181121A publication Critical patent/JPH09181121A/en
Withdrawn legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/4847Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H01L2224/48472Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49171Fan-out arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191Disposition
    • H01L2924/19101Disposition of discrete passive components
    • H01L2924/19106Disposition of discrete passive components in a mirrored arrangement on two different side of a common die mounting substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191Disposition
    • H01L2924/19101Disposition of discrete passive components
    • H01L2924/19107Disposition of discrete passive components off-chip wires
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/14Structural association of two or more printed circuits
    • H05K1/141One or more single auxiliary printed circuits mounted on a main printed circuit, e.g. modules, adapters
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/328Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by welding
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
    • H05K3/3431Leadless components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/36Assembling printed circuits with other printed circuits
    • H05K3/368Assembling printed circuits with other printed circuits parallel to each other

Landscapes

  • Wire Bonding (AREA)

Abstract

PROBLEM TO BE SOLVED: To enhance mechanical strength, narrow an electrode interval and enhance mount density by a method wherein a sub-substrate is interposed between two connectors from both sides. SOLUTION: A connector 14 comprises: a terminal 14a formed in a plurality of rectangular sections; and a resin part 14b molded with heat-resistant resin held by insulating the plurality of terminals 14a at specific intervals. A groove- like substrate engagement part 14c is provided in this resin part 14b. Both ends of a sub-substrate 11 to which parts are mounted on its both faces are inserted into the substrate engagement parts 14c, 14c of the connectors 14, 14. Thereafter, a space between a bonding pad 11b of the substrate 11 and the terminal 14a of the connector 14 is bonded at bonding points 15a, 15b by a wire 15. The substrate assembly that this terminal mounting is completed is mounted on a solder pattern 16a of a printed board 16 on which solder paste is applied, and by melting solder 17, a lower end of the connector 14 and a solder pattern 16a of the printed board 16 are melted and adhered.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明の属する技術分野】本発明は、混成集積回路等の
実装基板をマザーボード等の共通基板に接続する端子構
造に関し、特に実装密度が高く、機械的強度の高い端子
構造に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a terminal structure for connecting a mounting substrate such as a hybrid integrated circuit to a common substrate such as a mother board, and more particularly to a terminal structure having high packaging density and high mechanical strength.

【0002】[0002]

【従来の技術】図8は従来の端子構造を説明するための
断面図である。以下、図を用いて説明する。91は半導
体チップ12、チップ部品18等を搭載するセラミック
等の基板で、半導体チップ12とワイヤボンディングす
るためのボンディングパッド92a、配線パターン(図
示せず)、チップ部品18と半田付けするための電極9
1dが設けられている。12は基板91に搭載された半
導体チップで、ワイヤ13により基板91と接続された
後、半導体チップ12を保護する樹脂12bでコーティ
ングされている。13は半導体チップ12と基板91を
接続する金等の細線のワイヤで、半導体チップ12及び
基板91とはボンディング点13a、13bにおいて超
音波ボンディングされている。
2. Description of the Related Art FIG. 8 is a sectional view for explaining a conventional terminal structure. Hereinafter, description will be made with reference to the drawings. Reference numeral 91 is a substrate such as a ceramic on which the semiconductor chip 12 and the chip component 18 are mounted, and a bonding pad 92a for wire bonding with the semiconductor chip 12, a wiring pattern (not shown), and an electrode for soldering with the chip component 18. 9
1d is provided. Reference numeral 12 denotes a semiconductor chip mounted on the substrate 91, which is connected to the substrate 91 by the wire 13 and then coated with a resin 12b for protecting the semiconductor chip 12. Reference numeral 13 denotes a thin wire such as gold connecting the semiconductor chip 12 and the substrate 91, which are ultrasonically bonded to the semiconductor chip 12 and the substrate 91 at bonding points 13a and 13b.

【0003】18は基板91の裏面に搭載されたチップ
部品で、チップ部品18の端子部18aと基板91の電
極91dが半田18bにより固定されている。94は基
板91の周辺部に設けられた電極パターン91に嵌合す
るコの字型のクリップ部94aを有する端子で、端子9
4のクリップ部94aの反対側の端にはプリント基板9
6のスルーホール96aに挿入するリード94bが設け
られている。
Reference numeral 18 denotes a chip component mounted on the back surface of the substrate 91. The terminal portion 18a of the chip component 18 and the electrode 91d of the substrate 91 are fixed by the solder 18b. Reference numeral 94 is a terminal having a U-shaped clip portion 94a that fits into the electrode pattern 91 provided on the peripheral portion of the substrate 91.
The printed circuit board 9 is provided at the end opposite to the clip portion 94a
Leads 94b to be inserted into the through holes 96a of No. 6 are provided.

【0004】96は複数の回路部品が搭載されるガラス
エポキシ等のプリント基板で、部品を搭載して半田付け
するためのスルーホール96aが設けられている。97
は端子94のリード94bと基板96のスルーホール9
6aを接続する半田である。次に、組立工程について述
べる。基板91上に半導体チップ12が搭載され、その
半導体チップ12のボンディングパッド12aと基板9
1のボンディングパッド91aがワイヤ13により両端
のボンディング点13a、13bにおいて超音波等ボン
ディングされる。そして、半導体チップ12を保護する
ためにシリコン等の樹脂12bで表面がコーティングさ
れる。基板91は反転され、基板91の裏面にもチップ
部品18が搭載され半田18b等で基板91の電極91
dに固着される。このようにして、基板アセンブリが完
成する。
Reference numeral 96 denotes a printed circuit board made of glass epoxy or the like on which a plurality of circuit parts are mounted and provided with through holes 96a for mounting the parts and soldering. 97
Is the lead 94b of the terminal 94 and the through hole 9 of the substrate 96.
6a for connecting the solder. Next, the assembly process will be described. The semiconductor chip 12 is mounted on the substrate 91, and the bonding pads 12 a of the semiconductor chip 12 and the substrate 9 are mounted.
The one bonding pad 91a is ultrasonically bonded by the wire 13 at the bonding points 13a and 13b at both ends. Then, in order to protect the semiconductor chip 12, the surface is coated with a resin 12b such as silicon. The substrate 91 is inverted, the chip component 18 is also mounted on the back surface of the substrate 91, and the electrodes 91 of the substrate 91 are soldered with the solder 18b or the like.
fixed to d. In this way, the substrate assembly is completed.

【0005】続いて、部品の搭載された基板91の両端
の電極91bに端子94のクリップ部94aが嵌合さ
れ、半田等で固定される。そして、端子94のリード部
94dがプリント基板96のスルーホール96aに挿入
され、半田97により固着されて端子構造が完成する。
Then, the clip portions 94a of the terminals 94 are fitted to the electrodes 91b at both ends of the board 91 on which the components are mounted, and fixed by soldering or the like. Then, the lead portion 94d of the terminal 94 is inserted into the through hole 96a of the printed board 96 and fixed by the solder 97 to complete the terminal structure.

【0006】[0006]

【発明が解決しようとする課題】上記構成の端子構造で
は、部品の実装密度を向上するために基板91とプリン
ト基板96の間に別の部品を搭載しようとすると、端子
94のリード部94bを長くしなければならず、振動に
対して強度が低下する。また、端子94の先端部のリー
ド部94dをプリント基板96のスルーホール96aに
挿入するために電極ピッチを狭くすることが困難で、高
密度実装ができないという問題がある。
In the terminal structure having the above structure, when another component is mounted between the substrate 91 and the printed circuit board 96 in order to improve the mounting density of the component, the lead portion 94b of the terminal 94 is removed. It must be long, and its strength is reduced against vibration. Further, since the lead portion 94d at the tip of the terminal 94 is inserted into the through hole 96a of the printed circuit board 96, it is difficult to narrow the electrode pitch, and there is a problem that high-density mounting cannot be performed.

【0007】本発明は、基板をプリント基板に挿着する
に際して機械的強度を向上させ、且つ、電極間隔を狭く
して実装密度の向上できる端子構造を提供することを目
的とする。
It is an object of the present invention to provide a terminal structure capable of improving mechanical strength when inserting a board on a printed board and narrowing an electrode interval to improve packaging density.

【0008】[0008]

【課題を解決するための手段】上記目的を達成するため
に本発明は、プリント基板に設けられた複数の電極と対
応して接続される電子部品の搭載されたサブ基板の端子
構造において、前記サブ基板の周辺部に設けられた複数
の電極と、前記サブ基板と嵌合するための溝部を有し、
複数の概略断面コの字型の電極端子を所定の間隔で保持
する絶縁体のホルダと、前記サブ基板の電極と前記電極
端子とを接続する接続部材からなり、前記サブ基板の周
辺部が前記ホルダの溝部に嵌合され、前記サブ基板の複
数の電極と前記複数の電極端子とが前記接続部材により
それぞれ対応して接続されてなることを特徴とするもの
である。
In order to achieve the above object, the present invention provides a terminal structure of a sub-board on which electronic parts are mounted, which are connected in correspondence with a plurality of electrodes provided on a printed board. A plurality of electrodes provided on the periphery of the sub-board, and a groove for fitting with the sub-board,
An insulator holder for holding a plurality of U-shaped electrode terminals having a schematic cross section at a predetermined interval, and a connecting member for connecting the electrode of the sub-board and the electrode terminal, the peripheral portion of the sub-board is the It is characterized in that the plurality of electrodes of the sub-board and the plurality of electrode terminals are fitted in the groove portions of the holder and are correspondingly connected by the connecting members.

【0009】また、プリント基板に設けられた複数の電
極と対応して接続される電子部品の搭載された複数のサ
ブ基板の端子構造において、複数の前記サブ基板の周辺
部に設けられた複数の電極と、それぞれの前記サブ基板
と嵌合するための複数の溝部を有し、複数の前記溝部の
それぞれに対応して複数の概略断面コの字型の電極端子
を所定の間隔で保持する絶縁体のホルダと、前記サブ基
板の電極と前記電極端子とを接続する接続部材からな
り、複数の前記サブ基板の周辺部が前記ホルダの溝部に
嵌合され、それぞれの前記サブ基板の複数の電極と前記
複数の電極端子とが前記接続部材によりそれぞれ対応し
て接続されてなることを特徴とするものである。
Further, in a terminal structure of a plurality of sub-boards on which electronic components are connected corresponding to a plurality of electrodes provided on a printed circuit board, a plurality of sub-boards provided on the periphery of the plurality of sub-boards are provided. An insulation that has electrodes and a plurality of groove portions for fitting with the respective sub-boards, and that holds a plurality of U-shaped electrode terminals having a schematic cross-section at predetermined intervals corresponding to the plurality of groove portions. A holder of the body, a connecting member for connecting the electrode of the sub-board and the electrode terminal, the peripheral portion of the plurality of sub-boards are fitted into the groove of the holder, the plurality of electrodes of each sub-board And the plurality of electrode terminals are correspondingly connected by the connecting member.

【0010】また、前記接続部材が導線であって、前記
サブ基板の複数の電極と前記複数の電極端子とがそれぞ
れ対応して前記導線により接続されてなることを特徴と
するものである。また、前記導線は、前記サブ基板の複
数の電極と前記複数の電極端子とにそれぞれ対応してボ
ンディングにより接続されてなることを特徴とするもの
である。
Further, the connection member is a lead wire, and the plurality of electrodes of the sub-board and the plurality of electrode terminals are correspondingly connected by the lead wire. Further, the conductive wire is characterized in that it is connected by bonding so as to correspond to the plurality of electrodes of the sub-board and the plurality of electrode terminals, respectively.

【0011】また、前記接続部材が半田であって、前記
サブ基板の複数の電極と前記複数の電極端子とがそれぞ
れ対応して前記半田により接続されてなることを特徴と
するものである。また、前記接続部材が導電性接着剤で
あって、前記サブ基板の複数の電極と前記複数の電極端
子とがそれぞれ対応して前記導電性接着剤により接続さ
れてなることを特徴とするものである。
Further, the connection member is solder, and the plurality of electrodes of the sub-board and the plurality of electrode terminals are correspondingly connected to each other by the solder. Further, the connection member is a conductive adhesive, and the plurality of electrodes of the sub-board and the plurality of electrode terminals are correspondingly connected by the conductive adhesive. is there.

【0012】また、前記接続部材が前記ホルダに含有さ
れた導電性の粒子であって、前記サブ基板の複数の電極
と前記複数の電極端子とがそれぞれ対応して前記導電性
の粒子に圧接されてなることを特徴とするものである。
また、前記接続部材が前記複数の電極端子にそれぞれ設
けられた突起であって、前記サブ基板の複数の電極と前
記複数の電極端子の突起とがそれぞれ対応して圧接され
てなることを特徴とするものである。
Further, the connecting member is a conductive particle contained in the holder, and the plurality of electrodes of the sub-board and the plurality of electrode terminals are correspondingly pressed against the conductive particle. It is characterized by
Further, the connection member is a protrusion provided on each of the plurality of electrode terminals, and the plurality of electrodes of the sub-board and the protrusions of the plurality of electrode terminals are correspondingly pressed against each other. To do.

【0013】[0013]

【実施例】図1は本発明の第1の実施例の端子構造のコ
ネクタを説明するための図で(a)は正面図、(b)は
A−A断面図である。図2は本発明の第1の実施例の端
子構造を説明するための図で(a)は上面図(基板アセ
ンブリ部のみ)、(b)はA−A断面図(コネクタ挿
着、プリント基板半田付け後)である。以下、図を用い
て説明する。
1A and 1B are views for explaining a connector having a terminal structure according to a first embodiment of the present invention. FIG. 1A is a front view and FIG. 1B is a sectional view taken along line AA. 2A and 2B are views for explaining the terminal structure of the first embodiment of the present invention. FIG. 2A is a top view (only a board assembly portion), and FIG. After soldering). Hereinafter, description will be made with reference to the drawings.

【0014】14は複数のりん青銅等からなる概略断面
コの字型に形成された端子14aと複数の端子14aを
所定の間隔に絶縁して保持する耐熱性の例えばPBT樹
脂(ポリブチレンテレフタレート)等で成形された樹脂
部14bで構成されるコネクタである。コの字型の端子
14aの上端14aaは基板11のボンディングパッド
11bと接続され、下端14abはプリント基板16の
半田パターン16aに接続される。樹脂部14bには基
板11が挿入される溝状の基板嵌合部14cが設けられ
ている。
Reference numeral 14 denotes a terminal 14a formed of a plurality of phosphor bronze or the like and having a generally U-shaped cross section, and a heat-resistant PBT resin (polybutylene terephthalate) for insulating and holding the plurality of terminals 14a at a predetermined interval. It is a connector composed of a resin portion 14b molded by the above. The upper end 14aa of the U-shaped terminal 14a is connected to the bonding pad 11b of the board 11, and the lower end 14ab is connected to the solder pattern 16a of the printed board 16. The resin portion 14b is provided with a groove-shaped board fitting portion 14c into which the board 11 is inserted.

【0015】11は半導体チップ12、チップ部品18
等を搭載するセラミック等の基板で、半導体チップ12
とワイヤボンディングするためのボンディングパッド1
1a、配線パターン(図示せず)、コネクタ14の端子
14a(上端14aa)とワイヤボンディングするため
のボンディングパッド11b、チップ部品18と半田付
けするための電極パターン11dが設けられている。1
2は基板11に搭載された半導体チップで、ワイヤ13
により基板11と接続された後、半導体チップ12を保
護する樹脂12bでコーティングされている。13は半
導体チップ12と基板11を接続する金等の細線のワイ
ヤで、半導体チップ12のボンディングパッド12aと
基板11のボンディングパッド11aとはボンディング
点13a、13bにおいて超音波ボンディングされてい
る。15は基板11とコネクタ14を接続する金等の細
線のワイヤで、基板11のボンディングパッド11bと
コネクタ14の端子14a(上端14aa)とはボンデ
ィング点15a、15bにおいて超音波ボンディングさ
れている。18は基板11の裏面に搭載されたチップ部
品で、チップ部品18の端子部18aと基板11の電極
パターン11dが半田18bにより融着されている。
Reference numeral 11 denotes a semiconductor chip 12 and a chip component 18.
The semiconductor chip 12 is a substrate such as a ceramic on which the semiconductor chip 12 is mounted.
Bonding pad 1 for wire bonding with
1a, a wiring pattern (not shown), a bonding pad 11b for wire bonding with the terminal 14a (upper end 14aa) of the connector 14, and an electrode pattern 11d for soldering with the chip component 18. 1
Reference numeral 2 is a semiconductor chip mounted on the substrate 11, and a wire 13
After being connected to the substrate 11 by means of, the resin is coated with a resin 12b for protecting the semiconductor chip 12. Reference numeral 13 is a thin wire such as gold connecting the semiconductor chip 12 and the substrate 11. The bonding pad 12a of the semiconductor chip 12 and the bonding pad 11a of the substrate 11 are ultrasonically bonded at bonding points 13a and 13b. Reference numeral 15 is a thin wire such as gold connecting the substrate 11 and the connector 14, and the bonding pad 11b of the substrate 11 and the terminal 14a (upper end 14aa) of the connector 14 are ultrasonically bonded at the bonding points 15a and 15b. Reference numeral 18 denotes a chip component mounted on the back surface of the substrate 11. The terminal portion 18a of the chip component 18 and the electrode pattern 11d of the substrate 11 are fused by the solder 18b.

【0016】16は複数の回路部品が搭載されるガラス
エポキシ等のプリント基板で、部品を搭載して半田付け
するためのスルーホール(図示せず)、半田パターン1
6aが設けられている。17はコネクタ14の端子14
a(下端14ab)とプリント基板16の半田パターン
16aを接続する半田である。次に、組立工程について
述べる。基板11上に半導体チップ12が搭載され、そ
の半導体チップ12のボンディングパッド12aと基板
11のボンディングパッド11aがワイヤ13により両
端のボンディング点13a、13bにおいて超音波等で
ボンディングされる。そして、半導体チップ12を保護
するためにシリコン等の樹脂12bで表面がコーティン
グされる。基板11は反転されて電極パターン11d上
に半田ペーストが印刷され、この上にチップ部品18が
搭載され、半田18bが溶融されて基板11の電極パタ
ーン11dに固着される。尚、下面のチップ部品18の
電極、配線パターン等は基板11に設けられたスルーホ
ール(図示せず)または基板11の端部を介して上面の
ボンディングパッド11bに予め集約されている。
Reference numeral 16 is a printed circuit board made of glass epoxy or the like on which a plurality of circuit components are mounted. Through holes (not shown) for mounting the components and soldering the solder patterns 1
6a is provided. 17 is a terminal 14 of the connector 14
It is solder that connects a (lower end 14ab) and the solder pattern 16a of the printed board 16. Next, the assembly process will be described. The semiconductor chip 12 is mounted on the substrate 11, and the bonding pad 12a of the semiconductor chip 12 and the bonding pad 11a of the substrate 11 are bonded by the wire 13 at the bonding points 13a and 13b at both ends by ultrasonic waves or the like. Then, in order to protect the semiconductor chip 12, the surface is coated with a resin 12b such as silicon. The substrate 11 is inverted and solder paste is printed on the electrode pattern 11d, the chip component 18 is mounted thereon, and the solder 18b is melted and fixed to the electrode pattern 11d of the substrate 11. The electrodes, wiring patterns, etc. of the chip component 18 on the lower surface are gathered in advance on the bonding pads 11b on the upper surface via through holes (not shown) provided in the substrate 11 or the end portions of the substrate 11.

【0017】続いて、両面に部品の搭載された基板11
の両端がコネクタ14の溝状の基板嵌合部14cに挿入
(圧入)された後、ワイヤ15により基板11のボンデ
ィングパッド11bとコネクタ14の端子14a(上端
14aa)の間が対応してボンディング点15a、15
bにおいて超音波等ボンディングされる。このようにし
て、基板11の端子付けが完了する。尚、基板11のボ
ンディングパッド11bとコネクタ14の端子14aの
電気的接続に際して、ワイヤ15の代わりにリボン状の
タブテープ(接続テープに接続用導電パターンが設けら
れたもの)を使用して接続してもよい。
Subsequently, the substrate 11 having components mounted on both sides thereof
After both ends of the connector are inserted (press-fitted) into the groove-shaped substrate fitting portion 14c of the connector 14, the bonding pad 11b of the substrate 11 and the terminal 14a (upper end 14aa) of the connector 14 are correspondingly bonded by the wire 15. 15a, 15
In step b, ultrasonic waves are bonded. In this way, the terminal attachment of the substrate 11 is completed. When electrically connecting the bonding pad 11b of the substrate 11 and the terminal 14a of the connector 14, a ribbon-shaped tab tape (connection tape provided with a conductive pattern for connection) is used instead of the wire 15. Good.

【0018】端子付けの完了した基板アセンブリは通常
の電子部品と同様の方法により、半田ペーストの塗布さ
れたプリント基板16の半田パターン16a上に搭載さ
れ、半田17を溶融することによりコネクタ14の端子
14a(下端14ab)とプリント基板16の半田パタ
ーン16aが融着される。以上のように本実施例では、
プリント基板16に孔を設けることなく基板11を搭
載、接続し、コネクタの端子間隔が狭くできるので、実
装密度が向上するとともに基板が両側から2つのコネク
タにより挟持されているので実装強度が向上する。
The board assembly having the terminals attached is mounted on the solder pattern 16a of the printed board 16 to which the solder paste is applied by the same method as that of a normal electronic component, and the solder 17 is melted to melt the solder 17 to form the terminals of the connector 14. 14a (lower end 14ab) and the solder pattern 16a of the printed board 16 are fused. As described above, in this embodiment,
Since the board 11 can be mounted and connected without forming holes in the printed board 16 and the terminal spacing of the connector can be narrowed, the mounting density is improved and the mounting strength is improved because the board is sandwiched by two connectors from both sides. .

【0019】図3は本発明の第2の実施例の端子構造を
説明するための図で(a)はコネクタ正面図、(b)は
コネクタA−A断面図、(c)はコネクタ挿着後の断面
図である。以下、図を用いて説明する。24は複数のり
ん青銅等からなる概略断面コの字型に形成された端子2
4aと複数の端子24aを所定の間隔に絶縁して保持す
る耐熱性の例えばPBT樹脂等で成形された樹脂部24
bで構成されるコネクタである。コの字型の端子24a
の上端24aaは基板21の電極パターン21bと接続
され、下端24abはプリント基板の半田パターンに接
続される。樹脂部24bには基板21が挿入される溝状
の基板嵌合部24cが端子24a(上端24aa)に接
して設けられている。
3A and 3B are views for explaining the terminal structure of the second embodiment of the present invention. FIG. 3A is a front view of the connector, FIG. 3B is a sectional view of the connector AA, and FIG. It is a sectional view after. Hereinafter, description will be made with reference to the drawings. Reference numeral 24 is a terminal 2 formed of a plurality of phosphor bronze and having a generally U-shaped cross section.
4a and a plurality of terminals 24a are insulated from each other at a predetermined interval and held by a heat-resistant resin portion 24 made of, for example, PBT resin or the like.
It is a connector composed of b. U-shaped terminal 24a
The upper end 24aa is connected to the electrode pattern 21b of the board 21, and the lower end 24ab is connected to the solder pattern of the printed board. A groove-shaped board fitting portion 24c into which the board 21 is inserted is provided in the resin portion 24b in contact with the terminal 24a (upper end 24aa).

【0020】21は半導体チップ12、チップ部品18
等を搭載するセラミック等の基板で、半導体チップ12
とワイヤボンディングするためのボンディングパッド2
1a、配線パターン(図示せず)、コネクタ24の端子
24a(上端24aa)と半田接続するための電極パタ
ーン21b、チップ部品18と半田付けするための電極
パターン21dが設けられている。25は基板21とコ
ネクタ24を接続する半田で、基板21の電極パターン
21bとコネクタ24の端子24a(上端24aa)と
は半田付けされている。尚、半導体チップ12、ワイヤ
13及びチップ部品18は第1の実施例と名称、機能及
び作用が同じであるため、同一番号を付して説明は省略
する。
Reference numeral 21 denotes a semiconductor chip 12 and a chip component 18.
The semiconductor chip 12 is a substrate such as a ceramic on which the semiconductor chip 12 is mounted.
Bonding pad 2 for wire bonding with
1a, a wiring pattern (not shown), an electrode pattern 21b for solder connection with the terminal 24a (upper end 24aa) of the connector 24, and an electrode pattern 21d for soldering with the chip component 18. Reference numeral 25 is a solder that connects the substrate 21 and the connector 24, and the electrode pattern 21b of the substrate 21 and the terminal 24a (upper end 24aa) of the connector 24 are soldered. Since the semiconductor chip 12, the wires 13 and the chip parts 18 have the same names, functions and actions as those of the first embodiment, they are given the same reference numerals and their explanations are omitted.

【0021】次に、組立工程について述べる。基板21
への半導体チップ12及びチップ部品18の搭載方法に
ついては第1の実施例と同じであるため説明は省略す
る。両面に部品の搭載された基板21の端部が溶融半田
槽に浸漬されて電極パターン21bに半田25がコーテ
ィングされる。半田コーティングされた基板21の両端
がコネクタ24の溝状の基板嵌合部24cに挿入(圧
入)された後、加熱炉において半田25を再溶融して基
板21とコネクタ24の端子24a(上端24aa)の
間が接続される。このようにして、基板21の端子付け
が完了する。尚、端子付けのための半田25の再溶融は
プリント基板への搭載時に同時に行ってもよい。また、
基板21の電極パターン21bとコネクタ24の端子2
4a(上端24aa)の電気的接続に際して、半田25
の代わりに導電性接着剤を塗布することにより接続して
もよい。
Next, the assembly process will be described. Board 21
Since the method of mounting the semiconductor chip 12 and the chip component 18 on the same is the same as that of the first embodiment, the description thereof will be omitted. The ends of the substrate 21 having components mounted on both sides are immersed in a molten solder bath to coat the electrode pattern 21b with solder 25. After both ends of the solder-coated substrate 21 are inserted (press-fitted) into the groove-shaped substrate fitting portion 24c of the connector 24, the solder 25 is remelted in a heating furnace to re-melt the substrate 21 and the terminals 24a (upper end 24aa) of the connector 24. ) Are connected. In this way, the terminal attachment of the substrate 21 is completed. The remelting of the solder 25 for attaching the terminals may be performed at the same time when the solder 25 is mounted on the printed board. Also,
The electrode pattern 21b of the substrate 21 and the terminal 2 of the connector 24
When electrically connecting 4a (upper end 24aa), solder 25
You may connect by applying a conductive adhesive instead of.

【0022】端子付けの完了した基板アセンブリは通常
の電子部品と同様の方法により、半田ペーストの塗布さ
れたプリント基板の半田パターン上に搭載され、半田を
溶融することによりコネクタ24の端子24a(下端2
4ab)とプリント基板の半田パターンが融着される。
以上のように本実施例では、プリント基板に孔を設ける
ことなく基板21を搭載、接続し、コネクタの端子間隔
が狭くできるので実装密度が向上するとともに基板が両
側から2つのコネクタにより挟持されているので実装強
度が向上する。また、基板をコネクタの基板嵌合部に挿
入するだけで簡単に接続できる。
The board assembly having the terminals attached thereto is mounted on the solder pattern of the printed board to which the solder paste is applied by the same method as that of a normal electronic component, and the terminal 24a (lower end of the connector 24) of the connector 24 is melted by melting the solder. Two
4ab) and the solder pattern of the printed circuit board are fused.
As described above, in this embodiment, the board 21 can be mounted and connected without providing holes in the printed board, and the terminal spacing of the connector can be narrowed, so that the mounting density is improved and the board is sandwiched by two connectors from both sides. Mounting strength is improved. In addition, the board can be easily connected only by inserting it into the board fitting portion of the connector.

【0023】図4は本発明の第3の実施例の端子構造を
説明するための図で(a)はコネクタ正面図、(b)は
コネクタA−A断面図、(c)はコネクタ挿着後の断面
図である。以下、図を用いて説明する。34は複数のり
ん青銅等からなる概略断面コの字型に形成された端子3
4aと複数の端子34aを所定の間隔に絶縁して保持す
る耐熱性の例えばPBT樹脂等で成形された樹脂部34
bで構成されるコネクタである。コの字型の端子34a
の上端34aaは基板31の電極パターン31bと接続
され、下端34abはプリント基板の半田パターン(図
示せず)に接続される。樹脂部34bには基板31が挿
入される溝状の基板嵌合部34cが設けられている。
尚、樹脂部34bは弾性を有しており、且つ、樹脂部3
4bには導電性のボール34dが分散されており圧縮方
向に導電性を生ずる。
4A and 4B are views for explaining a terminal structure of the third embodiment of the present invention. FIG. 4A is a front view of a connector, FIG. 4B is a sectional view of the connector AA, and FIG. It is a sectional view after. Hereinafter, description will be made with reference to the drawings. Reference numeral 34 is a terminal 3 formed of a plurality of phosphor bronze or the like and having an approximately U-shaped cross section.
4a and a plurality of terminals 34a are insulated from each other at a predetermined interval and held by a heat-resistant resin portion 34 made of, for example, PBT resin or the like.
It is a connector composed of b. U-shaped terminal 34a
Has an upper end 34aa connected to the electrode pattern 31b of the substrate 31, and a lower end 34ab connected to a solder pattern (not shown) of the printed circuit board. The resin portion 34b is provided with a groove-shaped board fitting portion 34c into which the board 31 is inserted.
The resin portion 34b has elasticity and the resin portion 3b
Conductive balls 34d are dispersed in 4b, and conductivity is generated in the compression direction.

【0024】31は半導体チップ12、チップ部品18
等を搭載するセラミック等の基板で、半導体チップ12
とワイヤボンディングするためのボンディングパッド3
1a、配線パターン(図示せず)、コネクタ34の端子
34aと導電性のボール34dを介して接続するための
電極パターン31b、チップ部品18と半田付けするた
めの電極パターン31dが設けられている。尚、半導体
チップ12、ワイヤ13及びチップ部品18は第1の実
施例と名称、機能及び作用が同じであるため、同一番号
を付して説明は省略する。
31 is a semiconductor chip 12 and a chip component 18
The semiconductor chip 12 is a substrate such as a ceramic on which the semiconductor chip 12 is mounted.
Bonding pad 3 for wire bonding with
1a, a wiring pattern (not shown), an electrode pattern 31b for connecting to the terminal 34a of the connector 34 via a conductive ball 34d, and an electrode pattern 31d for soldering to the chip component 18. Since the semiconductor chip 12, the wires 13 and the chip parts 18 have the same names, functions and actions as those of the first embodiment, they are given the same reference numerals and their explanations are omitted.

【0025】次に、組立工程について述べる。基板31
上への半導体チップ12及びチップ部品18の搭載方法
については第1の実施例と同じであるため説明は省略す
る。基板31の両端がコネクタ34の溝状の基板嵌合部
34cに挿入(圧入)されることにより、樹脂部34b
に分散されている導電性のボール34dが圧縮され、圧
縮方向に導電性が生じて基板31の電極パターン31b
とコネクタ34の端子34a(上端34aa)が電気的
に接続される。このようにして、基板31の端子付けが
完了する。
Next, the assembly process will be described. Substrate 31
The method of mounting the semiconductor chip 12 and the chip component 18 on the top is the same as that in the first embodiment, and thus the description thereof is omitted. By inserting (press-fitting) both ends of the board 31 into the groove-shaped board fitting portion 34c of the connector 34, the resin portion 34b is formed.
The conductive balls 34d dispersed in the substrate are compressed, and conductivity is generated in the compression direction, so that the electrode pattern 31b of the substrate 31 is formed.
And the terminal 34a (upper end 34aa) of the connector 34 are electrically connected. In this way, the terminal mounting of the substrate 31 is completed.

【0026】端子付けの完了した基板アセンブリは通常
の電子部品と同様の方法により、半田ペーストの塗布さ
れたプリント基板の半田パターン上に搭載され、半田を
溶融することによりコネクタ34の端子34a(下端3
4ab)とプリント基板の半田パターンが融着される。
以上のように本実施例では、プリント基板に孔を設ける
ことなく基板31を搭載、接続し、コネクタの端子間隔
が狭くできるので実装密度が向上するとともに基板が両
側から2つのコネクタにより挟持されているので実装強
度が向上する。また、基板をコネクタの基板嵌合部に挿
入するだけで簡単に接続できる。
The board assembly having the terminals attached is mounted on the solder pattern of the printed board to which the solder paste is applied by a method similar to that of an ordinary electronic component, and the terminal 34a (lower end of the connector 34) of the connector 34 is melted by melting the solder. Three
4ab) and the solder pattern of the printed circuit board are fused.
As described above, in this embodiment, the board 31 can be mounted and connected without providing holes in the printed board, and the terminal spacing of the connector can be narrowed, so that the mounting density is improved and the board is sandwiched by two connectors from both sides. Mounting strength is improved. In addition, the board can be easily connected only by inserting it into the board fitting portion of the connector.

【0027】図5は本発明の第4の実施例の端子構造を
説明するための図で(a)はコネクタ正面図、(b)は
コネクタA−A断面図、(c)はコネクタ挿着後の断面
図である。以下、図を用いて説明する。44は複数のり
ん青銅等からなる概略断面コの字型に形成された端子4
4aと複数の端子44aを所定の間隔に絶縁して保持す
る耐熱性の例えばPBT樹脂等で成形された樹脂部44
bで構成されるコネクタである。コの字型の端子44a
の上端44aaは基板41の電極パターン41bと接続
され、下端44abはプリント基板の半田パターン(図
示せず)に接続される。樹脂部44bには基板41が挿
入される溝状の基板嵌合部44cが設けられている。
尚、上端44aaには突起44dが設けられている。こ
の突起44dの製作方法としては本例では端子44aa
をプレスにより先端部を曲げて突起を形成しているが、
別体の突起(例えば、導電性のボール、細線等)を設け
てもよい。
5A and 5B are views for explaining the terminal structure of the fourth embodiment of the present invention. FIG. 5A is a front view of the connector, FIG. 5B is a sectional view of the connector AA, and FIG. It is a sectional view after. Hereinafter, description will be made with reference to the drawings. Reference numeral 44 designates a terminal 4 formed of a plurality of phosphor bronze and having a generally U-shaped cross section.
4a and a plurality of terminals 44a are insulated from each other at a predetermined interval and held by a heat-resistant resin portion 44 made of, for example, PBT resin or the like.
It is a connector composed of b. U-shaped terminal 44a
Has an upper end 44aa connected to the electrode pattern 41b of the substrate 41 and a lower end 44ab connected to a solder pattern (not shown) of the printed circuit board. The resin portion 44b is provided with a groove-shaped board fitting portion 44c into which the board 41 is inserted.
A protrusion 44d is provided on the upper end 44aa. In this example, as a method of manufacturing the protrusion 44d, the terminal 44aa is used.
Although the tip is bent by pressing to form a protrusion,
Separate protrusions (eg, conductive balls, thin wires, etc.) may be provided.

【0028】41は半導体チップ12、チップ部品18
等を搭載するセラミック等の基板で、半導体チップ12
とワイヤボンディングするためのボンディングパッド4
1a、配線パターン(図示せず)、コネクタ44の端子
44aと導電性のボール44dを介して接続するための
電極パターン41b、チップ部品18と半田付けするた
めの電極パターン41dが設けられている。尚、半導体
チップ12、ワイヤ13及びチップ部品18は第1の実
施例と名称、機能及び作用が同じであるため、同一番号
を付して説明は省略する。
Reference numeral 41 is a semiconductor chip 12 and a chip component 18.
The semiconductor chip 12 is a substrate such as a ceramic on which the semiconductor chip 12 is mounted.
Bonding pad 4 for wire bonding with
1a, a wiring pattern (not shown), an electrode pattern 41b for connecting to the terminal 44a of the connector 44 via a conductive ball 44d, and an electrode pattern 41d for soldering with the chip component 18. Since the semiconductor chip 12, the wires 13 and the chip parts 18 have the same names, functions and actions as those of the first embodiment, they are given the same reference numerals and their explanations are omitted.

【0029】次に、組立工程について述べる。基板41
上への半導体チップ12及びチップ部品18の搭載方法
については第1の実施例と同じであるため説明は省略す
る。基板41の両端がコネクタ44の溝状の基板嵌合部
44cに挿入(圧入)されることにより、端子44a
(上端44aa)の突起44dが基板41の電極パター
ン41bに圧着され、基板41の電極パターン41bと
コネクタ44の端子44aが電気的に接続される。この
ようにして、基板41の端子付けが完了する。
Next, the assembly process will be described. Board 41
The method of mounting the semiconductor chip 12 and the chip component 18 on the top is the same as that in the first embodiment, and thus the description thereof is omitted. By inserting (press-fitting) both ends of the board 41 into the groove-like board fitting portion 44c of the connector 44, the terminal 44a is formed.
The protrusion 44d at the (upper end 44aa) is pressure-bonded to the electrode pattern 41b of the substrate 41, and the electrode pattern 41b of the substrate 41 and the terminal 44a of the connector 44 are electrically connected. In this way, the terminal mounting of the substrate 41 is completed.

【0030】端子付けの完了した基板アセンブリは通常
の電子部品と同様の方法により、半田ペーストの塗布さ
れたプリント基板の半田パターン上に搭載され、半田を
溶融することによりコネクタ44の端子44a(下端4
4ab)とプリント基板の半田パターンが融着される。
以上のように本実施例では、プリント基板に孔を設ける
ことなく基板41を搭載、接続し、コネクタの端子間隔
が狭くできるので実装密度が向上するとともに基板が両
側から2つのコネクタにより挟持されているので実装強
度が向上する。また、基板をコネクタの基板嵌合部に挿
入するだけで簡単に接続できる。
The board assembly having the terminals attached is mounted on the solder pattern of the printed board on which the solder paste has been applied by the same method as that for a normal electronic component, and the terminals 44a (lower end of the connector 44) of the connector 44 are melted by melting the solder. Four
4ab) and the solder pattern of the printed circuit board are fused.
As described above, in this embodiment, the board 41 can be mounted and connected without providing holes in the printed board, and the terminal spacing of the connector can be narrowed, so that the mounting density is improved and the board is sandwiched by two connectors from both sides. Mounting strength is improved. In addition, the board can be easily connected only by inserting it into the board fitting portion of the connector.

【0031】図6は本発明の第5の実施例の端子構造を
説明するための図で(a)はコネクタ正面図、(b)は
コネクタA−A断面図、(c)はコネクタ挿着後の断面
図である。以下、図を用いて説明する。本例は複数の基
板を1つのコネクタに挿着して集積度を向上したもので
ある。54は複数のりん青銅等からなる端子54aと端
子54aを所定の間隔に絶縁して保持する耐熱性の例え
ばPBT樹脂等で成形された樹脂部541b、542b
で構成されるコネクタで、各端子54aは第1爪(上
端)541a、第2爪542a、第3爪(下端)543
aを有し、各2つの爪は概略コの字型に形成されてい
る。樹脂部541b、542bには基板21が挿入され
る溝状の基板嵌合部541c、542cが第1爪(上
端)541a、第2爪542aに接して設けられてい
る。
6A and 6B are views for explaining the terminal structure of the fifth embodiment of the present invention. FIG. 6A is a front view of the connector, FIG. 6B is a sectional view of the connector AA, and FIG. It is a sectional view after. Hereinafter, description will be made with reference to the drawings. In this example, a plurality of substrates are inserted into one connector to improve the degree of integration. Reference numeral 54 designates a plurality of terminals 54a made of phosphor bronze or the like, and resin portions 541b, 542b formed of heat-resistant PBT resin or the like for insulating and holding the terminals 54a at predetermined intervals.
Each terminal 54a has a first claw (upper end) 541a, a second claw 542a, and a third claw (lower end) 543.
a, each of the two claws is formed in a generally U-shape. Groove-shaped board fitting portions 541c and 542c into which the board 21 is inserted are provided in the resin portions 541b and 542b in contact with the first claws (upper ends) 541a and the second claws 542a.

【0032】21は半導体チップ12、チップ部品18
等を搭載するセラミック等の基板で、半導体チップ12
とワイヤボンディングするためのボンディングパッド2
1a、配線パターン(図示せず)、コネクタ54の第1
爪(上端)541a、第2爪542aと半田接続するた
めの電極パターン21b、チップ部品18と半田付けす
るための電極パターン21dが設けられている。25は
基板21とコネクタ54を接続する半田で、基板21の
電極パターン21bとコネクタ54とは半田付けされて
いる。尚、半導体チップ12、ワイヤ13及びチップ部
品18は第1の実施例と名称、機能及び作用が同じであ
るため、同一番号を付して説明は省略する。尚、下部の
基板21は搭載部品(半導体チップ12、チップ部品1
8)が省略されている。
Reference numeral 21 is a semiconductor chip 12 and a chip component 18.
The semiconductor chip 12 is a substrate such as a ceramic on which the semiconductor chip 12 is mounted.
Bonding pad 2 for wire bonding with
1a, wiring pattern (not shown), first connector 54
A claw (upper end) 541a, an electrode pattern 21b for solder connection with the second claw 542a, and an electrode pattern 21d for soldering with the chip component 18 are provided. Reference numeral 25 is solder that connects the substrate 21 and the connector 54, and the electrode pattern 21b of the substrate 21 and the connector 54 are soldered. Since the semiconductor chip 12, the wires 13 and the chip parts 18 have the same names, functions and actions as those of the first embodiment, they are given the same reference numerals and their explanations are omitted. The lower substrate 21 is mounted component (semiconductor chip 12, chip component 1
8) is omitted.

【0033】次に、組立工程について述べる。基板21
上への半導体チップ12及びチップ部品18の搭載方法
については第1の実施例と同じであるため説明は省略す
る。両面に部品の搭載された基板21の端部が溶融半田
槽に浸漬されて電極パターン21bに半田25がコーテ
ィングされる。半田コーティングされた基板21の両端
がコネクタ54の溝状の基板嵌合部541c、542
c、にそれぞれ挿入(圧入)された後、加熱炉において
半田25を再溶融して基板21とコネクタ54の爪54
1a、542aの間が接続される。このようにして、基
板21の端子付けが完了する。尚、端子付けのための半
田25の再溶融はプリント基板への搭載時に同時に行っ
てもよい。また、基板21の電極パターン21bとコネ
クタ54の電気的接続に際して、半田25の代わりに導
電性接着剤を塗布することにより接続してもよい。
Next, the assembly process will be described. Board 21
The method of mounting the semiconductor chip 12 and the chip component 18 on the top is the same as that in the first embodiment, and thus the description thereof is omitted. The ends of the substrate 21 having components mounted on both sides are immersed in a molten solder bath to coat the electrode pattern 21b with solder 25. Both ends of the solder-coated substrate 21 are groove-shaped substrate fitting portions 541c and 542 of the connector 54.
After being inserted (press-fitted) into c and c, respectively, the solder 25 is re-melted in the heating furnace and the board 21 and the claw 54 of the connector 54 are
1a and 542a are connected. In this way, the terminal attachment of the substrate 21 is completed. The remelting of the solder 25 for attaching the terminals may be performed at the same time when the solder 25 is mounted on the printed board. Further, when electrically connecting the electrode pattern 21b of the substrate 21 and the connector 54, a conductive adhesive may be applied instead of the solder 25 for connection.

【0034】端子付けの完了した基板アセンブリは通常
の電子部品と同様の方法により、半田ペーストの塗布さ
れたプリント基板の半田パターン上に搭載され、半田を
溶融することによりコネクタ54の第3爪(下端543
a)とプリント基板の半田パターンが融着される。尚、
基板21とコネクタ54の接続方法として第3〜第4の
実施例のごときコネクタ34、44(導電性ボール、突
起等が設けられたコネクタ)による接続方法と同様な方
法も可能である。
The board assembly with the terminals attached is mounted on the solder pattern of the printed board to which the solder paste has been applied by the same method as that for a normal electronic component, and the third nail ( Bottom edge 543
The solder pattern of a) and the printed circuit board are fused. still,
As a method of connecting the board 21 and the connector 54, a method similar to the method of connecting with the connectors 34 and 44 (connectors provided with conductive balls, protrusions, etc.) as in the third to fourth embodiments is also possible.

【0035】以上のように本実施例では、複数の基板を
1つのコネクタに接続できるので実装密度が一層向上す
る。また、基板が両側から2つのコネクタにより挟持さ
れているので実装強度が向上する。図7は本発明の第6
の実施例の端子構造を説明するための図で(a)はコネ
クタ正面図、(b)はコネクタA−A断面図、(c)は
コネクタ挿着後の断面図である。以下、図を用いて説明
する。本例は複数の基板を1つのコネクタに挿着して集
積度を向上したものである。
As described above, in this embodiment, a plurality of substrates can be connected to one connector, so that the mounting density is further improved. Further, since the board is sandwiched by the two connectors from both sides, the mounting strength is improved. FIG. 7 shows a sixth embodiment of the present invention.
7A is a front view of the connector, FIG. 8B is a sectional view of the connector AA, and FIG. 8C is a sectional view after the connector is inserted. Hereinafter, description will be made with reference to the drawings. In this example, a plurality of substrates are inserted into one connector to improve the degree of integration.

【0036】64は複数のりん青銅等からなる端子64
aと端子64aを所定の間隔に絶縁して保持する耐熱性
の例えばPBT樹脂等で成形された樹脂部641b、6
42b、643bで構成されるコネクタで、各端子64
aは第1爪641a、第2爪642a、第3爪643
a、第4爪644aで構成されている。樹脂部641
b、642b、643bには基板21が挿入される溝状
の基板嵌合部641c、642c、643c、644
c、一辺が第1爪641a〜第4爪644aに接して設
けられている。
Reference numeral 64 is a terminal 64 made of a plurality of phosphor bronze or the like.
resin portions 641b, 6 made of heat-resistant material such as PBT resin that insulates and holds a and the terminal 64a at a predetermined interval.
42b, 643b connector, each terminal 64
a is a first claw 641a, a second claw 642a, a third claw 643
a and a fourth claw 644a. Resin part 641
Groove-shaped board fitting portions 641c, 642c, 643c, 644 into which the board 21 is inserted in b, 642b, 643b.
c, one side is provided in contact with the first to fourth claws 641a to 644a.

【0037】21は半導体チップ、チップ部品等を搭載
するセラミック等の基板で、コネクタ64の端子64a
と半田接続するための電極パターン21b、チップ部品
18と半田付けするための電極パターン21dが設けら
れている。25は基板21とコネクタ64を接続する半
田で、基板21の電極パターン21bとコネクタ64の
端子64aとは半田付けされている。尚、4つの基板2
1はいずれも搭載部品が省略されている。
Reference numeral 21 is a substrate made of ceramic or the like on which semiconductor chips, chip parts and the like are mounted, and a terminal 64a of the connector 64.
There is provided an electrode pattern 21b for solder connection with and an electrode pattern 21d for soldering with the chip component 18. Reference numeral 25 is solder for connecting the board 21 and the connector 64, and the electrode pattern 21b of the board 21 and the terminal 64a of the connector 64 are soldered. Note that the four substrates 2
In No. 1, the mounted parts are omitted.

【0038】次に、組立工程について述べる。両面に部
品の搭載された基板21の端部が溶融半田槽に浸漬され
て電極パターン21bに半田25がコーティングされ
る。半田コーティングされた基板21の両端がコネクタ
64の溝状の基板嵌合部641c〜644c、にそれぞ
れ挿入(圧入)された後、加熱炉において半田25を再
溶融して基板21とコネクタ64の各爪641a〜64
4aの間が接続される。このようにして、基板21の端
子付けが完了する。尚、端子付けのための半田25の再
溶融はプリント基板への搭載時に同時に行ってもよい。
また、基板21の電極パターン21bとコネクタ64の
各爪641a〜644aの電気的接続に際して、半田2
5の代わりに導電性接着剤を塗布することにより接続し
てもよい。
Next, the assembly process will be described. The ends of the substrate 21 having components mounted on both sides are immersed in a molten solder bath to coat the electrode pattern 21b with solder 25. After both ends of the solder-coated board 21 are inserted (press-fitted) into the groove-shaped board fitting portions 641c to 644c of the connector 64, the solder 25 is remelted in a heating furnace to remove each of the board 21 and the connector 64. Claws 641a to 64
4a are connected. In this way, the terminal attachment of the substrate 21 is completed. The remelting of the solder 25 for attaching the terminals may be performed at the same time when the solder 25 is mounted on the printed board.
In addition, when the electrode pattern 21b of the substrate 21 and the claws 641a to 644a of the connector 64 are electrically connected, the solder 2
The connection may be made by applying a conductive adhesive instead of 5.

【0039】端子付けの完了した基板アセンブリは通常
の電子部品と同様の方法により、半田ペーストの塗布さ
れたプリント基板の半田パターン上に搭載され、半田を
溶融することによりコネクタ64の下面とプリント基板
16の半田パターン16aが半田17で固着される。
尚、基板21と各爪641a〜644aの接続方法とし
て第3〜第4の実施例のごときコネクタ34、44(導
電性ボール、突起等が設けられたコネクタ)による接続
方法と同様な方法も可能である。
The board assembly having the terminals attached thereto is mounted on the solder pattern of the printed board to which the solder paste has been applied by the same method as that for a normal electronic component, and the solder is melted to melt the solder and the lower surface of the connector 64 and the printed board. The 16 solder patterns 16 a are fixed by the solder 17.
As a method of connecting the substrate 21 and the claws 641a to 644a, a method similar to the method of connecting with the connectors 34 and 44 (connectors provided with conductive balls, protrusions, etc.) as in the third to fourth embodiments is also possible. Is.

【0040】以上のように本実施例では、複数の基板を
1つのコネクタに接続できるので実装密度が一層向上す
る。また、基板の枚数に関係なくプリント基板間の間隔
を一定に抑えられる。
As described above, in this embodiment, a plurality of substrates can be connected to one connector, so that the mounting density is further improved. Further, the distance between the printed boards can be kept constant regardless of the number of boards.

【0041】[0041]

【発明の効果】以上説明したように、本発明では基板を
プリント基板に挿着するに際して機械的強度を向上さ
せ、且つ、端子間隔を狭くして実装密度が向上できる。
As described above, according to the present invention, when the board is inserted into the printed board, the mechanical strength can be improved and the terminal space can be narrowed to improve the mounting density.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の第1の実施例の端子構造のコネクタを
説明するための図で(a)は正面図、(b)はA−A断
面図である。
FIG. 1 is a view for explaining a connector having a terminal structure according to a first embodiment of the present invention, (a) is a front view and (b) is an AA cross-sectional view.

【図2】本発明の第1の実施例の端子構造を説明するた
めの図で(a)は上面図(基板アセンブリ部のみ)、
(b)はA−A断面図(コネクタ挿着、プリント基板半
田付け後)である。
FIG. 2 is a diagram for explaining the terminal structure of the first embodiment of the present invention, FIG. 2A is a top view (only a substrate assembly portion),
(B) is a cross-sectional view taken along the line AA (after inserting the connector and soldering the printed circuit board).

【図3】本発明の第2の実施例の端子構造を説明するた
めの図で(a)はコネクタ正面図、(b)はコネクタA
−A断面図、(c)はコネクタ挿着後の断面図である。
3A and 3B are diagrams for explaining a terminal structure of a second embodiment of the present invention, FIG. 3A is a front view of a connector, and FIG.
-A sectional drawing, (c) is sectional drawing after a connector insertion.

【図4】本発明の第3の実施例の端子構造を説明するた
めの図で(a)はコネクタ正面図、(b)はコネクタA
−A断面図、(c)はコネクタ挿着後の断面図である。
4A and 4B are views for explaining a terminal structure according to a third embodiment of the present invention, in which FIG. 4A is a front view of a connector and FIG.
-A sectional drawing, (c) is sectional drawing after a connector insertion.

【図5】本発明の第4の実施例の端子構造を説明するた
めの図で(a)はコネクタ正面図、(b)はコネクタA
−A断面図、(c)はコネクタ挿着後の断面図である。
5A and 5B are views for explaining a terminal structure of a fourth embodiment of the present invention, where FIG. 5A is a front view of a connector and FIG.
-A sectional drawing, (c) is sectional drawing after a connector insertion.

【図6】本発明の第5の実施例の端子構造を説明するた
めの図で(a)はコネクタ正面図、(b)はコネクタA
−A断面図、(c)はコネクタ挿着後の断面図である。
6A and 6B are views for explaining a terminal structure according to a fifth embodiment of the present invention, where FIG. 6A is a front view of a connector and FIG.
-A sectional drawing, (c) is sectional drawing after a connector insertion.

【図7】本発明の第6の実施例の端子構造を説明するた
めの図で(a)はコネクタ正面図、(b)はコネクタA
−A断面図、(c)はコネクタ挿着後の断面図である。
7A and 7B are views for explaining a terminal structure of a sixth embodiment of the present invention, in which FIG. 7A is a front view of a connector and FIG.
-A sectional drawing, (c) is sectional drawing after a connector insertion.

【図8】従来の端子構造を説明するための断面図であ
る。
FIG. 8 is a cross-sectional view for explaining a conventional terminal structure.

【符号の説明】[Explanation of symbols]

11、21、31、41・・・基板、 12
・・・・半導体チップ 14、24、34、44・・・コネクタ、 1
3、15・・・ワイヤ 14a、24a、34a、44a・・・端子、 16
・・・・プリント基板 14b、24b、34b、44b・・・樹脂部、 34
d・・・導電性ボール 14c、24c、34c、44c・・・基板嵌合部、
44d・・・突起
11, 21, 31, 41 ... Substrate, 12
.... Semiconductor chips 14, 24, 34, 44 ... Connector, 1
3, 15 ... Wires 14a, 24a, 34a, 44a ... Terminals, 16
.... Printed circuit boards 14b, 24b, 34b, 44b ... Resin portion, 34
d ... Conductive balls 14c, 24c, 34c, 44c ... Board fitting portion,
44d ... Protrusion

Claims (8)

【特許請求の範囲】[Claims] 【請求項1】 プリント基板に設けられた複数の電極と
対応して接続される電子部品の搭載されたサブ基板の端
子構造において、 前記サブ基板の周辺部に設けられた複数の電極と、 前記サブ基板と嵌合するための溝部を有し、複数の概略
断面コの字型の電極端子を所定の間隔で保持する絶縁体
のホルダと、 前記サブ基板の電極と前記電極端子とを接続する接続部
材からなり、 前記サブ基板の周辺部が前記ホルダの溝部に嵌合され、
前記サブ基板の複数の電極と前記複数の電極端子とが前
記接続部材によりそれぞれ対応して接続されてなること
を特徴とする端子構造。
1. A terminal structure of a sub-board on which an electronic component is mounted, which is connected to a plurality of electrodes provided on a printed circuit board, wherein the plurality of electrodes are provided in a peripheral portion of the sub-board, An insulator holder, which has a groove for fitting with the sub-board and holds a plurality of U-shaped electrode terminals having a substantially U-shaped cross section at predetermined intervals, connects the electrode of the sub-board and the electrode terminal. A connecting member, the peripheral portion of the sub-board is fitted into the groove of the holder,
A terminal structure in which a plurality of electrodes of the sub-board and the plurality of electrode terminals are correspondingly connected by the connecting member.
【請求項2】 プリント基板に設けられた複数の電極と
対応して接続される電子部品の搭載された複数のサブ基
板の端子構造において、 複数の前記サブ基板の周辺部に設けられた複数の電極
と、 それぞれの前記サブ基板と嵌合するための複数の溝部を
有し、複数の前記溝部のそれぞれに対応して複数の概略
断面コの字型の電極端子を所定の間隔で保持する絶縁体
のホルダと、 前記サブ基板の電極と前記電極端子とを接続する接続部
材からなり、 複数の前記サブ基板の周辺部が前記ホルダの溝部に嵌合
され、それぞれの前記サブ基板の複数の電極と前記複数
の電極端子とが前記接続部材によりそれぞれ対応して接
続されてなることを特徴とする端子構造。
2. In a terminal structure of a plurality of sub-boards on which electronic components are connected corresponding to a plurality of electrodes provided on a printed circuit board, a plurality of sub-boards provided on the periphery of the plurality of sub-boards are provided. An insulation that has electrodes and a plurality of groove portions for fitting with the respective sub-boards, and that holds a plurality of U-shaped electrode terminals having a substantially U-shaped cross section at predetermined intervals corresponding to the plurality of groove portions. A holder of the body, and a connecting member that connects the electrode of the sub-board and the electrode terminal, the peripheral portion of the plurality of sub-boards are fitted into the groove of the holder, the plurality of electrodes of each sub-board And a plurality of electrode terminals correspondingly connected by the connecting member, respectively.
【請求項3】 前記接続部材が導線であって、 前記サブ基板の複数の電極と前記複数の電極端子とがそ
れぞれ対応して前記導線により接続されてなることを特
徴とする請求項1又は請求項2記載の端子構造。
3. The connection member is a lead wire, and the plurality of electrodes of the sub-board and the plurality of electrode terminals are correspondingly connected to each other by the lead wire. Item 2. The terminal structure according to item 2.
【請求項4】 前記導線は、前記サブ基板の複数の電極
と前記複数の電極端子とにそれぞれ対応してボンディン
グにより接続されてなることを特徴とする請求項3記載
の端子構造。
4. The terminal structure according to claim 3, wherein the conductive wire is connected by bonding corresponding to the plurality of electrodes of the sub-board and the plurality of electrode terminals, respectively.
【請求項5】 前記接続部材が半田であって、 前記サブ基板の複数の電極と前記複数の電極端子とがそ
れぞれ対応して前記半田により接続されてなることを特
徴とする請求項1又は請求項2記載の端子構造。
5. The connection member is solder, and the plurality of electrodes of the sub-board and the plurality of electrode terminals are correspondingly connected to each other by the solder. Item 2. The terminal structure according to item 2.
【請求項6】 前記接続部材が導電性接着剤であって、 前記サブ基板の複数の電極と前記複数の電極端子とがそ
れぞれ対応して前記導電性接着剤により接続されてなる
ことを特徴とする請求項1又は請求項2記載の端子構
造。
6. The connecting member is a conductive adhesive, and the plurality of electrodes of the sub-board and the plurality of electrode terminals are correspondingly connected to each other by the conductive adhesive. The terminal structure according to claim 1 or 2.
【請求項7】 前記接続部材が前記ホルダに含有された
導電性の粒子であって、 前記サブ基板の複数の電極と前記複数の電極端子とがそ
れぞれ対応して前記導電性の粒子に圧接されてなること
を特徴とする請求項1又は請求項2記載の端子構造。
7. The connection member is a conductive particle contained in the holder, and the plurality of electrodes of the sub-substrate and the plurality of electrode terminals are correspondingly pressed against the conductive particle. The terminal structure according to claim 1 or 2, wherein
【請求項8】 前記接続部材が前記複数の電極端子にそ
れぞれ設けられた突起であって、 前記サブ基板の複数の電極と前記複数の電極端子の突起
とがそれぞれ対応して圧接されてなることを特徴とする
請求項1又は請求項2記載の端子構造。
8. The connection member is a protrusion provided on each of the plurality of electrode terminals, and the plurality of electrodes of the sub-board and the protrusions of the plurality of electrode terminals are correspondingly pressed against each other. The terminal structure according to claim 1 or 2, characterized in that.
JP7338583A 1995-12-26 1995-12-26 Terminal structure Withdrawn JPH09181121A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7338583A JPH09181121A (en) 1995-12-26 1995-12-26 Terminal structure

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7338583A JPH09181121A (en) 1995-12-26 1995-12-26 Terminal structure

Publications (1)

Publication Number Publication Date
JPH09181121A true JPH09181121A (en) 1997-07-11

Family

ID=18319547

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7338583A Withdrawn JPH09181121A (en) 1995-12-26 1995-12-26 Terminal structure

Country Status (1)

Country Link
JP (1) JPH09181121A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI704807B (en) * 2015-04-24 2020-09-11 南韓商Lg伊諾特股份有限公司 Camera module for automobiles

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI704807B (en) * 2015-04-24 2020-09-11 南韓商Lg伊諾特股份有限公司 Camera module for automobiles

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