JPH09174394A - Polishing method of semiconductor wefer - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent generation of surface trailing after polishing work by dividing the polishing time required for completing the polishing work into several steps, providing a rest time between the divided polishing steps, and applying multiple step polishing to a semiconductor wafer. SOLUTION: Since there is no surface trailing substantially at the time of polishing from a finishing polishing start to about 1-3(minute), short-time finishing polishing is repeated in multi-stage, thereby fixing polishing semiconductor wafer with a high flatness. Namely, the first 1-3(minute) in which increase of surface trailing starts is the 1st stage polishing time, and a rest time for about 10(sec.) is prepared between respective 1st step finish polishing operations. With the progress of each step, the No. of abrasive grain and the No. of polishing cloth is increased, thereby improving flatness and micro-roughness.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for polishing a semiconductor wafer obtained by mirror polishing the surface.

[0002]

2. Description of the Related Art In recent years, the demand for flatness of semiconductor wafers has been increasing for the purpose of improving the yield in the device process. As a method of manufacturing a semiconductor wafer having this high flatness, Japanese Patent Application No. 7-79 filed by the present applicant is used.
No. 266, “Semiconductor Wafer Polishing Method”. This is because it is possible to manufacture semiconductor wafers with high flatness, especially with a uniform thickness, by polishing the both surfaces at the same time, instead of etching that has been conventionally performed to remove the processing distortion of the wrapped wafer, and then performing final polishing. It was made possible.

[0003]

However, even if a semiconductor wafer having a uniform thickness is obtained by the above-mentioned double-sided polishing, a surface sagging occurs due to polishing in the subsequent step, that is, the double-sided polishing. There is a problem that the high flatness obtained in step 1 is destroyed. The present invention has been made in view of the above problems, and an object of the present invention is to provide a method for polishing a semiconductor wafer, which is capable of producing a semiconductor wafer having high flatness by preventing surface warping due to polishing.

[0004]

Therefore, in the present invention, in the method for polishing a semiconductor wafer in which the surface is polished to obtain a semiconductor wafer, the polishing time required to complete the polishing is divided into at least two stages, and the division is performed. A rest time is provided between the polishing operations, and a single semiconductor wafer is polished in multiple stages.

[0005]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The polishing method of the present invention will be described below with reference to the drawings. FIG. 1 is a graph comparing changes in surface roughness between a polishing method of the present invention and a conventional polishing method, and FIG. 2 is a graph showing an increase in surface roughness due to finish polishing in the conventional technology.

For the sake of convenience, the variation of the surface sag in the continuous finish polishing will be described here. The time required for the final polishing after the rough polishing is about 5 to 10 minutes. As shown in FIG. 2, there is almost no change from the start of polishing to about 1 to 3 minutes, and the change in time and surface sag in this final polishing gradually increases, and then from about 4 minutes or more. It increases sharply, and about 5 to 10 minutes after the completion of the finish polishing, it becomes about 5 to 10 times the surface sag after the first 1 to 3 minutes.

Therefore, in the present invention, paying attention to the fact that there is almost no surface sagging due to polishing from the start of this final polishing to about 1 to 3 minutes, and by repeating the final polishing for a short time in multiple stages, a semiconductor with high flatness is obtained. The wafer is finished and polished. In other words, about 1 to 3 minutes when the increase of the surface roughness starts is defined as one stage of final polishing time, and a rest time is provided between each one stage of final polishing.

[0008]

EXAMPLE Here, the change in surface deviation between the polishing method of the present invention and the conventional continuous polishing is compared with the result of an experiment in which 8 inch wafers were subjected to finish polishing. In this experiment, first, an 8-inch wafer was finish-polished for 6 minutes by the same continuous polishing as in the conventional case, and the change in the surface roughness in this polishing was measured. As a result, as shown in FIG. 2, there is almost no change in the surface deflection from the start of polishing to about 2 minutes, but after that, it gradually increases and the rate of increase becomes sharp after about 4 minutes. Therefore, the final polishing for 2 minutes was defined as one stage of polishing, and the final polishing was performed by dividing into 3 times, and the rest time between each final polishing was 10 seconds. As a result, as shown in FIG. 2 as well, there is almost no sagging on the polished surface after finishing polishing.

In the above polishing method, the abrasive grains and the polishing cloth used in the polishing in each stage in both the rough polishing and the finish polishing are uniform, but the polishing in each stage proceeds. Accordingly, the flatness and the microroughness can be further improved by increasing the numbers of the abrasive grains and the polishing cloth.

Further, as the counts of the abrasive grains and the polishing cloth are changed, the polishing time for each step is not made uniform, but the polishing time for the low-grained abrasive grains and polishing cloth is shortened and increased. Throughput can be improved by prolonging the polishing time with a count abrasive grain and a polishing cloth.

Further, in the above embodiment, the final polishing is performed three times.
Although it was divided into two times, polishing for 2 minutes was made one step each, and rest time was 10 seconds, but it is not limited to this,
Two-step polishing may be used to improve throughput,
On the contrary, multi-step polishing of four or more steps may be performed to improve the finish. Further, the rest time is preferably 10 seconds or more in consideration of cooling of the polishing surface, but is preferably 60 minutes or less in consideration of adverse effects on the surface when left standing.

[0012]

According to the present invention, the configuration is as described above.
There is an excellent effect that it is possible to manufacture a semiconductor wafer having high flatness by preventing surface sagging due to finish polishing.

[Brief description of the drawings]

FIG. 1 is a graph comparing changes in surface roughness between a polishing method of the present invention and a conventional polishing method.

FIG. 2 is a graph showing an increase in surface deviation due to finish polishing in the prior art.

Claims (3)

[Claims] 1. A semiconductor wafer polishing method for polishing a surface to obtain a semiconductor wafer, wherein a polishing time required until the polishing is completed is divided into at least two stages, and a rest time is provided between the divided polishing. And a multi-step polishing for one semiconductor wafer. 2. The method for polishing a semiconductor wafer according to claim 1, wherein each one-step polishing time is set to 1 to 3 minutes. 3. The method of polishing a semiconductor wafer according to claim 1, wherein the polishing in the subsequent stage is performed with a higher number of abrasive grains and / or polishing cloth than in the polishing in the previous stage.