JPH09167116A - コンピュータキャッシュシステム - Google Patents

コンピュータキャッシュシステム

Info

Publication number
JPH09167116A
JPH09167116A JP8315894A JP31589496A JPH09167116A JP H09167116 A JPH09167116 A JP H09167116A JP 8315894 A JP8315894 A JP 8315894A JP 31589496 A JP31589496 A JP 31589496A JP H09167116 A JPH09167116 A JP H09167116A
Authority
JP
Japan
Prior art keywords
cache
block
memory
bus
data block
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8315894A
Other languages
English (en)
Japanese (ja)
Other versions
JPH09167116A5 (enExample
Inventor
Philippe Moenne-Loccoz
モエン−ロコッツ・フィリップ
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
HP Inc
Original Assignee
Hewlett Packard Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hewlett Packard Co filed Critical Hewlett Packard Co
Publication of JPH09167116A publication Critical patent/JPH09167116A/ja
Publication of JPH09167116A5 publication Critical patent/JPH09167116A5/ja
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0866Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches for peripheral storage systems, e.g. disk cache

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
JP8315894A 1995-12-01 1996-11-27 コンピュータキャッシュシステム Pending JPH09167116A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR95410138.2 1995-12-01
EP95410138A EP0777183B1 (en) 1995-12-01 1995-12-01 Computer cache system

Publications (2)

Publication Number Publication Date
JPH09167116A true JPH09167116A (ja) 1997-06-24
JPH09167116A5 JPH09167116A5 (enExample) 2004-08-12

Family

ID=8221568

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8315894A Pending JPH09167116A (ja) 1995-12-01 1996-11-27 コンピュータキャッシュシステム

Country Status (4)

Country Link
US (1) US5933848A (enExample)
EP (1) EP0777183B1 (enExample)
JP (1) JPH09167116A (enExample)
DE (1) DE69527634T2 (enExample)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011141657A (ja) * 2010-01-06 2011-07-21 Yokogawa Electric Corp データ処理装置
JP2018537765A (ja) * 2015-11-09 2018-12-20 インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Machines Corporation ストレージ書き込みキャッシュ管理用のハードウェア・アクセラレータの実装のためのデータ・ストレージ・システム、方法、および設計構造

Families Citing this family (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6574682B1 (en) * 1999-11-23 2003-06-03 Zilog, Inc. Data flow enhancement for processor architectures with cache
JP4097883B2 (ja) * 2000-07-04 2008-06-11 松下電器産業株式会社 データ転送装置および方法
US7177912B1 (en) 2000-12-22 2007-02-13 Datacore Software Corporation SCSI transport protocol via TCP/IP using existing network hardware and software
US20030033476A1 (en) * 2001-08-07 2003-02-13 Toshiba Tec Kabushiki Kaisha Image forming apparatus and hard disc drive data transfer method for image forming apparatus
TWI229260B (en) * 2001-08-23 2005-03-11 Via Tech Inc Driving method for data storage device
US6687793B1 (en) * 2001-12-28 2004-02-03 Vignette Corporation Method and system for optimizing resources for cache management
US6981123B2 (en) * 2003-05-22 2005-12-27 Seagate Technology Llc Device-managed host buffer
US7526608B2 (en) * 2004-05-28 2009-04-28 Sony Computer Entertainment Inc. Methods and apparatus for providing a software implemented cache memory
US7590803B2 (en) * 2004-09-23 2009-09-15 Sap Ag Cache eviction
US20060143398A1 (en) * 2004-12-23 2006-06-29 Stefan Rau Method and apparatus for least recently used (LRU) software cache
US7539821B2 (en) 2004-12-28 2009-05-26 Sap Ag First in first out eviction implementation
US20060143256A1 (en) 2004-12-28 2006-06-29 Galin Galchev Cache region concept
US7318127B2 (en) * 2005-02-11 2008-01-08 International Business Machines Corporation Method, apparatus, and computer program product for sharing data in a cache among threads in an SMT processor
US7752386B1 (en) 2005-12-29 2010-07-06 Datacore Software Corporation Application performance acceleration
US8862813B2 (en) 2005-12-29 2014-10-14 Datacore Software Corporation Method, computer program product and appartus for accelerating responses to requests for transactions involving data operations
US9311240B2 (en) 2012-08-07 2016-04-12 Dell Products L.P. Location and relocation of data within a cache
US9367480B2 (en) * 2012-08-07 2016-06-14 Dell Products L.P. System and method for updating data in a cache
US9495301B2 (en) 2012-08-07 2016-11-15 Dell Products L.P. System and method for utilizing non-volatile memory in a cache
US9852073B2 (en) 2012-08-07 2017-12-26 Dell Products L.P. System and method for data redundancy within a cache
US9549037B2 (en) 2012-08-07 2017-01-17 Dell Products L.P. System and method for maintaining solvency within a cache
WO2017031637A1 (zh) * 2015-08-21 2017-03-02 华为技术有限公司 一种内存访问方法、装置和系统
TWI604373B (zh) * 2016-12-13 2017-11-01 慧榮科技股份有限公司 資料儲存裝置及其資料維護方法

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01281545A (ja) * 1988-05-09 1989-11-13 Fujitsu Ltd キャッシュメモリ制御方式
US5423015A (en) * 1988-10-20 1995-06-06 Chung; David S. F. Memory structure and method for shuffling a stack of data utilizing buffer memory locations
US5163131A (en) * 1989-09-08 1992-11-10 Auspex Systems, Inc. Parallel i/o network file server architecture
US5289581A (en) * 1990-06-29 1994-02-22 Leo Berenguel Disk driver with lookahead cache
US5381539A (en) * 1992-06-04 1995-01-10 Emc Corporation System and method for dynamically controlling cache management
US5420984A (en) * 1992-06-30 1995-05-30 Genroco, Inc. Apparatus and method for rapid switching between control of first and second DMA circuitry to effect rapid switching beween DMA communications

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011141657A (ja) * 2010-01-06 2011-07-21 Yokogawa Electric Corp データ処理装置
JP2018537765A (ja) * 2015-11-09 2018-12-20 インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Machines Corporation ストレージ書き込みキャッシュ管理用のハードウェア・アクセラレータの実装のためのデータ・ストレージ・システム、方法、および設計構造

Also Published As

Publication number Publication date
DE69527634T2 (de) 2002-11-28
US5933848A (en) 1999-08-03
DE69527634D1 (de) 2002-09-05
EP0777183A1 (en) 1997-06-04
EP0777183B1 (en) 2002-07-31

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