JPH09162277A - Semiconductor substrate and manufacture thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method of manufacturing a semiconductor substrate which is structured so as to be capable of protecting metal atoms comprised in a metal silicide buried layer against oxidation and dispersion and preventing the metal silicide layer from coming off from a substrate support due to oxidation. SOLUTION: A dielectric isolation semiconductor substrate is composed of a single crystal silicon substrate 101 which includes an element forming part, a metal silicide buried layer 111 below the single crystal silicon substrate 101, and a silicon oxide insulating layer 131 sandwiched in between a substrate support 121 and the buried layer 111, wherein the metal silicide buried layer 111 and the silicon oxide insulating layer 131 are not exposed on the primary surface of the dielectric isolation silicon substrate 101.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a silicon semiconductor substrate having a metal silicide embedded layer and a method of manufacturing the same.
In particular, the present invention relates to a semiconductor substrate having a structure capable of preventing oxidation and scattering of metal atoms constituting a metal silicide burying layer and preventing peeling of a metal silicide layer from a substrate support due to oxidation, and a method for manufacturing the same.

[0002]

2. Description of the Related Art In order to reduce the resistance of a buried layer in a single crystal silicon region of a semiconductor device using a dielectric isolation semiconductor substrate, it has been effective to provide a metal silicide buried layer. It has been known. That is, a conventional dielectric isolation substrate structure will be described with reference to FIG. 3. A single crystal silicon substrate 301 including an element formation portion, a buried layer 311 made of metal silicide under the single crystal silicon portion, a substrate support 321, and the substrate support. The structure includes a silicon oxide insulating layer 331 sandwiched between 321 and the buried layer 311.

[0003]

However, in the structure of the prior art described above, since the buried layer 311 made of metal silicide is exposed on the main surface of the dielectric substrate 300, the transistor is formed on the single crystal silicon substrate portion 301. In the manufacturing process of forming elements such as, especially in the diffusion and oxidation processes, there is a problem that the metal atoms forming the metal silicide burying layer 311 are oxidized and scattered to contaminate the surface of the single crystal silicon substrate portion 301. Were present.

Further, in the conventional structure, the silicon oxide insulating layer 321 sandwiched between the substrate support 321 and the metal silicide burying layer 321 is exposed on the main surface of the dielectric substrate 300. It is known that in such a silicon oxide insulating layer 321, the diffusion rate of oxygen is higher than that in single crystal silicon. Therefore, in the oxidation step of forming a silicon oxide film on the surface of the single crystal silicon substrate portion 301, oxygen atoms diffuse in the silicon oxide insulating layer 331, and the oxygen atoms also fill the metal silicide with the metal silicide. Since the metal silicide embedded layer 311 is supplied to the embedded layer 311, the metal silicide embedded layer 311 is oxidized even in a portion not exposed on the main surface of the dielectric substrate 300, the adhesiveness is reduced, and the stress is increased to cause peeling. That is, problems such as an increase in wiring resistance of the metal silicide burying layer 311 occur.

Further, in the polishing stopper structure shown in FIG. 4 which is used for controlling the polishing film thickness when thinning the single crystal silicon substrate portion 401 for forming elements such as transistors by the polishing method, the thin film is also used. Since the polishing stopper 441 made of silicon oxide is exposed on the surface after the conversion, oxygen atoms diffuse through the polishing stopper 441 and reach the metal silicide burying layer 431, and the same problem occurs.

An object of the present invention is to solve the problems of the prior art described above, to prevent oxidation and scattering of metal atoms constituting a metal silicide buried layer, and to support the metal silicide layer on a substrate by oxidation. It is an object of the present invention to provide a semiconductor substrate having a structure capable of preventing separation from the body and a method for manufacturing the semiconductor substrate.

[0007]

Means for Solving the Problems The above object is to provide a single crystal silicon substrate portion including an element forming portion, a buried layer made of metal silicide under the single crystal silicon portion, and a silicon sandwiched between a substrate support and a buried layer. A dielectric-isolated semiconductor substrate comprising an oxide insulating layer, wherein the metal silicide burying layer and the silicon oxide insulating layer are not exposed on the main surface of the dielectric-isolated silicon substrate. In the substrate, the shorter one of the distances between the main surface of the semiconductor substrate and the metal silicide buried layer or between the substrate support and the silicon oxide layer sandwiched by the buried layer is at least the single crystal silicon. A semiconductor substrate having a structure larger than the thickness of the substrate portion, and in the above semiconductor substrate,
A polishing stopper made of silicon oxide used as a polishing stopper when polishing a single crystal silicon substrate portion in a thin film,
A substrate support and a semiconductor substrate having a structure in which the substrate support and the silicon oxide insulating layer sandwiched by the buried layer are not in contact with each other, and in the above semiconductor substrate, polishing is performed when thin-film polishing the single crystal silicon substrate portion. The shorter of the distances between the polishing stopper made of silicon oxide used as the stopper and the metal silicide buried layer or between the substrate support and the silicon oxide insulating layer sandwiched by the buried layer is at least This can be achieved by using a semiconductor substrate having a structure larger than the thickness of the single crystal silicon substrate portion after thin film polishing.

In summary, the metal silicide burying layer and the silicon oxide insulating layer are used as a semiconductor substrate having a structure in which the main surface of the dielectric substrate is not exposed, and the single crystal silicon substrate portion is thinned. The polishing stopper used at this time is a semiconductor substrate having a structure separated from the silicon oxide insulating layer.

That is, since the metal silicide burying layer and the silicon oxide insulating layer are not exposed on the main surface of the substrate, oxygen atoms do not reach the metal silicide burying layer in the diffusion and oxidation steps. It becomes possible to suppress the oxidation of the metal silicide embedded layer. Therefore, the oxidized metal atoms are scattered to contaminate the surface of the single crystal silicon substrate, the adhesiveness is decreased, the stress is increased to cause peeling, and the wiring resistance of the metal silicide burying layer is increased. It does not cause any problems.

[0010]

BEST MODE FOR CARRYING OUT THE INVENTION Hereinafter, a semiconductor substrate having the structure of the present invention and a method for manufacturing the same will be specifically described with reference to embodiments of the invention.

[0011]

First Embodiment First, an outline of the configuration of an example of an embodiment of the present invention is as shown in FIG. 1, which is composed of a single crystal silicon substrate portion 101 including an element forming portion and a metal silicide under the single crystal silicon portion. It is shown that the structure is a dielectric isolation substrate including a buried layer 111, a substrate support 121, and a silicon oxide insulating layer 131 sandwiched between the substrate support 121 and the buried layer 111. In the case of this structure, the metal silicide burying layer 111 and the silicon oxide insulating layer 131 have the dielectric isolation silicon substrate 100.
Since it is not exposed on the main surface of
1, the process of forming elements such as transistors, especially diffusion,
In the oxidation step, the metal atoms forming the metal silicide burying layer 111 are oxidized and scattered, resulting in the single crystal silicon substrate portion.
Does not contaminate the surface of 101.

[0012] In the manufacturing process of the single crystal silicon substrate portion 101 to form an element such as a transistor, it is not formed by the thickness t _a or more thick oxide film by thermal oxidation of the single crystal silicon substrate portion 101 . Thus, by greater than the thickness t _a of the metal silicide buried layer 111 and the silicon oxide the distance t _b until the insulating layer 131 single crystal silicon substrate 101 from the main surface of the dielectric separating the silicon substrate 100,
The oxide film formed on the main surface of the dielectric isolation silicon substrate 100 does not come into contact with the metal silicide burying layer 111 and the silicon oxide insulating layer 131 during the manufacturing process for forming an element such as a transistor. That is, the metal silicide buried layer 11
If the metal atoms that make up 1 oxidize and the adhesion decreases,
There is no problem such as increase in stress and peeling, and increase in wiring resistance.

[0013]

Second Embodiment Another example of the embodiment of the present invention will be described with reference to FIG. In this case, the single crystal silicon substrate portion 201 including the element forming portion, the embedded layer 211 made of metal silicide under the single crystal silicon substrate portion, the substrate support 221, the substrate support 221 and the embedded layer 211 are sandwiched. The dielectric isolation substrate structure includes a silicon oxide insulating layer 231 and a polishing stopper 241 made of silicon oxide, which is used to control the film thickness when thin-film polishing the single crystal silicon substrate portion 201.

Also in the case of this structure, since the metal silicide burying layer 211 and the silicon oxide insulating layer 231 are not exposed on the main surface of the dielectric isolation silicon substrate 200 as in the case of the first embodiment, In the manufacturing process of forming an element such as a transistor on the single crystal silicon substrate 201, particularly in the diffusion and oxidation processes, the metal atoms forming the metal silicide burying layer 211 are oxidized and scattered and the surface of the single crystal silicon substrate 201 is exposed. No pollution.

Further, a polishing stopper 241 used for controlling the polishing film thickness when thinning the single crystal silicon substrate portion 201 for forming an element such as a transistor by a polishing method is used for the dielectric isolation silicon substrate 200 after the thinning. Even when exposed to the main surface, since the polishing stopper 241 is not in contact with the metal silicide burying layer 211 and the silicon oxide insulating layer 231, the metal silicide 211 has an oxygen diffusion rate higher than that in single crystal silicon. Polishing stopper 241 made of fast silicon oxide
It is not oxidized by the oxygen atoms that have diffused. Also in the case of this structure, the distance t _d from the polishing stopper 241 to the metal silicide burying layer 211 or the silicon oxide insulating layer 231 is set to the thickness of the single crystal silicon substrate portion 201, as in the case of the first embodiment. By making it larger than t _c, the oxide film grown from the polishing stopper 241 does not come into contact with the metal silicide burying layer 211 and the silicon oxide insulating layer 231 during the manufacturing process for forming an element such as a transistor. That is, problems may occur such that metal atoms forming the metal silicide burying layer 211 are oxidized and adhesiveness is lowered, stress is increased to cause peeling, and wiring resistance is increased. Absent.

[0016]

As described above, by using the semiconductor substrate and the method for manufacturing the same as the substrate having the structure of the present invention and the method for manufacturing the same, the problems of the prior art can be solved and the metal silicide can be embedded. Oxidation of the metal atoms that make up the layer,
It has been possible to provide a semiconductor substrate having a structure capable of preventing scattering and preventing the metal silicide layer from being separated from the substrate support due to oxidation, and a method for manufacturing the semiconductor substrate.

[Brief description of the drawings]

FIG. 1 is a sectional view showing an outline of a configuration of a semiconductor substrate according to a first embodiment.

FIG. 2 is a sectional view showing an outline of the configuration of a semiconductor substrate according to a second embodiment.

FIG. 3 is a cross-sectional view showing the outline of the configuration of a conventional semiconductor substrate.

FIG. 4 is a sectional view showing an outline of the configuration of a conventional semiconductor substrate having a polishing stopper.

[Explanation of reference numerals] 101, 201, 301, 401 ... Single crystal silicon substrate portion, 111, 21
1, 311, 411 ... Metal silicide buried layer, 121, 221, 321,
421 ... substrate support, 131,231,331,431 ... silicon oxide insulating layer, 241,441 ... polishing stopper made of silicon oxide, t _a ... single crystal substrate portion thickness, t _b ... dielectric isolated silicon The shorter one of the distances from the main surface of the substrate to the metal silicide burying layer or the silicon oxide insulating layer, t _c ...
The thickness of the single crystal silicon substrate portion, t _d ... The shorter one of the distances from the polishing stopper to the metal silicide burying layer or the silicon oxide insulating layer.

Claims (4)

[Claims] 1. A single crystal silicon substrate portion including an element forming portion,
A buried layer made of metal silicide under the single crystal silicon portion,
In a dielectric isolation semiconductor substrate comprising a silicon oxide insulating layer sandwiched between a substrate support and a buried layer, the metal silicide buried layer and the silicon oxide insulating layer are exposed on the main surface of the dielectric isolation silicon substrate. A semiconductor substrate characterized by not being. 2. In the semiconductor substrate, the shorter one of the distances between the main surface of the semiconductor substrate and the metal silicide buried layer or between the substrate support and the silicon oxide layer sandwiched by the buried layer. The semiconductor substrate according to claim 1, wherein the distance is at least larger than the thickness of the single crystal silicon substrate portion. 3. In the semiconductor substrate, a polishing stopper made of silicon oxide used as a polishing stopper when polishing a single crystal silicon substrate portion into a thin film, a substrate support and a silicon sandwiched between a substrate support and a buried layer. The semiconductor substrate according to claim 1, wherein the semiconductor substrate is not in contact with the oxide insulating layer. 4. In the semiconductor substrate, between a polishing stopper made of silicon oxide and a metal silicide burying layer used as a polishing stopper when polishing a single crystal silicon substrate portion in a thin film, or a substrate support and a burying layer. 4. The semiconductor substrate according to claim 3, wherein the shorter distance of the distance between the sandwiched silicon oxide insulating layer is at least larger than the thickness of the single crystal silicon substrate portion after thin film polishing.