JPH09140140A - Phase synchronous type gate pulse output apparatus, phase synchronous signal generating apparatus, and power converting apparatus and phase synchronous type gate pulse output method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To realize a process with a computer program without using a counter for the counting operation by providing a phase comparing means, a voltage-frequency converting means, a feedback signal generating means and a gate pulse generating means. SOLUTION: There are provided a phase comparing means 15 for comparing phases of the input voltages Va, Vb, Vc which are three-phase AC line voltage, namely input multi-phase AC signals and the feedback voltages Va0, Vb0, Vc0 as the feedback multi-phase AC signals, a VCO means 21 as the voltage-frequency converting means for converting an output signal VA2 from an adder 19 into the frequency signal related to voltage through the program process, a feedback signal generating means 23 and a frequency converting means 25 for inputting an output signal VA1 and outputting an output signal f. A gate pulse generating means 30 is formed by the frequency-time converting means 27, phase angle-time converting means 29 and pulse output means 31. Thereby, frequency of the input multi-phase AC signal can be detected quickly and phase control can be realized for the input multi-phase AC signal with higher accuracy.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a phase-locked gate pulse output device for generating a gate pulse that follows a sinusoidal AC signal with a fast response and controls the phase of the sinusoidal AC signal, and a device therefor. Method, a phase-synchronized signal generator that follows a sine-wave AC signal with a fast response and generates a signal synchronized with this sine-wave AC signal, and a direct-current AC that is phase-controlled by a phase-locked gate pulse output device The present invention also relates to a power conversion device that converts alternating current into direct current.

[0002]

2. Description of the Related Art FIG. 14 shows, for example, Japanese Patent Publication No. 60-3771.
It is a block diagram which shows the structure of the conventional phase detection apparatus shown by the 1st publication. In FIG. 14, 101, 102, 1
_{Reference numeral} 03 is a converter for converting the three-phase input voltages f _ou , f _ov , and f _ow into a square wave, 104, 105, and 106 are phase comparators, 1
Reference numeral 07 is an adder, 108 is a low-pass filter for removing harmonics, 109 is a V / F converter for converting an input voltage into a frequency, 110 and 111 are counters, and 112 is a three-phase square wave f _Iu , f _Iv , f _Iw. Is a decoder for making.

Next, the operation will be described. The V / F converter 109 receives the output voltage from the filter 108 and outputs a pulse according to this voltage value. Output pulses of the V / F converter 109 are counted and divided by counters 110 and 111. The output of the counter 111 is input to the decoder 112, and the decoder 112 outputs a three-phase voltage signal. This three-phase voltage signal is applied to the converter 10
Outputs corresponding to the pulses whose waveforms have been shaped by 1, 102 and 103 and phase comparators 104, 105 and 106, respectively.
Are compared in phase. Phase comparators 104, 105, 1
Reference numeral 06 outputs a square wave signal having a DC component proportional to the phase difference and having a frequency twice that of the input three-phase signal. The three phase difference signals are added by the adder 107 and become a square wave signal having a frequency six times that of the input AC signal. When this signal passes through the filter 108, a harmonic component is removed and a signal containing only a DC component is obtained. Then, the DC component becomes a signal proportional to the phase difference and is input to the V / F converter 109, and the control loop of FIG. 14 operates so that the phase difference signal becomes zero. In this control system, the phase comparators 104, 105 and 106, the filter 108
All the components such as H / W are configured. Further, the counters 110 and 111 determine the phase shift θ1 of the input voltage with respect to the reference voltage by detecting the time until a predetermined number of pulses are detected.

[0004]

[Problems to be solved by the invention]

(1) The conventional phase synchronization signal generator is formed by the H / W phase detector as described above, and includes the V / F converter 1
The counters 110 and 111 for detecting a predetermined number of output pulses from the 09 are included. This V / F
The pulse output from the converter 109 is several (2 to 3) μ
The counter 11 which is output every s and is a high-speed counter
It was counting by 0,111. Here, when the output pulse is to be processed by the computer, it is necessary to perform the interrupt processing at least every several μs. Therefore, there is a problem that a general-purpose and inexpensive CPU with a CPU clock of up to about several MHz cannot be used for interrupt processing every several μs, or other tasks and processes are disturbed. . (2) Further, the V / F converter 109 and the phase comparator 10
All components such as 4, 105, and 106 are configured by H / W. Therefore, it is necessary to change the H / W when changing the circuit constant such as changing the time constant of the filter 108. Therefore, there is a problem in that not only it takes a long time to change, but also the cost is high because of the H / W configuration, and an extra space is required. Further, when the V / F converter 109 is used, since the V / F converter 109 is formed of an analog element, there is a problem that a drift phenomenon occurs and the accuracy is low. (3) Also, the V / F converter 109 and the counter 1
Some of the components other than 10, 111 were composed of S / W. Then, the counter 1 detects the phase shift θ1.
This is performed by detecting the pulse number of the output pulse of the V / F converter 109 with 10, 111. Therefore, since the frequency cannot be directly obtained from the output signal from the low pass filter 108, there is a problem that the frequency detection is slow. Then, the filter 108 becomes H /
When configured by W, since the response time of the filter 108 is long, there is a problem that the frequency detection time corresponding to the frequency fluctuation is long. (4) Further, the conventional phase-locked gate pulse output device cannot be integrally formed by S / W because of the reason (1) described above. Therefore, the number of constituent elements increases, and the V / F converter 109 is formed of analog elements.
There are problems that reliability is low, the device is large, and the cost is high. (5) Furthermore, in the conventional power converter, the accuracy of the gate pulse output by the phase-locked gate pulse output device is not good because of the reason (4) described above. Therefore, when converting power from AC to DC, there is a problem that a desired DC voltage cannot be obtained with respect to the input AC.

The present invention has been made to solve the above problems. Then, without using a counting counter, it is formed by a computer with S / W,
An object of the present invention is to provide a phase-locked gate pulse output device and a method thereof that can be processed by a computer program. Furthermore, without using a counting counter,
An object is to provide a phase synchronization signal output device that can be processed by a computer program. Still another object of the present invention is to provide a highly accurate power conversion device that can obtain a desired conversion voltage.

[0006]

SUMMARY OF THE INVENTION A phase-locked gate pulse output device according to the present invention is an input multi-phase AC signal, and a feedback in which a predetermined angular phase is different from an AC signal of each phase of the input multi-phase AC signal. A phase comparison means for inputting a multiphase alternating current signal, comparing the phases of the input multiphase alternating current signal and the feedback multiphase alternating current signal and outputting a phase difference signal, and inputting the phase difference signal from this phase comparing means Voltage-frequency conversion means for processing by a program of a computer based on the voltage value of a signal and a reference voltage to output a frequency signal related to the frequency of the input multi-phase AC signal, and a frequency signal input from this voltage-frequency conversion means Then, based on this frequency signal, a feedback signal generating means for outputting the feedback multi-phase AC signal, and a frequency signal from the voltage-frequency conversion means are input, and the input multi-phase AC signal and On the basis of the phase angle and the frequency signal calculated from a DC output voltage of Nozomu is obtained and a gate pulse generating means for generating a gate pulse to the phase control for the input polyphase AC signal.

Further, the gate pulse generating means calculates the time for generating the gate pulse based on the phase angle and the frequency signal and outputs the time signal, and the phase angle-time converting means outputs the time. Gate pulse output means for inputting a signal, detecting a gate pulse output time obtained from this time signal and a reference angle time of the input multi-phase AC signal by an interrupt signal, and outputting a gate pulse at the detected gate pulse output time And have. The interrupt signal is a clock pulse. The interrupt signal is an interrupt pulse from the reference angle time of the input multi-phase AC signal to a certain time, and is a clock pulse having a shorter generation period than the interrupt pulse.

Further, the feedback signal generation means has a storage means for discretely storing the amplitude value of the sine wave in correspondence with the address, and determines the advance speed of the address based on the voltage value of the frequency signal. It outputs a feedback multi-phase AC signal.

Further, an input multi-phase AC signal and a feedback poly-phase AC signal having a predetermined angular phase different from the AC signal of each phase of the input multi-phase AC signal are input, and the input multi-phase AC signal and the feedback poly-phase are input. Phase comparison means for comparing the phases of alternating current signals and outputting a phase difference signal, and a phase difference signal from this phase comparison means are input, and processed by a computer program based on the phase difference signal and the voltage value of the reference voltage. The voltage-frequency conversion means has a voltage-frequency conversion means for outputting a frequency signal related to the frequency of the input multi-phase AC signal, and a storage means for storing the amplitude value of the sine wave discretely in correspondence with an address. From the feedback signal generating means for inputting a frequency signal from the feedback signal, determining a step speed of the address based on the voltage value of the frequency signal, and outputting a feedback multi-phase AC signal. The frequency signal of the input polyphase AC signal is obtained by inputting the polyphase AC signal and detecting the time in the 0 ° to 180 ° section of the feedback polyphase AC signal to obtain the input polyphase AC signal and the desired DC output. A gate pulse generating means for generating a gate pulse for performing phase control on the input multi-phase AC signal based on the phase angle calculated from the voltage and the frequency signal is provided.

Further, holding means for holding the frequency and the input multi-phase AC signal obtained by the voltage-frequency conversion means and the phase angle calculated from the desired DC output voltage, and the input multi-phase AC signal are below a predetermined value. And a level detection means for detecting that the input polyphase alternating current signal drops below a predetermined value, the frequency held before the input polyphase alternating current signal drops below a predetermined value. And a gate pulse for controlling the phase of the input multi-phase AC signal based on the phase angle.

The phase synchronization signal generator according to the present invention is
Input the input multi-phase AC signal, and the input multi-phase AC signal, and the feedback multi-phase AC signal that has a different angle phase from the AC signal of each phase, and input the input multi-phase AC signal and the feedback multi-phase AC signal. Phase comparison means for comparing and outputting a phase difference signal, and inputting the phase difference signal from this phase comparison means, and processing by the program of the computer based on the voltage value of the phase difference signal and the reference voltage, the input multi-phase AC signal Voltage-frequency conversion means for outputting a frequency signal related to the frequency of, and feedback signal generation means for inputting a frequency signal from the voltage-frequency conversion means and outputting the feedback multi-phase AC signal based on the frequency signal. Generating means for generating a signal synchronized with the input multi-phase AC signal based on the frequency signal.

A power converter according to the present invention comprises a thyristor group for converting an AC voltage of a three-phase AC bus into a DC voltage,
An instrument transformer for measuring the AC voltage of the three-phase AC bus, an input three-phase AC signal output from the instrument transformer, and an AC signal of each phase of the input three-phase AC signal and a phase of 120 degrees each. , A phase comparison means for inputting a feedback three-phase alternating current signal, comparing the phases of the input three-phase alternating current signal and the feedback three-phase alternating current signal, and outputting a phase difference signal, and inputting the phase difference signal from this phase comparing means, Voltage-frequency conversion means for outputting a frequency signal corresponding to the frequency of the input three-phase AC signal based on the voltage value of the phase difference signal and the reference voltage, and the frequency signal is input from the voltage-frequency conversion means A frequency signal is input from the feedback signal generating means for outputting the feedback three-phase AC signal based on the above, and the frequency signal from the voltage-frequency conversion means, and the input three-phase AC signal and the desired one of the thyristor group are inputted. On the basis of the phase angle and the frequency signal calculated from current output voltage is obtained and a computer having a gate pulse generating means for generating a gate pulse to the phase control with respect to the input 3-phase AC signal.

In the phase-locked gate pulse output method according to the present invention, an input multi-phase AC signal and a feedback multi-phase AC signal having a predetermined angular phase different from the AC signal of each phase of the input multi-phase AC signal are input. Then, the phase comparison step of comparing the phases of the input multi-phase AC signal and the feedback multi-phase AC signal and outputting the phase difference signal, and inputting the phase difference signal, based on the voltage value and the reference voltage of the phase difference signal. A voltage-frequency conversion step of processing with a program of a computer and outputting a frequency signal related to the frequency of the input polyphase alternating current signal;
A feedback signal generating step of inputting the frequency signal and outputting the feedback multi-phase AC signal based on the frequency signal, and inputting the frequency signal, calculated from the input multi-phase AC signal and a desired DC output voltage And a gate pulse generating step of generating a gate pulse for performing phase control on the input multi-phase AC signal based on the phase angle and the frequency signal. The phase comparison step, the voltage-frequency detection step, the feedback signal generation step, and the gate pulse generation step are processed by a computer program.

[0014]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiment 1. Hereinafter, Embodiment 1 of the present invention will be described with reference to FIGS.
This will be described with reference to FIG. FIG. 1 is a block diagram showing the configuration of a converter for forming a phase-locked gate pulse output device with a general microcomputer and converting AC to DC. In Figure 1, bus line 10 for transmitting a three-phase alternating current is input polyphase AC, 11 voltage V _a for inputting a voltage of three-phase alternating current to the microcomputer 8, V _b, V _c
An instrument transformer for converting into 3 is a thyristor group having a plurality of thyristors for converting the three-phase alternating current voltage-converted by the converter transformer 12 into direct current. Reference numeral 1 denotes a CPU (arithmetic unit), which performs arithmetic operations. Reference numeral 3 denotes an interrupt pulse generator, which is an interrupt pulse generator 3a, 3b, 3c for outputting interrupt pulses ti1, ti2, ti3 having different cycles to the CPU 1. And CPU1
Performs different types of operations depending on the input of each interrupt pulse. Reference numeral 5 is a clock generator that generates a clock pulse that has a higher occurrence frequency than the interrupt signal output from the interrupt pulse generator 3 and that controls the arithmetic operation of the CPU 1. Reference numeral 7 is a memory for storing programs and data. Programs and data are exchanged with the CPU1, and the CPU1
Executes an operation using data or a program. 8 is CP
It is a microcomputer that is a computer that has a U1, an interrupt pulse generator 3, a clock generator 5, and a memory 7 and that forms a phase-locked gate pulse output device that outputs a gate pulse 9 to a thyristor group 13.

The operation of the microcomputer 8 for generating the gate pulse 9 will be described below. FIG. 2 shows FIG.
3 is a block diagram showing a function of the microcomputer 8 for generating a gate pulse 9. FIG. 15 the input voltage V _a is a voltage or input polyphase AC signal between the 3-phase AC line, V _b, V _c
And the feedback voltages V _a0 , V _b0 and V _c0 , which are feedback multi-phase AC signals, for comparing the phases, 17 is a phase comparing means 15
Filter means for removing the higher harmonic component of the output signal V _A0 which is the phase difference signal from the reference signal 19, and the reference voltage V ₀ corresponding to the output signal V _A1 from the filter means 17 and the reference frequency f _{0 of the} system.
, 21 is a voltage-frequency conversion means for converting the output signal V _A2 from the addition means 19 into a frequency signal related to the voltage by a program, and a VCO means, 2
Reference numeral 3 is a feedback signal generating means, which receives the output signal VA3 which is a frequency signal from the VCO means 21 and which receives the feedback signal generating means 2
Feedback voltages V _a0 and V 3a, 23b and 23c are different from the input voltages V _a , V _b and V _c by 120 degrees, that is, different from each other by a predetermined angle phase.
_b0 and V _c0 are output. Reference numeral 25 is a frequency conversion means which is a voltage-frequency conversion means which receives the output signal V _A1 from the filter means 17 and outputs an output signal f which is a frequency signal related to the frequency, and 27 is an output signal f from the frequency conversion means 25. Is a frequency-time conversion means for converting the signal into a time signal ta.

Reference numeral 29 is a phase-time conversion means for inputting the phase angle α calculated by another CPU (not shown) and the time signal ta to calculate the time for generating the gate pulse 9, and 31 is the phase-time conversion means 29. The pulse output means outputs the gate pulse 9 at the gate pulse output time based on the output signal tgn. 30 is frequency-time conversion means 2
7, phase angle-time conversion means 29 and pulse output means 3
1 is a gate pulse generating means. Also, the phase comparison means 15, the filter means 17, the addition means 1
9, VCO means 21, feedback signal generating means 23, frequency converting means 25, and gate pulse generating means 30 are processed by a computer program. Here, the phase angle α is the phase angle at which the gate pulse 9 should be generated for the alternating current input to the thyristor group 13. The phase angle α can be obtained from the input AC and the desired DC output voltage desired to be output from the thyristor group 13.

The operation of the VCO means 21 and the feedback signal generating means 23a will be described. In FIG. 3, the VCO means 21 converts the frequency signal V _A3 into the feedback signal generating means 2
FIG. 3a is a diagram showing conversion of the feedback signal V _a0 from the frequency signal V _A3 by 3a. (A) is an explanatory diagram of converting the added voltage V _A2 into an oscillation frequency voltage (output voltage) V _A3 which is a frequency signal related to frequency by the VCO means 21. That is, the oscillation frequency voltage V _A3 changes according to the added voltage V _A2 . The oscillation frequency voltage V _A3 is R which will be described below.
Corresponds to the advance address speed of the OM. (B) is a model diagram in which the feedback signal generating means 23a obtains a feedback signal V _a0 which is a sine wave from the oscillation frequency voltage V _A3 . In this way, the feedback signal V _a0 which is an AC signal can be obtained from the oscillation frequency voltage V _A3 of the DC signal. In (c), the horizontal axis is the address (corresponding to time) and the vertical axis is the voltage, that is, V ₀ , V ₁ , V ₂ ... Is a ₀ , a ₁ , a ₂ ... It is a figure which shows the conversion at the time of being an output, The (d)
Stores the contents of (c) in a memory, that is, V ₀ , V ₁ , V ₂
.. is a diagram showing the contents of the ROM for the respective addresses a ₀ , a ₁ , a ₂ ... That is, each value of the sine wave is discretely stored in the ROM, preferably at constant intervals, for each address. Then, if the advance address speed of the ROM is changed according to the voltage value of the output signal (oscillation frequency voltage) V _A3 , the feedback voltage V _a0 can be obtained. For example, when the voltage value of the output signal V _A3 is high, the advance address speed is high, and the feedback voltage V _a0 is a sine wave with a short cycle. Then, in the feedback signal generating means 23b and 23c, the feedback voltage V _b0 , similarly to the feedback signal generating means 23a,
Output V _c0 . Further, although the case where the advance address speed of the address stored in the ROM is changed has been described, the contents stored in the ROM may be called to the RAM and the same processing may be performed. Efficiency is improved.

The operation of the frequency conversion means 25 will be described. In FIG. 4, the voltage V is converted by the frequency conversion means 25.
It is explanatory drawing which converts _A1 into a frequency. (A) is an explanatory diagram of converting the voltage V _A1 which is the phase difference signal into the frequency voltage Δf which is the deviation of the frequency signal by the frequency conversion means 25. That is, the DC frequency voltage Δf changes according to the DC voltage VA1. (B) is a memory of the contents of (a), that is, the voltages V ₀ , V ₁ , V _2, ... Are frequencies Δf ₀ ,
Is a table corresponding to Δf ₁ , Δf _2, ...
It is a figure which shows the content of M. That is, the frequency Δf can be determined according to the voltage value of the voltage signal V _A1 . A frequency signal f is obtained by adding the reference frequency f ₀ to this frequency Δf.

Next, the frequency conversion will be described, and then the gate pulse output will be described. 5 and 6 show
6 is a flowchart showing processing of a program of the microcomputer 8, FIG. 5 is a flowchart showing frequency-time conversion, and FIG. 6 is a flowchart showing gate pulse output. First, the input voltages Va, Vb, and Vc are input to the phase comparison unit 15 from the three-phase AC power system using the instrument transformer 11 and the like. (A01) and then by the output signal VA3 of VCO unit 21 through the feedback signal generator 23, at the same frequency as the phase angle 120 degrees before the input voltage, the current of the input voltage V _a, V _b, and V _c, respectively The feedback voltages V _a0 , V _b0 and V _c0 which are 120 degrees out of phase are input to the phase comparison means 15. (A02)

Next, in the phase comparison means 15, an output signal V _A0 (= V _a × V) obtained by adding and multiplying the products of the input voltages V _a , V _b and V _c and the feedback voltages V _a0 , V _{b 0} and V _{c0. a0} + V _b × V _b0 + V
_c × V _c0 ) is output to the filter means 17. (A03) The filter means 17 removes the harmonic component of the input signal V _A0 and adds the output signal V _A1 to the adding means 19 and the frequency converting means 25.
Output to (A04) Then, in the frequency conversion means 25, the deviation frequency Δf ₁ is calculated according to the voltage of the input signal V _A1 (A05), and the reference frequency f _{0 of the} input system (the frequency of the system input voltage in the steady state , For example, a commercial frequency of 60 Hz) to calculate the frequency f of the input voltage. (A06) Next, since the frequency-time converting means 27 can input the frequency f and calculate the cycle at 1 / f, it is 1/2 of this cycle.
Is calculated as time ta = 1 / (f × 2), the time signal ta is output to the phase angle-time conversion means 29, and this time ta is stored in the memory (A0).
8). (A07)

Here, FIG. 7 shows the frequency-time conversion means 2
FIG. 7 is an explanatory diagram for obtaining a time ta according to 7. In FIG. 7, the horizontal axis represents time and shows a sine wave having the same period as the frequency f. The time ta corresponds to the point O-P in FIG. 7 and is 1/2 of the cycle T of the frequency f. The process for detecting the frequency f described above needs to quickly follow the change in the frequency of the input voltage V _a . Here, the response time of each process will be examined. This response time depends on the phase comparison means 15,
The response time of the phase-locked gate pulse output device composed of the filter means 17, the addition means 19, the VCO means 21, the feedback signal generation means 23, the frequency conversion means 25, and the gate pulse generation means 30, that is, the frequency of the input voltage changes. Corresponds to the time until the gate pulse output time tgn corresponding to this changed frequency is obtained. Therefore, this time is the response time of the filter means 17 whose response time is slow, and is about 30 ms. Therefore,
Since it suffices to detect the changed frequency within about 30 ms, it is only necessary to interrupt the frequency detection of about 30 degrees (1.4 ms) as shown in FIG. This is because, in this case, the interrupt processing can be performed about 20 times within the response time of 30 ms, so that it can be said that the change in frequency can be sufficiently followed.

The gate pulse output is shown in FIG.
An interrupt process for determining the gate pulse output time will be described with reference to FIG. In the first embodiment, the gate pulse output time is 0, which is the reference angle time of the input voltage V _a.
It is detected by an interrupt pulse from the point time to a certain time, and then by a clock pulse having a shorter generation period than the interrupt pulse. Here, the zero point time is the time when the voltage of the AC signal changes from negative to positive. First, it is determined whether or not the commutation voltage is 0, that is, the voltage of the input AC signal changes from negative to positive. (A10) Here, since the commutation voltage of the thyristor corresponds to the line voltage, that is, the input voltage, the reference angle time of the gate pulse 9 is shown in FIG.
Corresponds to the phase 0 degree time. In addition, FIG. 9 described below
It is assumed that the zero point of is synchronized with the sine wave of FIG. Then, once the gate pulse 9 is output, the gate pulse is not output until the next zero point of the input voltage, that is, the commutation voltage. Then, if the zero point of the commutation voltage is recognized, n =
1, the flag FG = 0 is input. (A11) Next, it is determined whether the flag FG = 1 (when FG = 1, the gate pulse has already been generated), that is, whether the gate pulse 9 has already been generated. (A12)

When FG is not 1, thyristor group 1
The phase angle α with respect to the input voltage Va of the gate pulse 9 to be output to 3 is input to the phase angle-time conversion means 29. (A13) Next, the time t obtained by the frequency-time conversion means 27.
Read a from memory. (A14) Then, the phase-time conversion means 29 uses the time ta and the phase angle α to convert the gate pulse generation time tgm. The conversion can be calculated by tgm = ta × α / 180 (Equation 1). (A15) Here, since the time from the input of the phase angle α to the end of the calculation is constant, this time is measured in advance and set as tac.

Then, the phase angle-time conversion means 29 obtains the output signal tgn, which is the gate pulse output time, from the phase 0 degree time and the gate pulse generation time tgm, and outputs it to the pulse output means 31. And the pulse output means 3
1 indicates a gate pulse output time tgn by an interrupt signal and a clock pulse, and when detected, a gate pulse 9
Is output. This will be described in detail later with A16 to A22. Here, the clock pulse is a pulse signal that is synchronized with the clock output from the clock oscillator 5 of the CPU 1, and the interrupt signal has a sufficiently long generation cycle than the clock pulse and generates an interrupt signal at constant time intervals tc. .

FIG. 9 is an explanatory diagram for detecting the gate pulse output time tgn by the interrupt signal and the clock signal, in which the 0 point is synchronized with FIG. 7 with the horizontal axis indicating time.
In FIG. 9, tac is the calculation time of Expression 1, and is usually so short that it can be ignored. Reference symbols tc and 2tc indicate the generation times of the interrupt signals. In this case, the interrupt signals are generated about 8 to 10 times in one cycle of FIG. Further, although not shown, during the period from the time tac to tc, the time t is set by the clock signal having a sufficiently shorter cycle than the interrupt signal.
gn is detected. X or Y is the gate pulse output time t
It corresponds to gn. X or Y is the input voltage 1
It is output only once per cycle, and two points are shown for convenience of explanation.

First, the gate pulse output time tgn is X.
The case of (n = 1) will be described. When tg1 <tac, the gate pulse is immediately output. (A16, A1
7) When tac <tg1 <tc, the clock pulse is counted, and the time tcl1 = t obtained from the clock count.
A gate pulse is output when g1-tac is reached. (A19, A20, A21) Next, the gate pulse output time tgn is Y (n = 2)
The case will be described. When tg1> tc, n = n
Set to +1 and wait until the next interrupt pulse arrives. (A
23) When the next interrupt pulse comes tc, the phase angle α is input again. If the time-converted value of the phase angle α is tg2, then t
When g2 <tc + tac, the gate pulse is immediately output. (A16, A17) Then, when tc + tac <tg2 <2tc, clock counting is started, and when tcl2 = tg2-tc-tac, a gate pulse is output. (A19, A20, A2
1) Hereinafter, similarly, n = 3, 4, ...
1) When tc + tac <tgn, the gate pulse 9 is immediately output, and (n-1) tc + tac <tgn <nta.
When c, tcl = tgn-tc- (n-1) tac
At this time, the gate pulse 9 may be output. In the above process, once the gate pulse 9 is output, the gate pulse 9 is not output until the next zero point of the AC voltage.

Here, each time the interrupt signal ntc is output when the gate pulse output time tgn is detected,
An example in which the processing time tac is taken into consideration by performing the processing of (A13) to (A15) has been described. However, by calculating the gate pulse output time tgn once, storing the value in the memory, and using this value, (A13) to (A1)
The process 5) may be omitted.

Since the phase-locked gate pulse output device is constructed as described above, the following effects are obtained. As in the prior art, the counters count the input voltages V _a , V _b , V
_It is not necessary to detect the phase control angle with respect to _c, and the frequency f can be detected based on the voltage of the phase difference signal V _A1 . Therefore, the frequency f based on the voltage of the phase difference signal V _A1
Can be detected instantaneously and can be processed by the program of the computer 8, so that the accuracy of detecting the frequency f can be increased. In addition, input voltages V _a , V _b , V
_The frequency f with respect to _c can be detected by the frequency conversion means 25, and the gate pulse output time tg based on this frequency f.
Since n can be detected and the gate pulse 9 can be generated, the accuracy of generation of the gate pulse 9 can be increased and the program can be executed by the computer 8. The input voltage V _a without using the counter by VCO unit 21 and the feedback signal generator 23,
Since the feedback signals V _a0 , V _b0 and V _c0 for V _b and V _c can be output, they can be executed by the program of the computer 8.

Further, the phase comparison means 15 and the filter means 1
7, the VCO means 21, the feedback signal generating means 23, the frequency converting means 25, and the gate pulse generating means 30 can be executed by the processing of the program of the computer 8, so that the phase-locked gate pulse output device can be downsized and high. Accuracy can be improved. Further, since the gate pulse output time tgn is detected by the interrupt signal and the clock pulse, the load on the CPU 1 is small and the time can be accurately detected. In addition, since the phase-synchronous gate pulse output device is configured by the computer 8 in the conversion device for converting alternating current into direct current, efficient conversion is possible and the computer 8 is a computer used in an electric station. It is also possible to share it with.

The phase angle α is not the CPU 1
Although the case where the phase angle is calculated is described above, this phase angle is theoretically obtained, and may be obtained by the CPU 1. Also, VC is used as the voltage-frequency conversion means.
Although the case where there are two O means 21 and frequency conversion means 25 has been described, only one of them is provided and the frequency signal is supplied from the voltage-frequency conversion means to both the feedback signal generation means 23 and the gate pulse generation means 30. May be output. Also, the case where the input polyphase alternating current is three-phase alternating current and the predetermined angle is 120 degrees has been described.
It goes without saying that if it is not a phase exchange, it changes accordingly. Further, the reference frequency f ₀ and the reference voltage V ₀ which is the voltage corresponding to the reference frequency f ₀ are the frequency of the input multi-phase AC signal obtained immediately before and the reference frequency V ₀ , and the reference frequency is 60 Hz. The voltage corresponding to the frequency may be set in advance to a fixed value such as 10V.

Embodiment 2 Embodiment 2 of the present invention will be described. Other than the detection of the gate pulse output time tgn in the pulse output means 31 of the gate pulse generation means 30 of the first embodiment, the description is omitted because it is the same as that of the first embodiment. In FIG. 10, the horizontal axis represents time, and FIG.
FIG. 6 is an explanatory diagram for detecting a time tgn by an interrupt signal in which points are synchronized. In FIG. 10, the calculation time tac of (Equation 1) is usually so short that it can be ignored, and therefore is not taken into consideration. tc and 2tc indicate the generation time of the interrupt signal, and in this case, 8 for one cycle of FIG.
An interrupt signal is generated about 10 times. X corresponds to the gate pulse output time tgn.

Next, the detection of X which is the gate pulse output time tgn will be described. When tgn <tc, a gate pulse is immediately output. If tgn> tc, wait until the next interrupt pulse arrives. When tgn <2tc, the gate pulse is immediately output. If tgn> 2tc, wait until the next interrupt pulse arrives. Similarly, t
When gn <(n-1) tc, a gate pulse is output and t
If gn> (n-1) tc, wait until the next interrupt pulse arrives. Since the pulse output means 31 is configured as described above, it can be executed by a very simple program, the load on the CPU 1 is small, and the amount of memory used can be reduced. Note that the calculation time tac of (Equation 1) is usually short enough to be ignored, and thus is not taken into consideration. However, the calculation time tac may be taken into consideration as in the first embodiment. It is also possible to detect the gate pulse output time tgn only by the clock pulse instead of the interrupt pulse of the second embodiment. In this case, since the interrupt signal is a clock pulse and the detection cycle is short, it is possible to output the gate pulse 9 with an accurate output time.

Embodiment 3 Embodiment 3 of the present invention will be described. Other than the detection of the frequencies of the input voltages V _a , V _b , and V _c in the frequency conversion means 25 of the first embodiment,
The description is omitted because it is the same as in the first embodiment. FIG.
Is the output voltage V _a0 which is the feedback signal of the feedback signal generating means A.
FIG. CPU1 detects the point corresponding to the zero point of the zero point or input voltage V _a in FIG. 11, the frequency to the input voltage V _a by measuring the time of the two 0-point between words 0 degrees to 180 degrees interval f can be detected. As described above, since the sine wave is actually output and its zero point is detected to detect the frequency f, the frequency can be detected with high accuracy.

Embodiment 4 Embodiment 4 of the present invention will be described. Generally, when an accident such as a short circuit occurs in the system, the system voltage is distorted and the input waveform to the phase-locked gate pulse output device is distorted. Therefore, the phase-locked gate pulse output device may not operate properly. Therefore, when an accident occurs, the gate pulse 9 is output using the pre-accident phase that was held in advance. FIG. 12 is a diagram showing functional blocks of this operation. FIG.
In 2, the reference numeral 40 is an accident detecting means which is a level detecting means for inspecting the voltage of the input multi-phase AC signal. Reference numeral 42 denotes SW (SW1, SW2, SW3) which is switching means for switching between opening and closing based on the output of the accident detecting means 40.

Next, the operation will be described. In the normal state, the SW 42 is closed and operates in the same manner as in the first embodiment, and therefore its description is omitted. On the other hand, if the accident detection means 40 detects an accident due to a decrease in the input AC voltage, S
An open circuit command is output to W42. And SW1, SW
2, SW3 is opened, and the feedback loop of the phase locked loop is cut off. Then, the input value of the VCO means 21 before the accident stored in the memory which is the holding means (not shown) is read out, and this value is used as the input value of the VCO means 21 thereafter. With the configuration as described above, a stable gate pulse 9 can be output even when an accident occurs and the input voltage is distorted.

Embodiment 5 Embodiment 5 of the present invention will be described. FIG. 13 is a block diagram showing the configuration of the phase synchronization signal generator. In FIG. 13, reference numeral 50 denotes a signal 52 which receives the frequency signal f and is synchronized with the input multi-phase AC signal.
Is a synchronization signal generating means. Phase comparison means 1
5, filter means 17, adding means 19, VCO means 2
1. The operations of the feedback signal generating means 23 and the frequency converting means 25 are the same as those in the first embodiment, and therefore their explanations are omitted.

Next, the operation will be described. The synchronizing signal generating means 50 receives the frequency signal f from the frequency converting means 25 and generates a signal 52 synchronized with the input multi-phase AC signal. Since it is configured to phase synchronization signal generator as described above, it can detect frequency f based on the voltage of the phase difference signal V _A1, can detect the detection of the frequency f for based on the voltage of the phase difference signal V _A1. Therefore, the synchronizing signal can be generated instantaneously with high accuracy and can be executed by the program of the computer. In addition to the gate pulse generator, this phase synchronization signal generator can be used in a harmonic wave detector or the like.

[0038]

As described above, in the phase-locked gate pulse output device according to the present invention, the input multi-phase AC signal and the feedback of which the predetermined angular phase is different from the AC signal of each phase of the input multi-phase AC signal are fed back. A phase comparison means for inputting a multiphase alternating current signal, comparing the phases of the input multiphase alternating current signal and the feedback multiphase alternating current signal and outputting a phase difference signal, and inputting the phase difference signal from this phase comparing means Voltage-frequency conversion means for processing by a program of a computer based on the voltage value of a signal and a reference voltage to output a frequency signal related to the frequency of the input multi-phase AC signal, and a frequency signal input from this voltage-frequency conversion means A feedback signal generating means for outputting the feedback multi-phase AC signal based on the frequency signal, and a voltage-
A gate for inputting a frequency signal from the frequency converting means, and performing phase control on the input polyphase AC signal based on the phase signal calculated from the input polyphase AC signal and a desired DC output voltage and the frequency signal. Since the gate pulse generating means for generating a pulse is provided, the frequency of the input multi-phase AC signal can be accurately and promptly detected together with the use of the voltage-frequency conversion means processed by the computer program, and the input multi-phase AC signal can be detected. It is possible to accurately control the phase.

The gate pulse generating means calculates the time for generating the gate pulse based on the phase angle and the frequency signal and outputs the time signal, and the phase angle-time converting means outputs the time. Gate pulse output means for inputting a signal, detecting a gate pulse output time obtained from this time signal and a reference angle time of the input multi-phase AC signal by an interrupt signal, and outputting a gate pulse at the detected gate pulse output time Since the gate pulse output means is provided, the gate pulse output means can be executed by the program processing of the computer, and the size can be reduced.

Further, since the interrupt signal is a clock pulse, the program can be simplified and a small memory can be used.

The interrupt signal is an interrupt pulse from the reference angle time of the input multi-phase AC signal to the fixed time,
After that, since the clock pulse has a shorter generation period than the interrupt pulse, the load on the CPU is smaller than that when only the clock pulse is used.

Further, the feedback signal generation means has a storage means for discretely storing the amplitude value of the sine wave in correspondence with the address, and determines the advance speed of the address based on the voltage value of the frequency signal. Since the feedback multi-phase AC signal is output, the feedback signal generating means can be executed by the program processing of the computer, and the size can be reduced.

Further, the input multi-phase AC signal and the feedback multi-phase AC signal having a predetermined angular phase different from the AC signal of each phase of the input multi-phase AC signal are input, and the input multi-phase AC signal and the feedback multi-phase are input. Phase comparison means for comparing the phases of alternating current signals and outputting a phase difference signal, and a phase difference signal from this phase comparison means are input, and processed by a computer program based on the phase difference signal and the voltage value of the reference voltage. The voltage-frequency conversion means has a voltage-frequency conversion means for outputting a frequency signal related to the frequency of the input multi-phase AC signal, and a storage means for storing the amplitude value of the sine wave discretely in correspondence with an address. From the feedback signal generating means for inputting a frequency signal from the feedback signal, determining a step speed of the address based on the voltage value of the frequency signal, and outputting a feedback multi-phase AC signal. The frequency signal of the input polyphase AC signal is obtained by inputting the polyphase AC signal and detecting the time in the 0 ° to 180 ° section of the feedback polyphase AC signal to obtain the input polyphase AC signal and the desired DC output. Since a gate pulse generating means for generating a gate pulse for controlling the phase of the input multi-phase AC signal based on the phase angle calculated from the voltage and the frequency signal is provided, the feedback signal generating means is provided in the computer. It can be executed by program processing and can be downsized, and the time of the 0 ° to 180 ° section of the feedback multi-phase AC signal that is a sine wave is detected, so the frequency detection accuracy is good.

Further, holding means for holding the frequency and the input multi-phase AC signal obtained by the voltage-frequency conversion means and the phase angle calculated from the desired DC output voltage, and the input multi-phase AC signal are below a predetermined value. And a level detection means for detecting that the input polyphase alternating current signal drops below a predetermined value, the frequency held before the input polyphase alternating current signal drops below a predetermined value. And since it is formed so as to generate a gate pulse for performing phase control on the input multi-phase AC signal based on the phase angle, it is possible to generate a gate pulse without being affected by waveform distortion during an accident. it can.

The phase synchronization signal generator according to the present invention is
Input the input multi-phase AC signal, and the input multi-phase AC signal, and the feedback multi-phase AC signal that has a different angle phase from the AC signal of each phase, and input the input multi-phase AC signal and the feedback multi-phase AC signal. Phase comparison means for comparing and outputting a phase difference signal, and inputting the phase difference signal from this phase comparison means, and processing by the program of the computer based on the voltage value of the phase difference signal and the reference voltage, the input multi-phase AC signal Voltage-frequency conversion means for outputting a frequency signal related to the frequency of, and feedback signal generation means for inputting a frequency signal from the voltage-frequency conversion means and outputting the feedback multi-phase AC signal based on the frequency signal. And a voltage-frequency conversion means for processing with a program of a computer, since it has a generation means for generating a signal synchronized with the input multi-phase AC signal based on the frequency signal. It is possible to generate accurately synchronized signal to the input multiphase AC signal is possible be coupled with the frequency accurately promptly detect input polyphase AC signal used.

A power converter according to the present invention comprises a thyristor group for converting an AC voltage of a three-phase AC bus into a DC voltage,
An instrument transformer for measuring the AC voltage of the three-phase AC bus, an input three-phase AC signal output from the instrument transformer, and an AC signal of each phase of the input three-phase AC signal and a phase of 120 degrees each. , A phase comparison means for inputting a feedback three-phase alternating current signal, comparing the phases of the input three-phase alternating current signal and the feedback three-phase alternating current signal, and outputting a phase difference signal, and inputting the phase difference signal from this phase comparing means, Voltage-frequency conversion means for outputting a frequency signal corresponding to the frequency of the input three-phase AC signal based on the voltage value of the phase difference signal and the reference voltage, and the frequency signal is input from the voltage-frequency conversion means A frequency signal is input from the feedback signal generating means for outputting the feedback three-phase AC signal based on the above, and the frequency signal from the voltage-frequency conversion means, and the input three-phase AC signal and the desired one of the thyristor group are inputted. Since a computer with a gate pulse generating means for generating a gate pulse to the phase control with respect to the input three-phase AC signal based on the phase angle and the frequency signal calculated from flow output voltage,
The gate pulse generation time is accurate, and efficient power conversion can be realized.

In the phase-locked gate pulse output method according to the present invention, the input multi-phase AC signal and the feedback multi-phase AC signal having a predetermined angular phase different from the AC signal of each phase of the input multi-phase AC signal are input. Then, the phase comparison step of comparing the phases of the input multi-phase AC signal and the feedback multi-phase AC signal and outputting the phase difference signal, and inputting the phase difference signal, based on the voltage value and the reference voltage of the phase difference signal. A voltage-frequency conversion step of processing with a program of a computer and outputting a frequency signal related to the frequency of the input polyphase alternating current signal;
A feedback signal generating step of inputting the frequency signal and outputting the feedback multi-phase AC signal based on the frequency signal, and inputting the frequency signal, calculated from the input multi-phase AC signal and a desired DC output voltage Since it includes a gate pulse generation step of generating a gate pulse that controls the phase of the input multi-phase AC signal based on the phase angle and the frequency signal, the frequency of the input multi-phase AC signal can be accurately and promptly. It is possible to obtain a method that can detect and accurately control the phase of the input multi-phase AC signal.

Further, since the phase comparison step, the voltage-frequency detection step, the feedback signal generation step, and the gate pulse generation step are processed by the program of the computer, it is possible to obtain a method which can be miniaturized and has high accuracy.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of a converter for converting AC to DC according to a first embodiment of the present invention.

FIG. 2 is a block diagram of a phase-locked gate pulse output device showing a function of generating a gate pulse according to the first embodiment of the present invention.

FIG. 3 is a diagram showing conversion for obtaining a feedback signal by the voltage-frequency conversion means and the feedback signal generation means according to the first embodiment of the present invention.

FIG. 4 is an explanatory diagram for converting a voltage signal into a frequency signal by the voltage-frequency conversion means according to the first embodiment of the present invention.

FIG. 5 is a flowchart showing processing of a program of a microcomputer according to the first embodiment of the present invention.

FIG. 6 is a flowchart showing processing of a program of a microcomputer according to the first embodiment of the present invention.

FIG. 7 is an explanatory diagram for obtaining a time signal by the frequency-time conversion means according to the first embodiment of the present invention.

FIG. 8 is an explanatory diagram for consideration of response time according to the first embodiment of the present invention.

FIG. 9 is an explanatory diagram for determining a gate pulse output time according to the first embodiment of the present invention.

FIG. 10 is an explanatory diagram for determining a gate pulse output time according to the second embodiment of the present invention.

FIG. 11 is an explanatory diagram for obtaining a time signal from the feedback signal of the feedback signal generating means regarding the third embodiment of the present invention.

FIG. 12 is a block diagram showing a configuration of a phase-locked gate pulse output device when a system fault occurs according to a fourth embodiment of the present invention.

FIG. 13 is a block diagram showing a configuration of a phase synchronization signal generator according to a fifth embodiment of the present invention.

FIG. 14 is a block diagram showing a configuration of a conventional phase detection device.

[Explanation of symbols]

1 CPU 3 Interrupt pulse generator 5 Clock generator 7 Memory 8 Microcomputer 9 Gate pulse 11 Instrument transformer 13 Thyristor group 15
Phase comparison means 21 VCO means 23 Feedback signal generation means 25
Frequency conversion means 27 Frequency-time conversion means 27 Phase angle-time conversion means 30 Gate pulse generation means 31 Pulse output means 40 Accident detection means 42 Switching means 50 Synchronization signal generation means 52 Synchronization signal

Claims (11)

[Claims] 1. An input multi-phase AC signal and a feedback multi-phase AC signal having a predetermined angular phase different from the AC signal of each phase of the input multi-phase AC signal are input, and the input multi-phase AC signal and the feedback multi-phase are input. Phase comparison means for comparing the phases of alternating current signals and outputting a phase difference signal, and a phase difference signal from this phase comparison means are input, and processed by a computer program based on the voltage value and the reference voltage of the phase difference signal. A voltage-frequency conversion unit that outputs a frequency signal related to the frequency of the input multiphase AC signal, and a frequency signal is input from this voltage-frequency conversion unit, and the feedback multiphase AC signal is output based on this frequency signal. A frequency signal is input from the feedback signal generation means and the voltage-frequency conversion means, and based on the phase angle calculated from the input polyphase AC signal and the desired DC output voltage and the frequency signal. And a gate pulse generating means for generating a gate pulse for controlling the phase of the input multi-phase AC signal. 2. The gate pulse generating means calculates a time for generating a gate pulse based on a phase angle and a frequency signal, and outputs a time signal, and a time from the phase angle-time converting means. Gate pulse output means for inputting a signal, detecting a gate pulse output time obtained from this time signal and a reference angle time of the input multi-phase AC signal by an interrupt signal, and outputting a gate pulse at the detected gate pulse output time The phase-locked gate pulse output device according to claim 1, further comprising: 3. The phase-locked gate pulse output device according to claim 2, wherein the interrupt signal is a clock pulse. 4. The interrupt signal is an interrupt pulse from a reference angle time of the input multi-phase AC signal to a certain time, and is a clock pulse having a shorter generation period than the interrupt pulse thereafter. The phase-locked gate pulse output device described. 5. The feedback signal generation means has a storage means for discretely storing the amplitude value of the sine wave in correspondence with the address, and determines the advance speed of the address based on the voltage value of the frequency signal. The phase-locked gate pulse output device according to claim 1, wherein a feedback multi-phase AC signal is output. 6. An input multi-phase AC signal, and a feedback multi-phase AC signal having a predetermined angular phase different from the AC signal of each phase of the input multi-phase AC signal are input, and the input multi-phase AC signal and the feedback multi-phase are input. Phase comparison means for comparing the phases of alternating current signals and outputting a phase difference signal, and a phase difference signal from this phase comparison means are input, and processed by a computer program based on the phase difference signal and the voltage value of the reference voltage. The voltage-frequency conversion means has a voltage-frequency conversion means for outputting a frequency signal related to the frequency of the input multi-phase AC signal, and a storage means for storing the amplitude value of the sine wave discretely in correspondence with an address. From the feedback signal generating means for inputting a frequency signal from the feedback signal, determining the advance speed of the address based on the voltage value of the frequency signal, and outputting a feedback multi-phase AC signal. The frequency signal of the input multi-phase AC signal is obtained by inputting an AC signal and detecting the time in the 0 ° to 180 ° section of the feedback multi-phase AC signal, and from the input multi-phase AC signal and the desired DC output voltage. A phase-locked gate pulse output, comprising: a gate pulse generating means for generating a gate pulse for controlling the phase of the input multi-phase AC signal based on the calculated phase angle and the frequency signal. apparatus. 7. Holding means for holding the frequency obtained by the voltage-frequency conversion means, the input multi-phase AC signal and the phase angle calculated from the desired DC output voltage, and the input multi-phase AC signal having a predetermined value or less. And a level detection means for detecting that the input polyphase alternating current signal drops below a predetermined value, the frequency held before the input polyphase alternating current signal drops below a predetermined value. 7. The phase-locked gate pulse output device according to claim 2, wherein the gate pulse output device is formed so as to generate a gate pulse for performing phase control on the input multi-phase AC signal based on the phase angle. 8. An input multi-phase AC signal and a feedback multi-phase AC signal having a predetermined angular phase different from the AC signal of each phase of the input multi-phase AC signal are input, and the input multi-phase AC signal and the feedback multi-phase are input. Phase comparison means for comparing the phases of alternating current signals and outputting a phase difference signal, and a phase difference signal from this phase comparison means are input, and processed by a computer program based on the phase difference signal and the voltage value of the reference voltage. A voltage-frequency conversion unit that outputs a frequency signal related to the frequency of the input multiphase AC signal, and a frequency signal is input from this voltage-frequency conversion unit, and the feedback multiphase AC signal is output based on this frequency signal. A phase synchronization signal generating device comprising: a feedback signal generating means; and a generating means for generating a signal synchronized with the input multi-phase AC signal based on the frequency signal. 9. A thyristor group for converting an AC voltage of a three-phase AC bus into a DC voltage, a voltage transformer for measuring the AC voltage of the three-phase AC bus, and an input 3 output from the voltage transformer. Input a three-phase AC signal and a feedback three-phase AC signal that is 120 degrees out of phase with each phase of the input three-phase AC signal, and compare the phases of the input three-phase AC signal and the feedback three-phase AC signal. Phase comparison means for outputting a phase difference signal, the phase difference signal is input from the phase comparison means, and a frequency signal corresponding to the frequency of the input three-phase AC signal is output based on the voltage value of the phase difference signal and the reference voltage. Voltage-frequency conversion means, feedback signal generation means for inputting a frequency signal from the voltage-frequency conversion means, and outputting the feedback three-phase AC signal based on the frequency signal, and voltage-frequency conversion means
A frequency signal is input from the frequency conversion means, and a phase is calculated with respect to the input three-phase AC signal based on the phase signal calculated from the input three-phase AC signal and the desired DC output voltage of the thyristor group and the frequency signal. A power conversion device comprising: a computer having a gate pulse generating means for generating a control gate pulse. 10. An input multi-phase AC signal and a feedback multi-phase AC signal having a predetermined angular phase different from the AC signal of each phase of the input multi-phase AC signal are input, and the input multi-phase AC signal and the feedback multi-phase are input. The phase comparison step of comparing the phases of the AC signals and outputting the phase difference signal, and inputting the phase difference signal, and processing by the program of the computer based on the voltage value of this phase difference signal and the reference voltage A voltage-frequency conversion step of outputting a frequency signal related to the frequency of the signal, a feedback signal generation step of inputting the frequency signal and outputting the feedback multi-phase AC signal based on the frequency signal, and the frequency signal A gate controller which inputs and controls the phase of the input multi-phase AC signal based on the phase angle calculated from the input multi-phase AC signal and the desired DC output voltage and the frequency signal. And a gate pulse generating step of generating a gate pulse. 11. The phase-locked gate pulse output according to claim 10, wherein the phase comparison step, the voltage-frequency detection step, the feedback signal generation step, and the gate pulse generation step are processed by a computer program. Method.