JPH09135371A - Video signal processing circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To allow only one image quality correction circuit enough to correct the image quality even when the number of synthesized video signals is increased by selecting the effect of each image quality correction in matching with a corresponding display video signal so as to set the effect respectively when plural sections are synthesized. SOLUTION: A 1st video signal is compressed by a compression circuit 1 in the horizontal direction into a signal (a), a 2nd video signal is compressed into a signal (b), and a 3rd video signal is compressed into a signal (c) in the horizontal and vertical directions. Then the signals a, b are switched and synthesized and a signal K is outputted. When a switching signal (g) is at a low level, the signal (a) is selected and when high level. The signal K and the signal (c) are selected by a switching signal (h) to synthesize one video signal. When the switching signal (h) is at a low level, the signal K of a switching circuit 4 is selected and when high level, the signal (c) is selected. When the signal (g) is at a low level, a setting value A is selected and when high level, a setting value B is selected, and when the signal (h) is at a low level, a signal (m) is selected and when high level, a signal (n) is selected.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a video signal processing circuit for synthesizing and displaying a plurality of video signals.

[0002]

2. Description of the Related Art In a conventional video signal processing circuit, when a plurality of video signals are combined and each image quality effect is set, a plurality of image quality correction circuits corresponding to the respective video signal processing circuits are provided before combining the video signals. The effect was set.

Next, the operation of the image quality correction circuit will be described with reference to FIG.
This will be described with reference to FIGS. 5, 6, 7, and 8.

FIG. 4 shows a block diagram of a conventional video signal processing circuit, FIG. 5 shows a display image when a plurality of video signals are combined, and FIG. 6 is a waveform diagram for explaining the operation. The waveform diagram of FIG. 6 shows the waveform of one line of the line W when three images are combined as in the screen shown in FIG. FIG. 7 shows a block diagram of the image quality correction circuit, and FIG. 8 is a waveform diagram for explaining its operation.

In FIG. 4, reference numerals 1, 2 and 3 denote compression circuits for horizontally and vertically compressing the first, second and third video signals, respectively. Reference numerals 9, 10, and 11 are image quality correction circuits. Reference numerals 4 and 5 are switching circuits for synthesizing a plurality of video signals. FIG.
Is an example of the image quality correction circuit 9, and 12 is a secondary differentiation circuit that generates a secondary differentiation signal of the input video signal. Reference numeral 13 is a multiplication circuit for multiplying a set value from the outside. An adder circuit 14 adds a correction value to the input video signal.

First, the input first video signal is horizontally compressed by the compression circuit 1 to become (signal a). Then, the image quality correction circuit 9 externally sets the effect with the set value A, and the image quality is corrected and output (signal d).

Further, the operation of the image quality correction circuit 9 will be described with reference to FIGS.
This will be described in detail with reference to FIG. The input video signal q is subjected to the secondary differentiation in the secondary differentiation circuit 12, and the secondary differentiation signal r is output. Next, the effect is input from the outside as a set value, and the secondary differential signal r is multiplied by the multiplying circuit 13, and the correction signal s is output. Then, the adder circuit 14 adds the correction signal s to the input video signal q and outputs it (signal t).

The second video signal is horizontally compressed by the compression circuit 2 as shown in (signal b). Then, the image quality correction circuit 10 externally sets the effect with the set value B to perform image quality correction and output (signal e).

The third video signal is compressed in the horizontal and vertical directions by the compression circuit 3 to become (signal c). Then, the effect is externally set by the image quality correction circuit 11 with the set value C, and the image quality is corrected and output (signal f).

Next, in the switching circuit 4, the first video signal d compressed by the switching signal g and the second video signal e compressed are switched and combined (signal i). Further, the switching circuit 5 combines the third video signal f compressed by the switching signal h and outputs it as a composite video signal j.

[0011]

In this video signal processing circuit, when the number of video signals to be combined increases, the number of image quality correction circuits corresponding thereto increases and the circuit scale becomes large. It was complicated to set up.

[0012]

In order to solve this problem, according to the present invention, each effect can be set for a plurality of images by synthesizing the image signals, correcting the image quality and switching the effect. It is characterized by doing.

Thus, it is possible to provide a video signal processing circuit which can set the effect of each image quality correction without increasing the circuit scale even if the number of video signals to be combined increases.

Further, when the image quality correction effect for a plurality of video signals is set, the effect can be set by the effect on all the video signals and their relative effects.

Thus, when it is desired to change the overall correction effect, it is sufficient to change only one set value, and it is possible to provide a video signal processing circuit which can easily set the image quality correction effect.

[0016]

A video signal processing circuit according to claim 1 of the present invention, when synthesizing a plurality of video signals, switches the effect of each image quality correction in accordance with a corresponding display video signal, and each effect is changed. The feature is that it can be set, and even if the number of video signals to be combined increases, the image quality correction circuit can be configured with one and can be realized without increasing the circuit scale.

Next, in the video signal processing circuit according to claim 2 of the present invention, a plurality of compression circuits for respectively compressing a plurality of video signals and video signal outputs of the plurality of compression circuits are switched by a switching signal to produce one video image. A first switching circuit for synthesizing into a signal, a second switching circuit for switching the effect of image quality correction by the switching signal corresponding to a plurality of video signals, and an output of the first switching circuit for output of the second switching circuit. The image quality correction circuit that corrects the image quality by the effect of 1 is provided, and even if the number of video signals to be combined increases, the image quality correction circuit can be configured with one and can be realized without increasing the circuit scale.

Next, in the video signal processing circuit according to a third aspect of the present invention, in the video signal processing circuit according to the second aspect, the image quality correction circuit second-order differentiates the input video signal.
A video signal to be synthesized, which is composed of a secondary differentiating circuit and a multiplying circuit that multiplies the output of the secondary differentiating circuit by a set value that sets an effect, and an adder circuit that adds the output of the multiplying circuit to the input signal. However, even if the number increases, the image quality correction circuit can be configured by one and can be realized without increasing the circuit scale.

Next, in the video signal processing circuit according to a fourth aspect of the present invention, in the video signal processing circuit according to the first aspect, the effect of each image quality correction is applied to all the video signals and to each of them. It is possible to realize that the image quality correction effect can be easily set even if the number of video signals to be combined increases.

Next, a video signal processing circuit according to a fifth aspect of the present invention is the video signal processing circuit according to the second aspect, wherein a first set value for setting an effect on all video signals and a plurality of values are set. A plurality of adder circuits each having a second plurality of setting values for setting the relative effect of the video signal and adding the second plurality of setting values to the first setting value, respectively. Even if the number of video signals to be used increases, it is possible to easily set the image quality correction effect.

(Embodiment 1) Embodiments of the invention described in claims 1, 2 and 3 of the present invention will be described below with reference to FIGS. 1, 2, 5, and 7. ,
This will be described with reference to FIG.

In FIG. 1, reference numerals 1, 2, and 3 are compression circuits for compressing the first, second, and third video signals, respectively. Switching circuits 4 and 5 combine the compressed video signals. Reference numeral 6 is an image quality correction circuit. Switching circuits 7 and 8 switch the effect of image quality correction. The waveform diagram of FIG. 2 shows the waveform of one line of the w lines of the video signals synthesized as shown in FIG. 5 as in the conventional example. In FIG. 7, reference numeral 12 is a secondary differentiation circuit for generating a secondary differentiation signal of the input video signal. Reference numeral 13 is a multiplication circuit for multiplying a set value from the outside. An adder circuit 14 adds a correction value to the input video signal. FIG. 8 is a waveform diagram for explaining the operation.

First, the first video signal is compressed in the horizontal direction by the compression circuit 1 to become (signal a). Similarly, the second video signal is horizontally compressed by the compression circuit 2 (signal b),
The third video signal is compressed horizontally and vertically (signal c)
Becomes

Next, in the switching circuit 4, the first video signal a compressed by the switching signal g and the second video signal b compressed are switched and combined and output (signal k). In the present invention, the switching signal g
Is at the LOW level, the compressed first video signal a is selected, and at the HIGH level, the compressed second video signal b is selected. Further, the switching circuit 5 combines the output signal k of the switching circuit 4 and the compressed third video signal c with the switching signal h into one switching video signal. In the present invention, the switching signal h is L
When it is at OW level, the output signal k of the switching circuit 4 is set to HIGH.
At the level, the compressed third video signal c is selected.

At the same time, in the switching circuit 8, the switching signal g is L.
At the OW level, the image quality correction effect (setting value A) corresponding to the first video signal is selected, and at the HIGH level, the image quality correction effect (setting value B) corresponding to the second video signal is selected and output ( Signal m). Further, when the switching signal h is LOW level in the switching circuit 7, the output of the switching circuit 8 (signal m)
Is selected, and an image quality correction effect (setting value C) corresponding to the third video signal is selected and output when the HIGH level (signal n).

Finally, the video signals synthesized by the switching circuit 5 are subjected to image quality correction by the image quality correction circuit 6 with the effect (signal n) corresponding to each video signal and output. The operation of the image quality correction circuit is similar to that of the conventional example.

In the embodiment of the present invention, the synthesis of three video signals has been described, but the same effect can be obtained regardless of the number of video signals to be synthesized. Although the image quality correction circuit using the secondary differential signal has been described, the same effect can be obtained by other image quality corrections.

(Embodiment 2) Next, an embodiment of the invention described in claims 4 and 5 of the present invention will be described with reference to FIG.

In FIG. 3, reference numerals 15, 16 and 17 are adder circuits. A setting value D for setting the effect on all video signals and a setting value E for setting the relative effect of the first video signal are added by an adder circuit 15 and output as a setting value A. Similarly, the set value D and the set value F for setting the relative effect of the second video signal are added in the adder circuit 16 and output as the set value B. Similarly, the set value D and the set value G for setting the relative effect of the third video signal are added in the adder circuit 17 and output as the set value C. The resulting set value A, set value B, and set value C have the image quality correction effect of the first to third video signals described in the first embodiment. According to such a configuration, when the image quality correction effect for all video signals is changed, only the set value D is changed, and when it is desired to change each effect, the corresponding set values E, F, G may be changed. .

[0030]

As described above, according to the video signal processing circuit of the present invention, it is possible to easily set the image quality correction effect without increasing the circuit scale even if the number of video signals to be combined increases. It becomes possible to provide a circuit.

[Brief description of the drawings]

FIG. 1 is a block diagram according to a first embodiment of the present invention.

FIG. 2 is a waveform diagram for explaining the operation of the first embodiment of the present invention.

FIG. 3 is a block diagram according to a second embodiment of the present invention.

FIG. 4 is a block diagram of a conventional example.

FIG. 5 is a display image diagram for explaining a conventional example.

FIG. 6 is a waveform diagram for explaining the operation of the conventional example.

FIG. 7 is a block diagram for explaining a conventional example.

FIG. 8 is a waveform chart for explaining the operation of the conventional example.

[Explanation of symbols]

 1, 2 and 3 Compression circuit 4, 5 Switching circuit 6 Image quality correction circuit 7, 8 Switching circuit 9, 10, 11 Image quality correction circuit 12 Secondary differentiation circuit 13 Multiplication circuit 14 Addition circuit 15, 16, 17 Addition circuit

Claims (5)

[Claims] 1. A video signal processing circuit, wherein when a plurality of video signals are combined and displayed, the effect of image quality correction of each video signal can be switched according to the corresponding video signal and the effect can be set respectively. 2. A plurality of compression circuits for respectively compressing a plurality of video signals, a first switching circuit for switching the video signal outputs of the plurality of compression circuits with a switching signal and synthesizing into one video signal, and the switching signal. A second switching circuit for switching the effect of the image quality correction corresponding to a plurality of video signals, and an image quality correction circuit for correcting the image quality of the output of the first switching circuit by the effect of the output of the second switching circuit. Video signal processing circuit. 3. An image quality correction circuit, a quadratic differentiation circuit for quadratic differentiation of an input video signal, a multiplication circuit for multiplying an output of the quadratic differentiation circuit by a set value for setting an effect, and the multiplication of the input signal. The video signal processing circuit according to claim 2, further comprising an adder circuit that adds the outputs of the circuits. 4. The video signal processing circuit according to claim 1, wherein the effect of each image quality correction is set by the effect on all video signals and their relative effects. 5. A first set value for setting an effect for all video signals, and a second plurality of set values for setting a relative effect for a plurality of video signals, wherein the first set value includes The video signal processing circuit according to claim 2, further comprising a plurality of adder circuits that respectively add the second plurality of set values.