JPH09129923A - Light emitting element - Google Patents

Abstract

PROBLEM TO BE SOLVED: To constitute a light emitting element so that one each electrode can be led out from a semiconductor side and a substrate side by forming one electrode on a III-V compound semiconductor which has an n-type conductivity and is expressed by a specific formula and the other electrode on a conductive Si substrate. SOLUTION: A compound semiconductor which is expressed by a general expression of Inx Gay Alz N (where, x+y+z=1, 0<=x<=1, 0<=y<=1, and 0<=z<=1) and composed of an n-type semiconductor layer 3, a p-type semiconductor layer 1, and a light emitting layer 2 is formed on a conductive Si substrate 5 with a buffer layer 4 in between. Then the exposed section 7 of the n-type layer 3 is formed by forming a mask pattern on the p-type layer 1 and etching the layer 1 and the exposed section 9 of the substrate 5 is similarly formed. After the section 9 is formed, electrodes 10-1 and 10-2 are respectively formed on the sections 9 and 7 and electrically connected to each other. Thereafter, an electrode 11 is formed on the surface of the conductor layer 3 and another electrode 12 is formed on the entire area of the rear surface of the substrate 5. Therefore, one each electrode can be led out from the semiconductor side and substrate side.

Description

Detailed Description of the Invention

[0001]

TECHNICAL FIELD The present invention relates to a light emitting device using a Group 3-5 compound semiconductor.

[0002]

2. Description of the Related Art As a material for a light emitting device such as an ultraviolet or blue light emitting diode or an ultraviolet or blue laser diode, a general formula In _x Ga _y Al _z N (where x + y
+ Z = 1, 0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ z ≦ 1), a 3-5 group compound semiconductor is known. Since the compound semiconductor is a direct transition type, it has high emission efficiency, and can emit light with an emission wavelength from red to yellow, green, blue, violet, and ultraviolet regions depending on the In concentration. Is useful as

It is very difficult to prepare a large single crystal of the compound semiconductor, and a large-area crystal having excellent crystallinity that can be used as a substrate for epitaxial growth has not been obtained. For this reason, so-called heteroepitaxial growth is carried out in which growth is performed on substrates of different materials. So far, as the compound semiconductor, one having excellent crystallinity has been obtained on a sapphire substrate, a SiC substrate, a Si substrate and a ZnO substrate. In particular, a sapphire substrate is widely used among the above materials because it has a large area and can obtain high-quality crystals and is a transparent substrate.

However, since the sapphire substrate is insulative, two electrodes must be attached to the compound semiconductor crystal side, which complicates the process of assembling the LED or the semiconductor laser, and also causes the problem of dielectric breakdown peculiar to the insulative substrate. Therefore, the yield could not be increased. Further, since the sapphire substrate has no cleavage, it is difficult to form parallel end faces, and it is very difficult to manufacture a semiconductor laser. On the other hand, the Si substrate can have conductivity, but since the buffer layer, which is indispensable for producing high quality crystals of the compound semiconductor, has a high resistance, the substrate side is bonded by one electrode as in the conventional method. Then, there is a problem that the driving voltage becomes high, and it is necessary to attach two electrodes to the compound semiconductor crystal side, which complicates the assembly process of the LED and the semiconductor laser.

[0005]

SUMMARY OF THE INVENTION It is an object of the present invention to provide a light emitting device having a structure capable of simplifying the light emitting device assembling process and reducing the cost.

[0006]

Means for Solving the Problems As a result of intensive studies in view of such circumstances, the present inventors have found that an n-type semiconductor is added to a laminated structure of a Group 3-5 compound semiconductor formed on a conductive Si substrate. And an exposed portion of the conductive Si substrate are formed, and an electrode 1 and an electrode 2 that form ohmic contact are formed on each of these two exposed portions, and the electrode 1 and the electrode 2 are electrically connected. With this structure, a current path from the front surface of the semiconductor to the back surface of the substrate is formed, and it is possible to take out one electrode from the semiconductor side and the other electrode from the substrate side. The inventors have found that they emit light and have reached the present invention.

That is, according to the present invention, the general formula In _x Ga _y Al _z N (provided that x + y + is formed on a conductive Si substrate.
z = 1, 0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ z ≦ 1), which is a light-emitting element using a Group 3-5 compound semiconductor,
The light emitting device has an electrode formed on a group 3-5 compound semiconductor having n-type conductivity and an electrode formed on a conductive Si substrate, and the two electrodes are electrically connected. The present invention relates to a light emitting element characterized in that the light emitting elements are electrically connected. Next, the present invention will be described in detail.

[0008]

BEST MODE FOR CARRYING OUT THE INVENTION The group 3-5 compound semiconductor in the present invention refers to the general formula In _x Ga _y Al _z N (provided that x +
It is composed of a 3-5 group compound semiconductor (including a laminated structure) represented by y + z = 1, 0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ z ≦ 1). In particular, a structure in which a light emitting layer is provided between the p-type and n-type compound semiconductors and the light emitting layer is sandwiched by compound semiconductors having a band gap larger than that of the light emitting layer on both sides of the light emitting layer is a so-called double heterojunction. This structure is preferable because it can emit light with high emission efficiency.

The Group 3-5 compound semiconductor of the present invention is obtained by growing it on a conductive Si substrate. By using a thin film of AlN or the like as a buffer layer on the conductive Si substrate, a 3-5 group compound semiconductor layer having high crystallinity can be grown. The preferred crystal orientation of the conductive Si substrate is the (111) plane. In the case of other orientations, the 3-
It is not preferable because the Group 5 compound semiconductor cannot grow.
The deviation from the (111) plane, that is, the so-called off angle is preferably 5 ° or less. When the off angle is larger than 5 °, the crystal quality of the Group 3-5 compound semiconductor grown on the substrate is deteriorated, which is not preferable.

The conductivity type of the Si substrate in the present invention may be either n-type or p-type and can be suitably used. As the n-type Si substrate, a substrate doped with N or P as an impurity can be preferably used. The n-type carrier concentration is 1 × 10 ^18.
cm ⁻³ or more is preferable, and more preferably 5 × 10 ¹⁸ c
m ⁻³ or more. If it is smaller than 1 × 10 ¹⁸ cm ⁻³ , the contact resistance of the electrode becomes large and the current may become difficult to flow, which is not preferable. As the p-type Si substrate, a substrate doped with Al or B as an impurity can be preferably used. The p-type carrier concentration is 1 × 10 ^18.
cm ⁻³ or more is preferable, and more preferably 5 × 10 ¹⁸ c
m ⁻³ or more. If it is smaller than 1 × 10 ¹⁸ cm ⁻³ , the contact resistance of the electrode becomes large and the current may become difficult to flow, which is not preferable.

The method for producing a 3-5 group compound semiconductor according to the present invention includes metal organic chemical vapor deposition (hereinafter referred to as MOVPE).
It may be written. ) Method, molecular beam epitaxy (hereinafter,
Sometimes referred to as MBE. ) Method, hydride vapor phase epitaxy (hereinafter sometimes referred to as HVPE) method, and the like. Among them, the MOVPE method is a method of heating a substrate placed under normal pressure or reduced pressure, supplying an organometallic compound containing a Group 3 element and a raw material containing a Group 5 element in a vapor phase state, and heating the substrate. The MBE method, which is a method of causing a decomposition reaction to grow a semiconductor film, refers to supplying a group 3 element simple substance or an organometallic compound containing a group 3 element and a raw material containing a group 5 element in a vapor phase state in a high vacuum. , A method of growing on a substrate. In the VPE method, a substrate placed under normal pressure or reduced pressure is heated to react a gas containing a group 3 element with a halogen element to obtain a group 3 halide gas. It is a method of supplying a raw material containing it in a vapor phase state and causing a thermal decomposition reaction on a substrate to grow a semiconductor film. Among the above methods, a compound semiconductor with a complicated layer structure is accurately prepared in terms of composition and film thickness. MOV is a possible method
The PE method and the MBE method are preferable, and the MOVPE method capable of forming a uniform film over a large area is more preferable.

In the case of MOVPE method, the following raw materials are used.
Can be used. That is, as the Group 3 raw material,
Chill gallium [(CH_Three)_ThreeGa, hereinafter referred to as "TMG"
Sometimes. ], Triethylgallium [(C_TwoH_Five)
_ThreeGa, hereinafter sometimes referred to as "TEG". ] General
Formula R¹R^TwoR^ThreeGa (where R¹, R ^Two, R^Three, Is low
Shows an alkyl group. ) Trialkylgaliu
Trimethyl aluminum [(CH_Three)_ThreeAl],
Liethyl aluminum [(C_TwoH _Five)_ThreeAl, hereinafter "T
Sometimes referred to as "EA". ], Triisobutylaluminium
Umm [(i-C_FourH₉)_ThreeAl] etc.¹R^TwoR
^ThreeAl (where R¹, R^Two, R^Three, Is a lower alkyl group
Show. ) Trialkylaluminum represented by;
Cylamine Alan [(CH_Three)_ThreeN: AlH_Three];bird
Methyl indium [(CH_Three)_ThreeIn, "TM
Sometimes referred to as "I". ], Triethylindium
[(C_TwoH_Five)_ThreeIn] or other general formula R¹R^TwoR^ThreeIn
(Where R¹, R^Two, R^Three, Represents a lower alkyl group
You. ) Trialkylindium represented by
You. These may be used alone or as a mixture. Next is the 5th family
Ammonia, hydrazine, methylhydrazide
1,1-dimethylhydrazine, 1,2-dimethylhydrazine
Drazine, t-butylamine, ethylenediamine, etc.
No. These may be used alone or as a mixture. This
Among these raw materials, ammonia and hydrazine are in the molecule.
Since it does not contain carbon atoms, there is less carbon contamination in the semiconductor.
Not suitable. N-type dopa of the 3-5 group compound semiconductor
As the component, a Group 4 element and a Group 6 element are preferable. concrete
Include Si, Ge, O, S, Se, among which
Low n resistance n-type is easy to make and the raw material purity is high
Si is preferable because As a raw material for Si dopant
For silane (SiH_Four), Disilane (Si_TwoH₆)
Which is preferable. The p-type dopant of the 3-5 group compound semiconductor
As the punt, a Group 2 element is preferable. Specifically, M
Examples include g, Zn, Cd, Hg, and Be.
Then, Mg is preferable because it is easy to form a low resistance p-type. Mg
As a raw material for the dopant, biscyclopentadienyl
Magnesium, bismethylcyclopentadienyl magne
Cium, bisethylcyclopentadienylmagnesium
Bis-n-propylcyclopentadienyl magnesi
Um, bis-i-propylcyclopentadienyl magne
General formula such as sium (RC_FiveH_Four)_TwoMg (however, R is
Hydrogen atom or lower alkyl group having 1 to 4 carbon atoms
Is shown. ) The organometallic compound represented by
Suitable to have.

Next, a method of manufacturing electrodes in the light emitting device of the present invention will be described. First, 3 on the conductive Si substrate
A laminated structure of a Group-5 compound semiconductor is formed, then an exposed portion of the n-type layer and an exposed portion of the conductive Si substrate are formed, and an electrode is formed on the exposed portion. As a method for forming the exposed portion of the n-type layer of the compound semiconductor and the exposed portion of the Si substrate, a method of performing etching twice, a method of performing selective growth and etching once, and a method of performing selective growth twice There is. FIG.
The method of manufacturing the LED by performing the etching twice on
FIG. 2 shows a method for producing an LED by performing selective growth and etching once.

First, a method of manufacturing an LED by performing etching twice will be described with reference to FIG. In the growth of the compound semiconductor, an n-type layer is usually grown first and a laminated structure of a light emitting device is grown on the n-type layer for ease of growth. A compound semiconductor composed of an n-type layer 3, a light-emitting layer 2 and a p-type layer 1 is produced on a conductive Si substrate 5 with a buffer layer 4 in between (A). Next, on the p-type layer 1,
A mask pattern 6 is formed by a normal photolithography method (B), and the laminated structure of the compound semiconductor is etched using this mask to form an exposed portion 7 of the n-type layer (C). As a method of etching the compound semiconductor, there are dry etching and wet etching. Since the dry etching can obtain a large etching rate, the process time can be shortened, which is useful. However, dry etching sometimes damages the surface after etching and deteriorates the conductivity. In such a case, it is necessary to remove the damage by wet etching or annealing.

Since wet etching does not cause etching damage, there is an advantage that a damage treatment step is unnecessary. However, since the compound semiconductor is chemically extremely stable in general, a strong acid or alkali is required and a photoresist is used. Since it cannot be used as a mask, SiO ₂ , Si ₃ N ₄ or the like is used as the mask. Therefore, the number of mask manufacturing steps is increased as compared with the case of dry etching. Further, since the etching rate of wet etching cannot be increased, the process time becomes long. Therefore, dry etching is preferable in terms of shortening the process. Next, the second etching is performed by the same method ((D) and (E)) to form the exposed portion 9 of the conductive Si substrate (E).

Next, a mask pattern of photoresist is formed on the exposed portion 7 of the n-type semiconductor by using a normal photolithography method, and this is used to form the electrode 1
0-1 is formed (F). Current-injecting characteristics are good for the n-type compound semiconductor, and Al, In, and Ti-Al alloys are mentioned as those that can be used as so-called ohmic electrodes. Among these, Al is preferable because it provides ohmic contact without special heat treatment and has high heat resistance. As a method for forming the electrodes, there are a vacuum vapor deposition method, a sputtering method, and the like, but a vacuum vapor deposition method that does not damage the semiconductor surface and has good film thickness controllability is preferable.

In the same manner, the exposed portion 9 of the conductive Si substrate is exposed.
An electrode 10-2 is formed on the conductive substrate using an electrode material having a good current injection characteristic (F). As the ohmic electrode material for the Si substrate exhibiting n-type conductivity, Al, Pt, Cr, Mo, TiN or the like can be preferably used. As the ohmic electrode material for the Si substrate exhibiting p-type conductivity, Al, Cr, Mo or the like can be preferably used. The electrode 10-2 formed on the exposed portion of the conductive Si substrate and the electrode 10-1 formed on the exposed portion of the n-type semiconductor need to be electrically connected.
If they are not connected, a current path is not formed and the effect of the present invention cannot be obtained, which is not preferable. The order of manufacturing the electrode 10-2 formed on the exposed portion of the conductive Si substrate and the electrode 10-1 formed on the exposed portion of the n-type semiconductor may be the reverse of the above description. If the same material can be used for the electrode 10-1 formed on the exposed portion of the n-type semiconductor and the electrode 10-2 formed on the exposed portion of the conductive Si substrate, both electrodes can be formed simultaneously. it can.

Next, the electrode 11 is formed on the surface of the p-type semiconductor (G). As a so-called ohmic electrode that has good current injection characteristics with respect to the p-type compound semiconductor, it can be used as a Mg-Au alloy, a Mg-Au-Zn alloy, or Zn.
-Au alloy, Ni-Au alloy, etc. are mentioned. In some cases, the formed electrode may be further heat-treated to improve the current injection characteristic. In the case of Ni-Au alloy, the heat treatment temperature is 200 ° C or higher and 600 ° C or lower. Mg-A
In the case of u alloy, the heat treatment temperature is 600 ° C. or higher and 900 ° C. or lower. If the heat treatment temperature is out of the above range, the current injection characteristic is not improved, which is not preferable.

The material for the p-electrode 11 does not have sufficient adhesion to the p-type layer and may be peeled off in the wire bonding process. In this case, the bonding pad portion 11 'may be formed of a material having good adhesion to the p-type layer (G). Al can be preferably used as a material having good adhesion to the p-type layer. Depending on the heat treatment temperature of the electrode 11 formed on the p-type semiconductor, the electrode 10-1 formed on the exposed portion of the n-type semiconductor or the electrode 10-2 formed on the exposed portion of the conductive Si substrate causes ball-up. In some cases, it becomes island-shaped and cannot be used as an electrode. In this case, the electrode 11 on the p-type semiconductor may be formed first, and after heat treatment, another electrode may be formed. Next, the electrode 12 is formed on the entire back surface of the conductive Si substrate (G). As the electrode material, the same material as the electrode formed on the exposed portion of the conductive Si substrate can be used.

The substrate on which the p-electrode 11, the n-electrode 12, and the electrode 10-1 formed on the exposed portion of the n-type semiconductor and the electrode 10-2 formed on the exposed portion of the conductive Si substrate connected thereto are formed. , Then divided into LED chips. The division is
By utilizing the cleavage property of the crystal orientation (111) of the conductive Si substrate, a known method, specifically, dicing or scribing, or a combination of both is performed.
The dicing is a method of making a notch in a substrate by using a dicing saw and using the notch to make a cut. Although dicing can be divided in any direction other than the cleavage direction of the substrate, the number of chips that can be taken out from one substrate is smaller than that of scribing because a cutting margin corresponding to the width of the dicing saw is required. Further, since dicing damage occurs, a damage removing step may be necessary. Scribing is a method in which the cleavage of a substrate is used to make a scratch in the cleavage direction with diamond or the like, and the substrate is cleaved starting from this scratch. Although the substrate can only be divided in the cleavable direction, the cutting width can be reduced compared to dicing, so the number of chips that can be taken out from one substrate can be increased, damage is less likely to occur, and a smooth end face can be obtained. There are features.

Next, the LED chip is fixed to a commonly used LED lead frame with a reflection cup so that the substrate faces downward (G). The fixing is performed by die bonding using Ag paste. Next, the bonding pad 11 'and the other lead frame are connected by a lead wire by wire bonding (G). As a result, a current path is formed from one lead frame through the LED chip to the other lead frame. Since the chip and the lead frame are fixed by one wire bonding from the semiconductor side and die bonding on the back surface of the substrate, the LED can be manufactured without changing the conventional LED assembly process. The lead frame to which the LED chip is fixed is resin-molded and LE
A D lamp is made.

Next, a method of producing an LED by performing selective growth and one etching will be described with reference to FIG. First, the mask 15 is formed on the conductive Si substrate 5 (A). The mask material is required to be one that is thermally and chemically stable to withstand the growth process of the compound semiconductor and that can easily form a fine mask pattern by a photolithography method. SiO ₂ can be preferably used as such a material.

Next, a laminated structure of compound semiconductor is grown on a substrate on which, for example, a SiO ₂ mask is formed (B). At this time, the compound semiconductor does not grow on the SiO ₂ mask, and the compound semiconductor grows only on the portion without the SiO ₂ mask. After growth, use hydrofluoric acid or the like to remove SiO ₂
The exposed portion 9 of the conductive Si substrate is formed by removing the mask (C).

Next, a photoresist pattern is formed on the laminated structure of the compound semiconductor by an ordinary photolithography method, and using this as a mask, etching is performed to form an exposed portion 7 of the n-type semiconductor. (D). In the following, an LED is manufactured by the method described above. That is, the electrodes 10-1 and 10-2 are formed on the two exposed portions so as to be electrically connected to each other (E), and then p.
Electrode 11, p-electrode pad portion 11 ', n-electrode 1 on the back surface of the substrate
After forming 2, the substrate is divided according to a normal LED assembly method, and the chip is fixed to the LED stem by die bonding on the back surface of the substrate and one wire bonding to fabricate an LED (F).

An electrode 10 (an electrode 10-1 on an n-type semiconductor and an electrode 10-on a conductive Si substrate) for connecting an exposed portion of an n-type compound semiconductor and an exposed portion of a conductive Si substrate in the present invention is connected.
Regarding the pattern of the electrode formed by connecting 2) and the p-electrode 11, the structure (plan view) illustrated in FIGS. 3A and 3B can be used. In the light emitting device having the structure shown in FIGS. 1 and 2, light emission is mainly taken out through the p electrode 11, so that it is preferable to reduce the film thickness of the p electrode 11. In this case, the light emitting portion substantially coincides with the p electrode portion 11.
Therefore, in order to increase the brightness, it is desirable to increase the area of the p electrode portion. In the conventional electrode pattern shown in FIG. 4, it is difficult to increase the area of the light emitting portion because two electrodes are taken out from the semiconductor side. However, when the light emitting element of the present invention is used, one electrode is provided from the semiconductor side. Since only the electrode of 1 is taken out, the p electrode area can be increased and the brightness can be improved. N in the present invention
It is desirable that the electrode 10 connecting the exposed portion of the type compound semiconductor and the exposed portion of the n-type Si substrate be located around the p electrode in order to make the light emission at the p electrode portion uniform, but only a part of the periphery. May be there.

When the conductive Si substrate of the present invention is used, among the light emitted from the light emitting layer 2, the light emitted to the substrate side may be absorbed by the substrate and may not be effectively extracted to the outside. In such a case, by providing a so-called Bragg reflection layer between the light emitting layer 2 and the substrate 5, it is possible to effectively reflect the light emitted to the substrate side and improve the efficiency of extracting it to the outside. The Bragg reflection layer is a structure in which two kinds of materials having different refractive indexes are repeatedly laminated, and the thickness of each layer is λ / 4n ₁ and λ / 4n ₂ (where λ is the emission wavelength,
n ₁ and n ₂ are adjusted so as to be the refractive index of each layer. As a material for forming such a reflective layer, A
_{lN, GaN, Ga y Al 1} -y N ( However, 0 <y <
1) can be used.

The laminated structure of the group 3-5 compound semiconductor in the light emitting device of the present invention has an n-type layer 3 and a p-type layer 1.
And a so-called double hetero structure in which the light emitting layer 2 is between both layers, and both sides of the light emitting layer are in contact with each other by two layers having a band gap larger than that of the light emitting layer. The double heterostructure is useful because it has the effect of confining the injected charges in the light emitting layer, and can increase the light emission efficiency. In a light-emitting device manufactured using the Group 3-5 compound semiconductor, in order to relax the lattice mismatch with the substrate 5, the buffer layer 4 is first grown, and then an n-type layer is usually used for ease of growth. 3 is grown, the light emitting layer 2 is grown above the light emitting layer 3, and the p-type layer 1 is grown above the light emitting layer. The basic structure of a light emitting element such as an LED is an n-type layer 3, a light emitting layer 2 and a p-type layer.
One of the mold layers is sufficient, but the light emitting layer and the n-type layer and / or p
By placing a non-doped layer or a lightly doped layer between the mold layers, the luminous efficiency may be improved.

In the light emitting device having the double hetero structure of the present invention, in order to efficiently confine charges in the light emitting layer, the band gaps of the two layers in contact with the light emitting layer should be larger than the band gap of the light emitting layer by 0.1 eV or more. preferable.
More preferably, it is 0.3 eV or more.

The lattice constant of the 3-5 group compound semiconductor in the present invention largely changes depending on the composition. In particular, the lattice constant of InN is about 12% or more higher than that of GaN or AlN. Therefore, depending on the composition of each layer of the compound semiconductor, a large difference may occur in the lattice constant between layers. If there is a large lattice mismatch, defects may occur in the crystal, which causes deterioration of crystal quality. In order to suppress the occurrence of defects due to lattice mismatch, the layer thickness must be reduced according to the magnitude of strain due to lattice mismatch. The preferred thickness range depends on the amount of strain. The preferred thickness of the light emitting layer in the present invention is 5Å or more and 500Å or less, and the more preferred thickness range is 5Å or more and 90Å or less. If the thickness of the In-containing layer is less than 5Å, the luminous efficiency is not sufficiently high.
If it is larger than 00Å, defects occur and the luminous efficiency is still not sufficient, which is not preferable.

By reducing the thickness of the light emitting layer,
Since the charges can be confined in the light emitting layer with high density,
The luminous efficiency can be improved. Therefore, even if the difference in lattice constant is smaller than that in the above example, the thickness of the light emitting layer is preferably the same as in the above example. The light emitting layer may be a layer composed of a plurality of layers functioning as a light emitting layer. Specifically, as an example in which a layer composed of a plurality of layers functions as a light emitting layer, there is a structure in which two or more light emitting layers are stacked with a layer having a larger band gap.

The light emitting layer used in the light emitting device of the present invention includes In _x Ga _y Al _z N (where x + y + z =
1, 0.10 ≤ x ≤ 1, 0 ≤ y ≤ 1, 0 ≤ z ≤ 1) is particularly useful for display applications because the band gap can be made visible. Here, the InN mixed crystal ratio of the compound semiconductor of the general formula is 10% or less.
It may be referred to as the above compound semiconductor. According to this,
The terms GaN mixed crystal ratio and AlN mixed crystal ratio may be used. As the compound semiconductor used for the light emitting layer, a compound semiconductor containing Al easily takes in impurities such as O, and the light emitting efficiency of the light emitting element may be lowered. In such a case, as the light emitting layer, a layer represented by the general formula In _x Ga _1-x N (where 0 <x ≦ 1) containing no Al can be used.

By doping the light emitting layer with impurities, it is possible to emit light at a wavelength different from the band gap of the light emitting layer. Since this is light emission from impurities, it is called impurity light emission. In the case of impurity emission, the emission wavelength is determined by the composition of the Group 3 element of the light emitting layer and the impurity element. in this case,
The InN mixed crystal ratio of the light emitting layer is preferably 5% or more. When the InN mixed crystal ratio is less than 5%, most of the emitted light is ultraviolet light, and sufficient brightness cannot be felt. In
The emission wavelength becomes longer as the N mixed crystal ratio is increased, and the emission wavelength can be adjusted from purple to blue and green. Impurities suitable for light emission are preferably Group 2 elements. Among the Group 2 elements, doping with Mg, Zn, and Cd is preferable because the luminous efficiency is high. Zn is particularly preferable. The concentration of these elements is preferably 10 ¹⁸ to 10 ²² cm ⁻³ . The light emitting layer may be simultaneously doped with Si or Ge together with these Group 2 elements. The preferred concentration range of Si and Ge is 10
^{It is 18} to 10 ²² cm ^-3 .

In the case of impurity emission, the emission spectrum is generally
Becomes broader and the emission space increases as the injected charge increases.
The spectrum shifts or the peak of the band edge emission appears.
It has unfavorable emission characteristics such as
It is difficult to increase the light efficiency. Therefore, high color purity
Is required or the emission power is concentrated in a narrow wavelength range.
If necessary, or a device with high luminous efficiency is required
In this case, it is advantageous to use band edge emission. Ba
In order to realize a light emitting device with edge-emitting,
The amount of impurities contained in must be kept low. Ingredient
Physically, each element of Si, Ge, Mg, Cd and Zn
For each, the concentration is 10¹⁹cm ^-3The following is preferred
No. More preferably 10¹⁸cm^-3It is as follows. band
In the case of edge emission, the emission color is determined by the composition of the Group 3 element of the emission layer.
You. When emitting light in the visible region, the InN mixed crystal ratio is 10% or less.
Above is preferred. When the InN mixed crystal ratio is less than 10%,
Most of the emitted light is ultraviolet light, so you can feel sufficient brightness.
I can't twiddle. Emitted as the InN mixed crystal ratio increases
The light wavelength becomes longer, and the emission wavelength can be adjusted from purple to blue and green.
Wear.

[0034]

EXAMPLES The present invention will be described in detail with reference to the following Examples, but it should not be construed that the present invention is limited thereto. Example 1 A group 3-5 compound semiconductor shown in FIG. 5 is manufactured by vapor phase growth by MOVPE. A conductive Si substrate 5 having n-type conductivity (however, the crystal orientation is (111)) mirror-polished is used as the substrate. The growth is by a two-step growth method using a low temperature growth buffer layer. As the buffer layer 4, AlN is 500 Å with TMA and ammonia at 600 ° C.
After film formation, GaN doped with Si at 1100 ° C. using TMG, ammonia, and silane (SiH ₄ ) as a dopant has a thickness of 3 μm (n-type layer 3) and undoped GaN has a thickness of 1500 Å (non-doped layer 3). ')so,
The film is formed in this order.

Next, after the temperature was lowered to 785 ° C., the carrier gas was changed from hydrogen to nitrogen, and TEG, TMI, and ammonia were added at 0.04 sccm, 0.08 sccm, and 4 s, respectively.
In _0.3 Ga _0.7 N which is the light emitting layer 2 is supplied by 90 nm.
Second growth, and TEG, TEA, and ammonia at 0.032 sccm, 0.008 sccm, and 4 sl, respectively.
m of Ga _0.8 Al _0.2 N, which is the protective layer 1 ′, is supplied.
Grow by a minute. However, sccm and slm are units of gas flow rate, and 1 sccm indicates that a weight of gas occupies a volume of 1 cc in a standard state per minute.
lm is 1000 sccm. The growth rates obtained from the films obtained by growing these layers for a long time under the same conditions as in this example are 33 Å / min and 25 Å / min, respectively, and the film thicknesses of the respective layers obtained from these growth rates are In _0.3 Ga, respectively. _0.7 N
The layer is 50Å and the Ga _0.8 Al _0.2 N layer is 250Å.

Next, the temperature is raised to 1100 ° C., and ammonia, biscyclopentadienyl magnesium ((C ₅ H ₅ ) ₂ Mg as a p-type dopant raw material, hereinafter referred to as Cp ₂ Mg
It may be written. ) Is supplied for 40 seconds to perform a Mg empty flow step, and then Mg-doped GaN is grown to 5000 Å using TMG, ammonia and Cp ₂ Mg (p-type layer 1). After the growth was completed, the substrate was taken out and placed in nitrogen 8
Heat treatment is performed at 00 ° C. to make Mg-doped GaN into a low-resistance p-type (p-type layer 1).

A photoresist pattern is formed on the thus-obtained sample by a photolithography technique, a first dry etching is performed, and 7,000 Å etching is performed to form an exposed portion 7 of the n-type semiconductor. The dry etching is performed by ECR plasma dry etching using Cl ₂ gas. The etching conditions are: Cl ₂ gas flow rate 30 sccm, etching pressure 1 mTorr, R
The F power is 90 W, the microwave power is 400 W, and the sample temperature is 20 ° C. After completion of the first dry etching, the residual photoresist mask is removed with an organic solvent, and then a photoresist pattern is formed again by the photolithography method, and the second dry etching is performed.
The exposed portion 9 of the n-type substrate is formed by μm etching.
The dry etching conditions are the same as the first time.

Dry etching is performed twice to form an electrode on the sample on which the exposed portion 7 of the n-type semiconductor and the exposed portion 9 of the n-type substrate are formed, by the vacuum deposition method. First, a photoresist pattern is formed by a photolithography technique, Mg-Au that is a p-electrode is vapor-deposited, and then an excess vapor-deposited portion is removed together with the photoresist by lift-off, so that the p-electrode 11 is formed on the p-type semiconductor layer.
To form In addition, the vapor deposition is performed by the resistance heating vapor deposition method.
After depositing 50 Å of Au, 450 Å of Au is deposited. Remove the sample from the vacuum chamber and in N ₂ at 800 ° C for 9
Heat treatment is performed for 0 seconds to alloy Mg-Au and improve current injection characteristics. Next, in a similar manner, the Al electrode 1 on the exposed portion 7 of the n-type semiconductor and the exposed portion 9 of the n-type substrate 1
0 and an Al pattern of the wire bonding pad 11 'are formed. Note that evaporation is performed by an electron beam evaporation method. Next, in the same manner, A on the exposed n-type semiconductor is
The l electrode pattern (p electrode 11) and the Al electrode pattern (wire bonding pad 11 ′) for the p electrode lead-out pad are formed by connecting with the p electrode 11. Finally, the Al electrode 12 is formed on the entire back surface of the n-type conductive Si substrate.
Are formed by resistance heating vapor deposition.

The epiwafer having the electrodes formed as described above is cut using a dicing machine,
After utilizing this notch to divide into strips, scratches are made in the cleavage direction with a scriber, and then cleavage is performed to divide into LED chips. Next, using a die bonder, the back surface of the chip was fixed to the LED fixing part of the LED lead frame with a reflection cup with Ag paste and dried at 150 ° C. for 2 hours to solidify the Ag paste, and then using a wire bonder. The wire bonding pad 11 ′ for taking out the p-electrode is bonded with an Au wire, and the other end of the Au wire is fixed to the lead frame. Next, LE
An LED lamp is manufactured by performing resin molding on the lead frame to which the D chip is fixed. Thus, an LED lamp having a structure in which one electrode is taken out from the semiconductor side and the other electrode is taken out from the substrate side is obtained.

[0040]

By using the light emitting device structure of the present invention, one electrode can be taken out from the semiconductor side and the other electrode can be taken out from the substrate side, that is, one ball bonding from the semiconductor side, for example. Since the electrodes can be taken out by die bonding from the back surface side of the substrate, the light emitting element assembly process can be simplified and the cost can be reduced. Moreover, since a conductive Si substrate is used, it is possible to prevent dielectric breakdown of the element. Therefore, the cost of manufacturing an LED using the compound semiconductor can be dramatically reduced, and the industrial value is extremely large.

[Brief description of the drawings]

1A to 1C are cross-sectional views showing an example of a manufacturing process of a light-emitting element of the present invention.

2A to 2C are cross-sectional views showing an example of a manufacturing process of a light-emitting element of the present invention.

FIG. 3 is a plan view showing an example of an electrode pattern in the light emitting device of the present invention.

FIG. 4 is a plan view showing an electrode pattern in a conventional light emitting device.

5 is a diagram showing a cross-sectional structure of the light emitting device of Example 1. FIG.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... P-type layer 1 '... Protective layer 2 ... Emitting layer 3 ... N-type layer 3' ... Non-doped layer 4 ... Buffer layer 5 ... Conductive Si substrate 6, 8 ... Etching mask 7 ... N-type semiconductor exposed part 9 ... Conductive Si substrate exposed portion 10-1 ... Electrode on n-type semiconductor 10-2 ... Electrode on conductive Si substrate 10 ... Electrode 10-1 on n-type semiconductor and electrode 10-2 on conductive Si substrate Connected electrode 11 ... P electrode 11 '... Wire bonding pad 12 ... Electrode 13 ... Au wire formed by wire bonding 14 ... LED lead frame 15 ... Mask

Claims (3)

[Claims] 1. A general formula In formed on a conductive Si substrate.
_x Gay _y Al _z N (where x + y + z = 1, 0 ≦ x ≦
1, 0 ≤ y ≤ 1, 0 ≤ z ≤ 1), wherein a light emitting element using a Group 3-5 compound semiconductor is n
Type electrode having an electroconductivity formed on a Group 3-5 compound semiconductor, and an electrode formed on an electroconductive Si substrate, and the two electrodes are electrically connected A light emitting element characterized by the above. 2. The light emitting device according to claim 1, wherein the thickness of the light emitting layer is 5 Å or more and 500 Å or less. 3. Si, Ge, Mg, Zn contained in the light emitting layer
3. The light emitting device according to claim 1, wherein the concentration of each element of Cd and Cd is 1 × 10 ¹⁹ cm ⁻³ or less.