JPH09116291A - Semiconductor integrated circuit device and its packaging structure - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent adjacent electronic parts from receiving electromagnetic interference(EMI) from an electromagnetic fields generated by current loops even when electric currents are made to flow in a semiconductor integrated circuit device. SOLUTION: In a semiconductor integrated circuit device LSI, a plurality of current circuits is enclosed in a package 100 and the current circuits are respectively provided with power supply terminals PS1-PS4 and grounding terminals GND1-GND4. The power supply terminals PS1-PS4 or grounding terminals GND1-GND4 are arranged on the facing sides of the package 100 so that the electric currents made to flow to the current circuits can flow in the opposite directions. Since the current loops of the current circuits are formed in the opposite directions, the electromagnetic fields H1 and H2 generated by the current loops are also directed in the opposite directions and the fields H1 and H2 offset each other. As a result, the radiation of electromagnetic waves from the LSI is suppressed as a whole and an effective countermeasure can be taken against EMI.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor integrated circuit device used for communication devices, computers, etc.
MI (unnecessary electromagnetic radiation: electro magneti)
The present invention relates to a semiconductor integrated circuit device capable of effectively suppressing c interference) and its mounting structure.

[0002]

2. Description of the Related Art In a semiconductor integrated circuit device, a package is provided with a power supply terminal (PS terminal) and a ground terminal (GND terminal). When power is supplied through these terminals, a current flowing through a circuit provided in the package is generated. An electromagnetic field is generated as a cause, and this may cause EMI to an electronic component in the vicinity. In particular, if the power supply is increased with the recent increase in capacity of semiconductor integrated circuit devices, the effect of EMI cannot be ignored. In order to suppress such EMI, measures such as inserting a component such as ferrite that suppresses the generation of electromagnetic waves by absorbing the EMI into the semiconductor integrated circuit device, or the generated electromagnetic field may be transmitted to other electronic components. Measures are being taken to install a shield wall that does not affect it. However, these measures cause a problem that the semiconductor integrated circuit device becomes large-sized or the circuit board on which the semiconductor integrated circuit device is mounted becomes large-sized.

To address this problem, Japanese Patent Laid-Open No. 3-16
Japanese Patent Laid-Open No. Hei 4-26351 discloses a measure for suppressing electromagnetic radiation by suppressing a current flowing in a clock signal that causes electromagnetic radiation in a semiconductor integrated circuit device.
As described in Japanese Patent No. 5, a countermeasure is taken to suppress electromagnetic radiation by shifting switching timings in a plurality of circuits so that a large current does not flow at the same time.

[0004]

However, in the measures described in these publications, the amount of current flowing through the semiconductor integrated circuit device and the timing of signals are controlled, so that there are many restrictions on the circuit operation. The degree of freedom in design may be impaired. Further, as shown in FIG. 5A, in a communication device, a computer, or the like in which a plurality of semiconductor integrated circuit device ICs are mounted on one or a plurality of circuit boards 500,
In order to suppress the influence of the electromagnetic field from each semiconductor integrated circuit device IC, it is necessary to control the energization amount and signal timing of all the semiconductor integrated circuit devices IC, and a control system therefor. Has the problem of being extremely complicated.

Further, when a plurality of semiconductor integrated circuit devices ICs are mounted as shown in FIG. 5A, even if electromagnetic waves radiated from individual semiconductor integrated circuit devices ICs are suppressed, FIG. Individual semiconductor integrated circuit device IC as in b)
Since the electromagnetic fields H generated at are integrated respectively, the radiation amount of the entire circuit board becomes extremely large,
The effect of EMI becomes extremely significant.

An object of the present invention is to provide a semiconductor integrated circuit device capable of suppressing electromagnetic radiation in each semiconductor integrated circuit device. Another object of the present invention is to provide a mounting structure capable of suppressing electromagnetic radiation of the entire device when a large number of semiconductor integrated circuit devices are arranged and mounted on a circuit board to form a semiconductor device. Especially.

[0007]

A semiconductor integrated circuit device according to the present invention has a package in which a plurality of current circuits are sealed, and each current circuit has a power supply terminal and a ground terminal. A power supply terminal or a ground terminal is arranged on opposite sides of the package, and the currents flowing through the current circuits are directed in opposite directions.

Further, according to the semiconductor integrated circuit device mounting structure of the present invention, a plurality of semiconductor integrated circuit devices each having a power supply terminal and a ground terminal are arranged in a matrix direction on a single circuit board and mounted in a row direction. Alternatively, the semiconductor integrated circuit devices adjacent to each other in at least one of the column directions are characterized in that their power supply terminals and ground terminals are oriented in opposite directions. Alternatively, semiconductor integrated circuit devices each including a power supply terminal and a ground terminal are mounted on a plurality of circuit boards, the circuit boards are arranged in the thickness direction, and the semiconductor integrated circuits mounted on adjacent circuit boards. The device is characterized in that the power supply terminals and the ground terminals are oriented in opposite directions.

[0009]

Next, embodiments of the present invention will be described with reference to the drawings. FIG. 1A is a plan view of an embodiment in which the present invention is applied to a large-scale semiconductor integrated circuit device LSI. This LSI is a rectangular flat type package 1
A large number of leads 101 are respectively projected from the four circumferences of 00, and each lead 101 has a PS terminal and a GN.
It is configured as a D terminal and a signal terminal.
In SI, the first to fourth PS terminals PS1 to PS4
And the first to fourth GNDs corresponding to these PS terminals
The terminals GND1 to GND4 are provided, and the other terminals 101 are all configured as signal terminals. The first to fourth PS terminals PS1 to PS4 and the first to fourth GND terminals GND1 to GND4 form a pair, and a current flows in the LSI from the PS terminal to the GND terminal. Is configured as follows.

In this LSI, the first to fourth PS terminals PS1 to PS4 and the GND terminals GND1 to GND1 are connected.
The GNDs 4 are arranged so as to face the opposite sides of the LSI package 100, and the first and third PS terminals PS1 and PS3 and the second and fourth PS terminals are arranged.
The terminals PS2 and PS4 are arranged so as to face each other on opposite sides, and therefore, the first and third GND terminals GND are provided.
1, GND3 and second and fourth GND terminals GND3, G
Corresponding to this, the ND 4 is also arranged so as to face the opposite sides.

Therefore, in this LSI, when electricity is applied between the first to fourth PS terminals and the GND terminal, L
The direction of the current flowing between the first and third PS terminals and the GND terminal in SI and the second and fourth PS terminals are the same.
The directions of the currents flowing between the terminals and the GND terminals are opposite to each other. Therefore, as shown in the schematic perspective view of FIG. 1B, the direction of the electromagnetic field H1 generated by the current flowing between the first and third PS terminals and the GND terminal, and the second and third directions. The directions of the electromagnetic fields H2 generated by the current flowing between the PS terminal and the GND terminal are opposite to each other, and as a result, both electromagnetic fields H1 and H2 cancel each other out, and the LSI
As a whole, the electromagnetic field generated from the LSI becomes almost zero, and unnecessary electromagnetic radiation is suppressed. This allows LS
It is possible to eliminate the influence of EMI on other electronic components located close to I.

The differential mode radiation (differential radiation) when a current flows in a circuit (loop) in the LSI is E = 131.6 × 10 ^-16 (f ² AI) (1 / r) sin θ expressed. E is an electric field (V / m), f is a frequency (Hz), A is an area (m ² ), I is a current (A), and r is a distance (m). Therefore, since the differential mode radiation is generated in the opposite directions, the current flowing between the first and third PS terminals and the GND terminal and the second and fourth P terminals are generated.
If the currents flowing between the S terminal and the GND terminal are equal,
The electromagnetic fields will cancel each other out.

2A and 2B are views showing a second embodiment of the present invention, in which FIG. 2A is a plan view and FIG. 2B is a sectional view in the column direction. In this embodiment, an example in which a large number of semiconductor integrated circuit device ICs are arrayed and mounted on one circuit board 200 to constitute an electronic device such as a communication device or a computer is shown.
In this embodiment, 4 × 4 = 16 ICs are provided on the circuit board 2
00 in rows and columns arranged in a grid,
0 is electrically connected and mounted. Here, in each IC,
The lead near one of the corners is configured as a PS terminal, the lead near the corner is configured as a GND terminal, and the other leads are configured as signal terminals. In addition, the circuit board 200 has a multilayer wiring structure, and the power supply layer 201, the ground layer 202, and the signal layer 203 are configured as independent wiring layers.
The PS terminals of the above ICs are electrically connected to the power supply layer 201, the GND terminals to the ground layer 202, and the signal terminals to the signal layer 203, respectively.

The 16 ICs are oriented in the same plane direction in the row direction (horizontal direction in the figure), but are adjacent to each other in the column direction (vertical direction in the figure). The direction of the plane of the IC is 180 degrees. Therefore, especially between the ICs adjacent in the column direction, the PS terminal and the GND terminal are directed in the opposite directions.

Therefore, as shown in FIG. 2B, in the ICs in each row arranged in the column direction, the ICs in the odd rows are clocked toward the power supply layer 201, the PS terminal, the inside of the LSI, the GND terminal, and the ground layer 202. A current loop is generated in the direction, and conversely, the ICs in the even rows have a current loop in the counterclockwise direction. Then, the electromagnetic fields H1 and H2 are generated by the current loop of each IC as described above.
H2 is generated in the opposite directions because the directions of the current loops of the adjacent ICs are opposite to each other, and cancels each other. As a result, the electromagnetic field generated as a whole of the circuit board 200 becomes close to zero, unnecessary electromagnetic radiation is reduced, and E for other electronic components adjacent to the circuit board 200 is reduced.
It is possible to eliminate or mitigate the influence of MI. In order to effectively cancel the electromagnetic fields of the ICs in each row, it is preferable to design the current values of the ICs to be equal or substantially equal.

FIG. 3 is a view showing a third embodiment of the present invention, (a) is a side view thereof, and (b) and (c) are AA and B.
It is a front view of each circuit board along each line of B. In this embodiment, a block in which a plurality of (here, four) circuit boards 300 are arranged in multiple stages in the vertical direction is configured, and the blocks are stacked in four stages in the horizontal direction to construct a large-scale device. There is. Here, the length direction of each circuit board, that is, FIG.
The circuit boards 300 adjacent to each other in the left-right direction in (a) have the same configuration, but the circuit boards 300 adjacent to each other in the thickness direction of the circuit board 300, that is, the vertical direction in FIG. That is, in the figure, in the odd-numbered circuit boards 301, as shown in FIG. 3B, all the mounted ICs are oriented in the same direction. Are arranged. On the other hand, in the even-numbered circuit boards 302, as shown in FIG.
As shown in (c), all the mounted ICs have the same orientation, but here, the PS terminal is on the right side and G
It is arranged with the ND terminal facing left.

Therefore, in this configuration, the currents in the ICs of the circuit boards 301 in the odd columns all flow in the same direction, and the currents flow from the left side to the right side.
A clockwise current loop shown in FIG. 3A is generated in each circuit board 301, and an electromagnetic field corresponding to the current loop is generated. On the other hand, since the current flows in the ICs of the circuit boards 302 in the even-numbered columns from the right side to the left side, the counterclockwise current of FIG. A loop is generated and an electromagnetic field corresponding to the loop is generated. Therefore, the directions of the electromagnetic fields generated in the odd-numbered columns and the directions in the even-numbered columns are opposite to each other, canceling each other, and the electromagnetic field of the entire device becomes almost zero, so that the influence of EMI on other electronic components is eliminated or alleviated.

In the second and third embodiments,
Although the present invention shows an example in which a large number of ICs are mounted on a circuit board, the present invention can be similarly applied to a circuit board 400 on which an LSI is mounted as shown in FIG. In this embodiment, the PS terminal and the GND terminal provided in the LSI are directed in the opposite directions to each other in the adjacent LSIs, whereby the directions of the current loops generated in the respective LSIs are reversed, and the electromagnetic waves generated in the respective LSIs are reversed. By canceling the fields with each other, unnecessary electron emission is suppressed, and the effect of EMI is eliminated.

The mounting structure of the LSI shown in FIG. 4 has a row direction or a column direction even when a large number of LSIs are mounted on a circuit board, as described in the first and second embodiments. The same can be applied to the case where the current flowing directions of the LSIs arranged in the above are reversed, or the current flowing directions of the adjacent circuit boards in many circuit boards are reversed. Although illustration is omitted,
Even when ICs and LSIs are mounted on both the front and back sides of a single circuit board, the generation of unwanted electromagnetic radiation can be suppressed by setting the current flow direction of each IC or LSI in the opposite direction. Is.

[0020]

As described above, according to the present invention, a plurality of PS terminals or GNDs provided in a semiconductor integrated circuit device are provided.
Since the terminals are arranged on opposite sides of the package, the directions of the current loops flowing through the PS terminals and the GND terminals are opposite to each other, and the electromagnetic fields generated by the current loops are mutually canceled out, so that the semiconductor An effective EMI countermeasure can be realized by suppressing or eliminating unnecessary electromagnetic radiation from the integrated circuit device.

Further, the mounting structure of the present invention has a PS terminal and a GND of a plurality of semiconductor integrated circuit devices mounted on a circuit board.
A semiconductor device in which terminals are oriented in mutually opposite directions between adjacent semiconductor integrated circuit devices on a plane, or PS terminals and GND terminals of semiconductor integrated circuit devices mounted on a plurality of circuit boards are adjacent in the thickness direction of the circuit boards. Since the integrated circuit devices are directed in opposite directions to each other, the electromagnetic fields between adjacent semiconductor integrated circuit devices are canceled each other, so that the entire circuit board or the entire device composed of a plurality of circuit boards is provided. Effective electromagnetic interference control can be realized by suppressing or eliminating unnecessary electromagnetic radiation.

[Brief description of the drawings]

FIG. 1 is a plan view and a schematic perspective view of a semiconductor integrated circuit device of the present invention.

FIG. 2 is a front view and a sectional view of a mounting structure of a semiconductor integrated circuit device of the present invention.

FIG. 3 is a side view of another embodiment of the mounting structure of the present invention and FIG.
It is a front view which follows the A line and the BB line.

FIG. 4 is a front view of still another embodiment of the mounting structure of the present invention.

FIG. 5 is a diagram for explaining a mounting structure of a conventional semiconductor integrated circuit device and its problems.

[Explanation of symbols]

 LSI semiconductor integrated circuit device IC semiconductor device 100 package 101 lead 200, 300, 400 circuit board 201 power supply layer 202 ground layer 203 signal layer 301 odd circuit board 302 even circuit board PS power supply terminal GND GND (ground) terminal

Claims (4)

[Claims] 1. A semiconductor integrated circuit device in which a plurality of current circuits are sealed in a package, and each current circuit has a power supply terminal and a ground terminal, wherein each of the power supply terminals or ground terminals is mutually connected to the package. A semiconductor integrated circuit device, wherein the semiconductor integrated circuit devices are arranged on opposite sides so that the currents flowing through the current circuits are directed in opposite directions. 2. A mounting structure of a semiconductor integrated circuit device, comprising a plurality of semiconductor integrated circuit devices having a power supply terminal and a ground terminal, arranged in a matrix direction on a single circuit board and mounted in a row direction or a column direction. In the semiconductor integrated circuit device mounting structure, the power supply terminal and the ground terminal of the semiconductor integrated circuit device adjacent to each other in at least one direction are directed in opposite directions. 3. A power supply terminal and a ground terminal of a semiconductor integrated circuit device adjacent to each other in one of a row direction and a column direction are oriented in opposite directions, and a semiconductor integrated circuit device adjacent to another direction is a power supply terminal. 3. The mounting structure for a semiconductor integrated circuit device according to claim 2, wherein the ground terminal and the ground terminal are oriented in the same direction. 4. A mounting structure of a semiconductor integrated circuit device, comprising: a semiconductor integrated circuit device having a power supply terminal and a ground terminal, each mounted on a plurality of circuit boards; and arranging the circuit boards in a thickness direction thereof. A semiconductor integrated circuit device mounted on an adjacent circuit board, wherein each power supply terminal and ground terminal are oriented in opposite directions.