JPH09114424A - Display method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a display method improved in vertical resolution. SOLUTION: A second field is started at a stage in which a first field is completed while maintaining the information written in the first field. Then, the first field of the next frame is started at a stage in which the second field is completed while maintaing the information written in the second field. The vertical resolution is enhanced by executing such operations.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The invention disclosed in this specification relates to a display method in an active matrix type display device represented by an active matrix type liquid crystal display device.

[0002]

2. Description of the Related Art Conventionally, an active matrix type liquid crystal display device has been known. This has a configuration in which a thin film transistor for switching or a non-linear element is arranged in each of the pixels arranged in a matrix, and the electric charge flowing in and out of the pixel electrode is controlled.

Generally, as a display method in an active matrix type liquid crystal display device, a display method in which one frame is divided into a first field and a second field is used. In this method, as shown in the timing chart of FIG. 1, information is first written to odd-numbered rows in pixels arranged in a matrix of m rows and n columns as shown in FIG. Is displayed, and this is set as the first field. Then, next, information is written to even-numbered rows, and this is set as the second field. Thus, one frame is composed of the first field and the second fold.

Specifically, in the matrix area of FIG. 6, information is not sequentially written to the rows (1,1), (2,1), (3,1) ... 1,3), (2,3) ... The information is not sequentially written to the rows as the first field, and then (1,2), (2,2), (3,2) The sequential writing of information is not performed for the rows of ..., Further, the sequential writing of information is not performed for the rows of (1,4), (2,4). Then, one frame ends when the writing of information is completed for all the pixels. Display is performed by repeating this frame 30 times per second.

The above-mentioned method is adopted in order to suppress the flicker that occurs when a bright screen is displayed. This flicker feeling is felt when the vertical scanning time is long. Therefore, by constructing one frame with two fields as described above, the apparent vertical scanning time is halved, and the flicker feeling is suppressed.

There is also a reason that the above method is adopted in order to reduce the amount of information required for one frame.

However, in the display by the above-mentioned method, since the number of scanning lines becomes 2 / n, the vertical resolution is lowered.

[0008]

SUMMARY OF THE INVENTION It is an object of the invention disclosed in the present specification to provide a configuration in which the vertical resolution does not deteriorate even when the scanning method as described above is adopted.

[0009]

One of the inventions disclosed in this specification is a method of writing information in pixel regions arranged in a matrix, which is performed by writing information in odd rows. A field and a second field performed by writing information to even-numbered rows, starting the second field when the first field ends and ending when the second field ends It is characterized in that the information written in the first field is maintained.

In the above configuration, N is set to 1, as shown in FIG.
The relationship between the first field formed by writing information in N rows as an odd number indicated by 3, 5 ... and the second field formed by writing information in N + 1 rows is described as the first field. The second fold is started at the end of the, and the information written in the first field is maintained until the end of the second field.

Further, it is characterized in that the first field of the next frame is started at the time when the second field ends, and the information written in the second field is maintained at that time. By repeating such an operation, the resolution in the vertical scanning direction can be increased.

Another structure of the present invention is a method of writing information in pixel regions arranged in a matrix, where N is an odd number or an even number, and the first field is written by writing information in N rows, and N + 1. A second field made by writing information to the row,
The second field is started when the first field ends, and the information written in the first field is maintained until the second field ends.

The invention disclosed in this specification can be applied to three-dimensional display, time-divisional display of different images, etc. in addition to the normal two-dimensional display. Examples of the structure arranged in a matrix include a matrix circuit of an active matrix liquid crystal display device, a matrix circuit of a display device using an EL element, and the like.

[0014]

As shown in FIG. 1, the relationship between the first field for scanning odd-numbered rows and the second field for scanning even-numbered rows is written in the second field even after the first field is completed. The end stage of the first field is maintained until the end of. That is, the information written in the first fold is maintained. Then, secondly, when the writing of the field is completed, the writing of the first field of the next frame is started.

By thus overlapping the written information in each field, the apparent number of scanning lines can be doubled as compared with the conventional case. And the vertical resolution can be increased.

[0016]

【Example】

[Embodiment 1] FIG. 2 shows an outline of a circuit configuration of a liquid crystal display device of this embodiment. The configuration shown in FIG. 2 operates according to the operation timing chart as shown in FIG.
The display is as shown in (B).

In the configuration shown in FIG. 2, the circuit indicated by 102 is a flip-flop circuit. This circuit has a function of keeping one of the two states stable.

For example, when the rising edge of the operation clock signal is input while the input level is H, the output level becomes H. If the rising edge of the operation clock signal is input when the input level is L, the output level is L
Becomes Then, these states are maintained unless the next rising edge of the operation clock signal is input.

In the configuration shown in FIG. 2, first, VSTA is
The (vertical scanning timing enable signal) is the selection circuit 10.
1 is selected as VSTA1. In this state, an H-level (high in logic level) signal is applied to the input portion of the flip-flop circuit 102.

In this state, CLKV (operation clock of the vertical scanning control circuit) is applied to the flip-flop circuit 102.
Input the rising edge of.

Then, in the flip-flop circuit 102, VSTA is punched out by CLKV, and the signal level of the gate line 103 becomes H level. That is, when the input of the flip-flop circuit 102 is at the H level and the rising edge of CLKV is input, the output of the flip-flop circuit becomes the H level. When the gate signal line 103 becomes H level,
The thin film transistor arranged in the pixel at each address indicated by (1,1), (2.1), (3,1) ... Of the Y ₁ row is turned on.

In this state, in the flip-flop circuit 104, HSTA (horizontal scanning timing enable signal) is punched out at the rising edge of CLKH (horizontal scanning control circuit operation clock). As a result, the signal level of the image sampling signal line 105 becomes H.

Then, the sampling and holding circuit 106 takes in the image data, and the image data flows into the image signal line 107. In this state, (1,1),
Since the thin film transistors in the rows indicated by (2,1), (3,1) ... Are all turned on, image data is written at the address indicated by (1,1).

Next, at the next rising edge of CLKH, the output of the flip-flop circuit 108 becomes H level,
The output of the flip-flop circuit 104 becomes L level.
That is, when the input section of the flip-flop circuit 108 (the output section of the flip-flop circuit 104) is at the H level, C
The input of the next rising edge of LKH changes the output of the flip-flop circuit 108 to the H level. At this time, the output of the flip-flop circuit 104 changes to L level.

As a result, the image sampling signal line 109
Becomes H level. Then, the sampling and holding circuit 110 further captures the image data and supplies the image data to the image signal line 111.

As a result, information is written at the address (2,1). In this way, information is sequentially written up to the pixel at the address (m, 1). In this way, information is written in the Y ₁ row (first row).

After the writing of information to the Y ₁ row is completed, the output of the flip-flop circuit 102 becomes L level and the output of the flip-flop circuit 112 becomes H level at the next rising edge of CLKV. Then, writing of information is sequentially performed on each pixel of the line of the Y ₂ -th row.

That is, information is sequentially written to the addresses indicated by (1,3), (2,3), (3,3), .... Third
After the writing of the information to the line of the row is completed, the same operation is repeated to sequentially write the information on the Y ₃ row and the Y ₄ row. In this way, the writing of the information of the first field is performed.

When the writing of the first field is completed, the next HSTA level signal of VSTA is selected as VSTA2 by the selection circuit 101 as shown in FIG.

Then, by inputting the rising edge of CLKV to the flip-flop circuit 113, VS
TA2 is punched out. Gate signal line 114 in this state
Becomes H level.

Then, the writing of information is sequentially performed in the Y ₁ 'row. This information is written in sequence Y ₂ ',
It will be done for the Y ₃ 'row. That is, the writing of information is sequentially performed on each pixel in the even rows. This Y _n '
Writing information to a row is writing information in the second field.

During the writing of information to the Y _n 'row, the information written in the first field is maintained as it is. That is, the display composed of the Y _n rows is maintained as it is.

When the writing of the second field is completed, the writing of the first field of the next frame is started. During the writing of the next frame, the information written in the previous second field is maintained as it is.

In this way, the first field and the second field are displayed so as to be alternately overlapped by half. When such an operation is performed, the number of vertical scanning lines can be apparently set to n rows, so that the vertical resolution can be improved.

[Embodiment 2] This embodiment relates to a structure in which six active matrix regions 404 to 409 are integrated as shown in FIG. In the configuration shown in FIG. 4, a plurality of active matrix regions are integrated and arranged on the same substrate, and further peripheral circuits for commonly performing the horizontal scanning control circuit and / or the vertical scanning control circuit are also integrated on the same substrate. It is characterized by In the configuration shown in FIG. 4, a glass substrate or a quartz substrate is used as the substrate.

In the structure shown in FIG. 4, the vertical scanning control circuit 401 controls the active matrix region 401.
And 407 vertical scanning is controlled. Further, the vertical scanning control circuit 402 controls the active matrix area 405.
And 408 vertical scanning is controlled. Further, the vertical scanning control circuit 403 controls the active matrix area 406.
And 409 vertical scanning is controlled. In addition, the horizontal scanning control circuit 410 causes the active matrix area 404.
And horizontal scanning of 405 and 406 is controlled. Further, the horizontal scanning control circuit 411 controls the horizontal scanning of the active matrix regions 407, 408 and 409.

The operation of each active matrix area is the same as that shown in the first embodiment. In the configuration shown in FIG. 4, all active matrix regions operate at the same timing.

The configuration shown in FIG. 4 is, for example, 404-40.
A color image made of RGB is formed in the active matrix region shown by 6, and a color image made of RGB is formed in the active matrix region shown by 407 to 409 in the same manner, and the images are superimposed and projected by an appropriate optical system. The configuration can be mentioned. Such a structure can display a bright image.

FIG. 4 shows an example in which six active matrix regions are integrated, but it is not possible to integrate the active matrix regions such as 2 × 1, 3 × 3, and 4 × 2. It is possible.

Generally, the number of active matrices is M × N.
When the number is set to be M, the total number of horizontal scanning control circuits and vertical scanning control circuits required is M + N. Such a structure, combined with the structure integrated on the same substrate, can bring significant advantages such as reduction in manufacturing cost and improvement in reliability.

[Embodiment 3] This embodiment is an example of a projection type display device using the integrated liquid crystal panel shown in FIG. FIG. 5 shows an outline of this embodiment. In FIG. 5, 5
Reference numeral 00 denotes a casing of the apparatus, and an image enlarged and projected from the inside is displayed on a screen 510 arranged in the casing 500.

Here, a configuration for viewing an image from the side opposite to the surface projected on the screen (generally called rear projection) is shown, but a configuration for viewing an image from the surface projected on the screen (generally a projection type). Also called projection), the basic configuration is the same except that the image is reversed. However, the projection type projection is different in that it is not integrated with the housing and the screen.

In the housing 500, an appropriate control circuit 5
11 is built in, and for example, image display control and selection between a two-dimensional image and a three-dimensional image are performed.

In FIG. 5, a light source 501 that emits white light.
The light from is first reflected by the half mirror 502,
GBR with dichroic mirrors 504, 505, 506
Is dispersed into light having a wavelength region corresponding to.

The light reflected by the mirror 503 is also B (blue) G by a dichroic mirror (not shown).
It is split into each wavelength region of (green) R (red). That is, by using two sets of RGB dichroic mirrors, two sets of R
GB rays (6 rays total) are generated.

These light rays are incident on the integrated liquid crystal panel 507 whose outline is shown in FIG. Then, two sets of RGB images formed by being optically modulated by the integrated liquid crystal panel 507 are projected from the optical system 508 to a screen (projection surface) 510 via a mirror 509, and are combined as a color image there. To be done.

The optical system 508 includes a lens system for magnifying projection and a polarization imparting means (usually a polarizing plate is used) used for stereoscopic display (three-dimensional display). In the case of ordinary two-dimensional display, this polarization imparting means merely functions as a light reducing means. Therefore, there is no particular obstacle other than lowering the display brightness. But,
If it is desired to increase the brightness in the two-dimensional display, this polarization imparting means may be mechanically removed from the optical path.

By using the display device as shown in this embodiment, a bright image can be displayed with high resolution.

[0049]

After the end of the first field constituting one frame, the second field is started while maintaining the information written in the first field, and further after the end of the second field. By repeating the operation of starting the first field of the next frame while maintaining the information written in the second field, it is possible to perform display with an increased vertical resolution.

Further, by adopting the above-mentioned configuration in the integrated liquid crystal panel in which a plurality of active matrix regions are controlled by a common peripheral circuit, it is possible to display a high-luminance image having a high vertical resolution and a three-dimensional image. .

[Brief description of the drawings]

FIG. 1 is a chart showing display timing.

FIG. 2 is a schematic diagram showing a configuration of a liquid crystal panel.

FIG. 3 is a chart showing operation timing.

FIG. 4 is a diagram showing a configuration of an integrated liquid crystal panel.

FIG. 5 is a projection display device.

FIG. 6 is a schematic diagram showing a pixel arrangement in a matrix area.

[Explanation of symbols]

101 selection circuit 102 flip-flop circuit 103 gate signal line 104 flip-flop circuit 105 image sampling signal line 106 flip-flop circuit 107 image signal line 108 flip-flop circuit 109 image sampling signal line 110 flip-flop circuit 111 image signal line 112 flip-flop circuit 113 Flip-flop circuit 114 Gate signal line

 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Shunpei Yamazaki 398 Hase, Atsugi-shi, Kanagawa Japan Semiconductor Energy Laboratory Co., Ltd.

Claims (2)

[Claims] 1. A method for writing information in pixel regions arranged in a matrix, wherein a first field is written by writing information in odd rows and a second field is written by writing information in even rows. And starting the second field at the end of the first field and maintaining the information written in the first field until the end of the second field. How to display. 2. A method for writing information in pixel regions arranged in a matrix, wherein N is an odd number or an even number, and a first field is performed by writing information in n rows, and by writing information in N + 1 rows. A second field to be performed, wherein the second field is started when the first field ends, and the information written in the first field is recorded until the second field ends. A display method characterized by maintaining.