JP3602395B2 - Projection type display device - Google Patents

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
Disclosed herein invention relates to a display equipment of an active matrix type typified by an active matrix type liquid crystal display device.
[0002]
[Prior art]
Conventionally, an active matrix type liquid crystal display device is known. This has a configuration in which a switching thin film transistor and a non-linear element are arranged in each of the pixels arranged in a matrix to control the charge flowing into and out of the pixel electrode.
[0003]
In general, as a display method in an active matrix type liquid crystal display device, a display method in which one frame is divided into a first field and a second field is used. In this method, as shown in the timing chart of FIG. 1, information is first written into odd rows of pixels arranged in a matrix of m rows and n columns as shown in FIG. Is displayed, and this is set as the first field. Then, information is written to even-numbered rows, and this is set as a second field. Thus, one frame is composed of the first field and the second fold.
[0004]
Specifically, in the matrix area of FIG. 4, information is not sequentially written to the rows of (1, 1), (2, 1), (3, 1). ), (2,3)... Information is sequentially written to the first field, and then (1,2), (2,2), (3,2). Information is sequentially written to the rows, and further information is sequentially written to the rows of (1, 4), (2, 4). Then, when writing of information to all the pixels is completed, one frame ends. The display is performed by repeating this frame 30 times per second.
[0005]
The reason why the above method is adopted is to suppress the flickering that occurs when the screen is bright. This flicker is felt when the vertical scanning time is long. Therefore, by constituting one frame with two fields as described above, the apparent vertical scanning time is halved, and the flickering is suppressed.
[0006]
Another reason is that the above-described method is employed to reduce the amount of information required for one frame.
[0007]
However, the display by the above-described method has a problem that the vertical resolution is reduced because the actual number of scanning lines is 2 / n.
[0008]
In particular, in a method of performing display by projecting a large screen like a projector, there is a problem that another field that is not displayed is displayed, and the non-display portion is observed. This is a major factor in lowering the vertical resolution.
[0009]
[Problems to be solved by the invention]
An object of the invention disclosed in this specification is to provide a configuration in which the vertical resolution does not decrease even when the above-described scanning method is adopted.
[0010]
[Means for Solving the Problems]
One of the inventions disclosed herein is:
Means for projecting the images divided into two groups in a superimposed manner on a projection surface,
The projected image is composed of pixels arranged in a matrix,
N is an odd number represented by 1, 3, 5,.
It is characterized in that the formation of the (N + 1) th row is performed with the image of the other group.
[0011]
FIG. 3 shows a specific example of the above configuration. FIG. 3 shows a configuration in which the six images formed by the six active matrix areas shown in FIG. 2 are divided into two groups, and the two groups are projected from the optical system 508 onto the screen 510.
[0012]
The display device shown in FIG. 3 includes an integrated liquid crystal panel 507 whose outline is shown in FIG. In the integrated liquid crystal panel denoted by reference numeral 507, for example, the N-th row image is formed in the active matrix regions denoted by reference numerals 201 to 203 in FIG. Then, an image of the (N + 1) th row is formed in the active matrix areas indicated by 204 to 206.
[0013]
The configuration of another invention is as follows.
An apparatus for performing display in which one frame includes a first field and a second field,
Image forming means for forming the first field;
Image forming means for forming the second field;
It is characterized by having.
[0014]
As a specific example of the above configuration, the configuration shown in FIG. 1 can be given. In the configuration shown in FIG. 1, the first field is formed in the active matrix areas 201 to 203, and the second field is formed in the active matrix areas 204 to 206.
[0015]
In particular, as shown in FIG. 1, one image forming means writes information (displays an image) in a period indicated by the first field, and when the writing is completed, the other image forming means performs the second field. Is formed. At this time, in the middle of display of the second field is being performed, allowed to maintain the image of the first field remains fully. Then, the apparent vertical resolution can be increased.
[0016]
The configuration of another invention is as follows.
A method of writing information to each pixel of a display screen arranged in a matrix,
The images divided into two groups are combined and projected,
N is an odd number represented by 1, 3, 5,.
It is characterized in that the formation of the (N + 1) th row is performed with the image of the other group.
[0017]
The configuration of another invention is as follows.
In a display method in which one frame is composed of a first field and a second field,
The first field and the second field are configured by different image forming apparatuses.
[0018]
【Example】
[Example 1]
FIG. 2 shows an outline of an integrated liquid crystal panel used in this embodiment. The configuration shown in FIG. 2 forms a first image composed of RGB in the active matrix areas 201 to 203 and forms a second image composed of RGB in the active matrix areas 204 to 206. Has a function.
[0019]
The horizontal scanning of the active matrix areas 201 to 203 is controlled by a horizontal scanning control circuit 207 disposed in common. The horizontal scanning of the active matrix areas 204 to 206 is controlled by a horizontal scanning control circuit 208 arranged in common.
[0020]
The horizontal scan control circuits 207 and 208 have their operation timing controlled by the vertical scan timing, and operate so as to form images of the first field and the second field. That is, the image formed by the active matrix regions 201 to 203 forms the first field of FIG. 1, and the image formed by the active matrix regions 204 to 206 forms the second field of FIG. Then, one frame is formed by the first field and the second field.
[0021]
The active matrix areas 201 and 204 are commonly controlled by a vertical scanning control circuit 209. The active matrix areas 202 and 205 are commonly controlled by a vertical scanning control circuit 210. The active matrix areas 203 and 206 are commonly controlled by the vertical scanning control circuit 211. The vertical scanning control circuit 209 is provided between the active matrix areas 201 and 204, the vertical scanning control circuit 210 is provided between the active matrix areas 202 and 205, and the vertical scanning control circuit 211 is provided between the active matrix areas 203 and 206. Is provided between
[0022]
Such a configuration can simplify the configuration of the liquid crystal panel, and can increase the production cost and reliability.
[0023]
In the configuration shown in FIG. 2, a circuit indicated by reference numeral 102 is a flip-flop circuit. This circuit has a function of stably maintaining one of the two states.
[0024]
For example, when the rising edge of the operation clock signal is input while the input level is H, the output level becomes H. When the rising edge of the operation clock signal is input while the input level is L, the output level becomes L. Then, it has a function of maintaining these states unless a rising edge of the next operation clock signal is input.
[0025]
In the configuration shown in FIG. 2, first, an H-level signal of VSTA (vertical scanning timing enable signal) is applied to the input of the flip-flop circuit. In this state, the rising edge of CLKV (operating clock of the vertical scanning control circuit) is input to the flip-flop circuit 102.
[0026]
Then, in the flip-flop circuit 102, VSTA is punched out by CLKV, and the signal level of the gate line 103 becomes H level. That is, when the input of the flip-flop circuit 102 is at the H level and the rising edge of CLKV is input, the output of the flip-flop circuit 102 is at the H level.
[0027]
When the gate signal line 103 goes to the H level, the thin film transistor arranged at the pixel at each address indicated by (0, 0), (1.0), (2, 0) (m, 0) Is turned on.
[0028]
In this state, HSTA (horizontal scanning timing enable signal) is punched out by the rising edge of CLKH (operation clock of the horizontal scanning control circuit) in the flip-flop circuit 104. As a result, the signal level of the image sampling signal line 105 becomes H.
[0029]
Then, the sampling hold circuit 106 captures the image data, and the image data flows into the image signal line 107. In this state, since all the thin film transistors in the row indicated by (0, 0), (1, 0), (m, 0)... Are in the ON operation, the address indicated by (0, 0) is eventually obtained. Image data is written.
[0030]
Next, at the next rising edge of CLKH, the output of the flip-flop circuit 108 goes high and the output of the flip-flop circuit 104 goes low. That is, when the input portion of the flip-flop circuit 108 (the output portion of the flip-flop circuit 104) is at the H level, the output of the flip-flop circuit 108 changes to the H level when the next rising edge of CLKH is input. At this time, the output of the flip-flop circuit 104 changes to L level.
[0031]
As a result, the level of the image sampling signal line 109 becomes H level. Then, the image data is further captured by the sampling and holding circuit 110, and the image data is supplied to the image signal line 111.
[0032]
As a result, information is written at the address (1, 0). In this manner, information is written sequentially to the pixel at the address (m, 0). Thus, the writing of information to the first row is performed.
[0033]
Next, the output of the next flip-flop circuit of the vertical scanning control circuit becomes H level, and information is written to addresses (0, 1), (1, 1)... (M, 0). When the writing of the information up to the address (m, n) is completed, the writing of the information of one field is completed.
[0034]
During the above operation, the HSTA is not input to the horizontal scanning control circuit indicated by 208, and the operation is not performed. Therefore, the above operation is similarly performed in the active matrix areas 201 to 203.
[0035]
When the writing of information to all the pixels in the active matrix area indicated by 201 to 203 is completed, the HSTA signal is applied to the horizontal scanning control circuit 208 at the timing of the VSTA (vertical scanning timing enable signal). Then, information is written to the first rows of the active matrix areas 204 to 206.
[0036]
The writing of this information is sequentially performed on all the pixels in the active matrix regions 204 to 206. As a result, the information of the second field is written.
[0037]
In this way, the writing of the information of the RGB fields is performed alternately. When writing the information of one field, the information written in the other fields is maintained. Therefore, the display is performed at the operation timing as shown in FIG.
[0038]
In this case, the number of scanning lines in the vertical direction is not reduced, so that the vertical resolution can be increased.
[0039]
FIG. 2 shows an example in which six active matrix areas are integrated. However, it is possible to integrate active matrix areas such as 2 × 1, 3 × 3, and 4 × 2. .
[0040]
In general, when the number of active matrices is M × N, the required number of horizontal scanning control circuits and vertical scanning control circuits may be M + N in total. Such a configuration, in combination with a configuration integrated over the same substrate, can provide significance such as reduction in manufacturing cost and improvement in reliability.
[0041]
[Example 2]
This embodiment is an example of a projection display device using an integrated liquid crystal panel shown in FIG. FIG. 3 shows an outline of the present embodiment. In FIG. 3, reference numeral 500 denotes a housing of the apparatus, and an image enlarged and projected from the inside is displayed on a screen 510 disposed in the housing 500.
[0042]
Here, a configuration in which an image is viewed from the side opposite to the surface projected on the screen (generally referred to as a rear projector) is shown. ), The basic configuration is the same except that the image is inverted. However, in the case of the projection type projector, the difference is that the case and the screen are not integrated.
[0043]
Further, an appropriate control circuit 511 is incorporated in the housing 500, for example, for controlling image display and selecting between a two-dimensional image and a three-dimensional image.
[0044]
In FIG. 3, light from a light source 501 that emits white light is first reflected by a half mirror 502, and is split by dichroic mirrors 504, 505, and 506 into light having a wavelength region corresponding to GBR.
[0045]
The light reflected by the mirror 503 is also separated into respective wavelength regions of B (blue), G (green), and R (red) by a dichroic mirror (not shown). That is, two sets of RGB light beams (a total of six rays) are generated by two sets of RGB dichroic mirrors.
[0046]
These rays are incident on the liquid crystal panel 507 which is integrated shows the schematic in FIG. The two sets of RGB images formed by optical modulation by the integrated liquid crystal panel 507 are projected from the optical system 508 to a screen (projection surface) 510 via a mirror 509, where they are combined as a color image. Is done.
[0047]
The optical system 508 incorporates a lens system for enlarged projection and a polarizing means (usually a polarizing plate is used) used for performing stereoscopic display (three-dimensional display). This polarization imparting means merely functions as a simple dimming means in the case of ordinary two-dimensional display. Therefore, there is no particular problem other than lowering the display luminance. However, if it is desired to increase the luminance during two-dimensional display, the polarization imparting means may be mechanically removed from the optical path.
[0048]
When a display device as described in this embodiment is used, a bright image can be displayed with high resolution.
[0049]
【The invention's effect】
By adopting the method disclosed in this specification, a configuration in which the vertical resolution is increased can be obtained.
[Brief description of the drawings]
FIG. 1 is a chart showing display timing.
FIG. 2 is a schematic view showing a configuration of an integrated liquid crystal panel.
FIG. 3 is a diagram schematically illustrating a projection display device.
FIG. 4 is a schematic diagram showing a pixel arrangement in a matrix region.
[Explanation of symbols]
201, 202, 203 Active matrix area 204, 205, 206 Active matrix area 207, 208 Horizontal scanning control circuit 209, 210, 211 Vertical scanning control circuit 104, 108, 102 Flip-flop circuit 501 Light source 502 Half mirror 503 Mirror 504, 505 , 506 Dichroic mirror 507 Integrated liquid crystal panel 508 Optical system 509 Mirror 510 Screen 511 Control circuit

Claims (2)

A liquid crystal panel on which two sets of RGB light generated by the two sets of RGB dichroic mirrors are incident;
The liquid crystal panel has six active matrix areas, two horizontal scanning control circuits, and three vertical scanning control circuits integrated on the same substrate,
Three of the six active matrix areas form a first image of RGB.
The other three active matrix areas of the six active matrix areas form a second image of RGB.
The three vertical scanning control circuits are provided between the three active matrix areas and the other three active matrix areas;
The projection type display device, wherein the first image and the second image are combined and projected as a color image from an optical system via a mirror on a screen. A liquid crystal panel on which two sets of RGB light generated by the two sets of RGB dichroic mirrors are incident;
The liquid crystal panel has six active matrix areas, two horizontal scanning control circuits, and three vertical scanning control circuits integrated on the same substrate,
Three of the six active matrix areas form a first image of RGB.
The other three active matrix areas of the six active matrix areas form a second image of RGB.
One of the two horizontal scanning control circuits controls horizontal scanning of the three active matrix areas,
The other of the two horizontal scanning control circuits controls horizontal scanning of the other three active matrix areas,
The three vertical scanning control circuits are provided between the three active matrix areas and the other three active matrix areas, and each of the three vertical scanning control circuits is one of the three active matrix areas. And one of the other three active matrix areas is controlled in common.
The projection type display device, wherein the first image and the second image are combined and projected as a color image from an optical system via a mirror on a screen.

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