JPH0897347A - Lead member, semiconductor device, its manufacture and semiconductor module - Google Patents

Abstract

PURPOSE: To downsize a semiconductor device by downsizing the lead member which includes film carrier tape. CONSTITUTION: A lead member is provided with a plurality of inner leads 12a for electrical connection with electrodes, according to the positions of a plurality of electrodes of a semiconductor chip, and a plurality of outer leads 12c which continuously extend from each inner lead 12a. Middle leads 12b are provided between the inner leads and the outer leads on middle lead resin tape 11a so as to direct a plurality of outer leads 12c extended from a plurality of inner leads 12a to one side of the semiconductor chip.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a lead member such as a film carrier tape, a semiconductor device, a method for manufacturing the semiconductor device, and a semiconductor module using the semiconductor device.

In recent years, TCP (Tape Carrier Packag) has been used as a package for high-density mounting in semiconductor modules.
e), TSOP (Thin Small outline Package), VS
Semiconductor devices such as OP (Very Small Outline Package) are supplied.

Further, miniaturization of these and further densification are desired, and a lead member capable of realizing this is required.

If the semiconductor device is mounted on the printed wiring board in a planar shape, a high mounting density cannot be obtained. Therefore, the semiconductor devices are arranged upright on the printed wiring board so as to use the space in the vertical direction of the printed wiring board. Alternatively, a method of stacking semiconductor devices mounted on a plane is being studied.

[0005]

2. Description of the Related Art Conventionally, a vertical surface mount package (VSMP) type semiconductor device has been known as a device for increasing the density of semiconductor devices in a semiconductor module.

FIG. 12A is a sectional view showing the configuration of a conventional VSMP type semiconductor device and a semiconductor module equipped with this semiconductor device.

The semiconductor device 100 shown in FIG. 12A is a TSO.
A thin package such as P is changed to a vertical surface mount type, and 101 is a package made of mold resin, and a semiconductor chip (not shown) is mounted inside on a lead frame 102.

The lead frame 102 has a predetermined number of internal leads 103 and external leads 10 so as to be concentrated on one side.
4 are formed, and the internal lead 103 and the pad of the semiconductor chip are wire-bonded to a wire (not shown).

The predetermined number of external leads 104 are formed by bending the two ends at the left and right in an L shape, and the one located between them is bent at the left or the right in an L shape.

In this semiconductor device 100, the external leads 104 are erected on the surface of the printed wiring board 105 and soldered to the wiring pattern 106, and the semiconductor module 1
07.

The semiconductor module 107 is mounted on the base substrate 200 by connecting the wiring pattern 106 to the bonding pads 201 of the base substrate 200.

FIG. 12B is a sectional view showing the structure of a conventional TCP type semiconductor device and a semiconductor module equipped with this semiconductor device.

In the semiconductor device 110 of FIG. 12B, 111 is potting resin, and TAB (Tape Automated Bonding) connected to the base film 116.
Internal lead 114 of lead 113 and semiconductor chip 112
The inner bonding portion with the electrode is covered.

The outer lead 115 of the TAB lead 113 is bent into an L shape.

In the semiconductor device 110, its external leads 115 are horizontally stacked in multiple stages on the surface of the printed wiring board 117 and are externally bonded to the wiring pattern 118 to form a semiconductor module 119.

The semiconductor module 119 is mounted on the base substrate 200 by connecting its wiring pattern 118 to the bonding pads 201 of the base substrate 200.

[0017]

However, since the semiconductor device 100 is a vertical surface mount, the external leads 104 are not mounted.
Are bent at both ends in an L shape to the left and right, and the one located between them is bent in an L shape to the right or left, and the range W1 of the external lead 14 from the thickness W11 of the semiconductor device 100.
2 is longer, and the internal lead 103 of the lead frame 102 is wire-bonded to the pad of the semiconductor chip with a package made of a mold resin.

Therefore, the size of the device has been increased, and the density of the semiconductor module 107 cannot be further increased.

Further, since the semiconductor device 110 is a horizontal type and is stacked in multiple stages, the length and bending shape of the external leads 115 are made different in the stacking order.

Since the lengths are different, in the semiconductor device 110, a die for molding the TAB lead 113 is required for each stacking order, and since the bending shape is different, the semiconductor device 110 is different.
Adjustment when stacking the
The production yield of No. 9 was lowered.

Therefore, the present invention has been made in view of the above-mentioned problems, and a semiconductor device and its manufacturing method which can further increase the density of a lead member and a semiconductor module which can downsize the semiconductor device, and this semiconductor It is an object of the present invention to provide a semiconductor module using the device.

[0022]

The above problems can be solved by the following constitutions of the invention.

According to a first aspect of the present invention, a plurality of inner leads corresponding to the positions of the plurality of electrodes on the semiconductor chip and electrically connected to the electrodes, and a plurality of outer leads continuously extending from the respective inner leads are provided. In the lead member having the above-mentioned, the intermediate lead intervening so as to direct the plurality of outer leads extending from the plurality of inner leads to one side surface of the semiconductor chip is provided on the electrically insulating layer. Is.

The invention according to claim 2 is a semiconductor device comprising the lead member according to claim 1, a semiconductor chip having a plurality of electrodes, and an adhesive layer provided on a side surface of the semiconductor chip. The lead member is provided on the surface of the semiconductor chip, the plurality of inner leads of the lead member are electrically connected to the plurality of electrodes of the semiconductor chip, the outer leads of the lead member are bent, and the adhesive layer of the semiconductor chip is provided. It is characterized by being fixed to.

The invention according to claim 3 is a semiconductor device comprising the lead member according to claim 1 and a semiconductor chip having a plurality of electrodes, wherein the lead member is provided on the surface of the semiconductor chip. A sealing portion that electrically connects the plurality of inner leads of the lead member to the plurality of electrodes of the semiconductor chip and seals the semiconductor chip and the lead member so as to extend the outer leads of the lead member to the outside. Is provided, the outer lead extending to the outside of the sealing portion is bent, and the outer lead is fixed to the adhesive layer provided on the side surface of the sealing portion.

The invention according to claim 4 is a semiconductor device comprising the lead member according to claim 1, a semiconductor chip having a plurality of electrodes, and an adhesive layer provided on a side surface of the semiconductor chip. The lead member is provided on the surface of the semiconductor chip, the plurality of inner leads of the lead member are electrically connected to the plurality of electrodes of the semiconductor chip, and the outer leads of the lead member are extended outward. A potting portion potted so as to cover the semiconductor chip and the lead member is provided, and outer leads extending to the outside of the potting portion are bent and fixed to an adhesive layer provided on the side surface of the semiconductor chip. It is characterized by.

According to a fifth aspect of the invention, a semiconductor chip having the lead member and the plurality of electrodes of the first aspect is prepared, an adhesive layer is provided on a side surface of the semiconductor chip, and the lead member is provided on the surface of the semiconductor chip. A plurality of inner leads of the lead member are electrically connected to a plurality of electrodes of the semiconductor chip, and the outer leads of the lead member are bent and fixed to an adhesive layer of the semiconductor chip. It is a method of manufacturing a device.

According to a sixth aspect of the present invention, a semiconductor chip having the lead member of the first aspect and a plurality of electrodes is prepared, and the lead member is provided on the surface of the semiconductor chip.
Sealing for electrically connecting the plurality of inner leads of the lead member to the plurality of electrodes of the semiconductor chip and sealing the semiconductor chip and the lead member so as to extend the outer leads of the lead member to the outside. Is provided, the outer lead extending to the outside of the sealing portion is bent, and is fixed to the adhesive layer provided on the side surface of the sealing portion.

According to a seventh aspect of the present invention, a semiconductor chip having the lead member of the first aspect and a plurality of electrodes is prepared, an adhesive layer is provided on a side surface of the semiconductor chip, and the lead member is provided on the surface of the semiconductor chip. To electrically connect the plurality of inner leads of the lead member to the plurality of electrodes of the semiconductor chip, and cover the semiconductor chip and the lead member so as to extend the outer leads of the lead member to the outside. A method of manufacturing a semiconductor device is characterized in that a potting portion is provided on the surface of the semiconductor chip, and outer leads extending outside the potting portion are bent and fixed to an adhesive layer provided on a side surface of the semiconductor chip.

The invention of claim 8 is a semiconductor module comprising a plurality of semiconductor devices according to any one of claims 2 to 4, and a printed wiring board having a wiring pattern composed of pads and external electrodes. It is characterized in that the plurality of semiconductor devices are provided on the printed wiring board, and outer leads of the semiconductor device are electrically connected to pads of the printed wiring board.

According to a ninth aspect of the present invention, there is provided a plurality of semiconductor devices according to any one of the second to fourth aspects, and a printed wiring board having a wiring pattern composed of pads and external electrodes on both sides. A semiconductor module, wherein the plurality of semiconductor devices are provided on both sides of the printed wiring board,
The outer leads of the semiconductor device are electrically connected to the pads of the printed wiring board.

[0032]

As described above, in the lead member according to the first aspect of the present invention, the intermediate lead is interposed on the electrically insulating layer so that the plurality of outer leads extending from the plurality of inner leads face one side surface of the semiconductor chip. Since it is configured to be provided,
It can be used in a semiconductor device in which electrodes of a semiconductor chip are laid out and concentrated on one side surface of the device.

Since the semiconductor device according to the second aspect of the present invention has the lead member, the plurality of electrodes of the semiconductor chip 1 can be concentrated on the side surface by the outer leads.

Since the outer lead is bent and fixed to the adhesive layer of the semiconductor chip, the length of the outer lead can be made the same as the width of the device, and the device width can be reduced so as to be close to the thickness of the semiconductor chip. can do.

Therefore, the semiconductor device can be miniaturized to a size as close as possible to the semiconductor chip, and when mounted upright on the mounting substrate, the mounting area is reduced and further high density is achieved.

Further, in the semiconductor device according to the invention of claim 3, since the semiconductor chip and the sealing portion for sealing the lead member are provided so as to extend the outer leads of the lead member to the outside, the semiconductor device of the semiconductor chip is provided. The surface and the inner leads can be protected, and the semiconductor module can be mounted as it is.

Further, in the semiconductor device according to the invention of claim 4, a potting portion potted to cover the semiconductor chip and the lead member is provided, and the outer lead is fixed to an adhesive layer provided on a side surface of the semiconductor chip. Therefore, the size of the device can be further reduced as compared with the semiconductor device according to the third aspect.

According to a fifth aspect of the present invention, there is provided a method for manufacturing a semiconductor device, wherein the lead member according to the first aspect and a semiconductor chip having a plurality of electrodes are prepared, an adhesive layer is provided on a side surface of the semiconductor chip, and the lead member is provided. Is provided on the surface of the semiconductor chip, the plurality of inner leads of the lead member are electrically connected to the plurality of electrodes of the semiconductor chip, and the outer leads of the lead member are bent and fixed to the adhesive layer of the semiconductor chip. The second semiconductor device can be manufactured.

Further, in the method for manufacturing a semiconductor device according to the invention of claim 6, a sealing portion for sealing the semiconductor chip and the lead member is provided so as to extend the outer lead of the lead member to the outside, and this sealing is performed. Since the outer lead extending to the outside of the portion is bent and fixed to the adhesive layer provided on the side surface of the sealing portion, the semiconductor device according to the third aspect can be manufactured.

Further, in the method of manufacturing a semiconductor device according to the invention of claim 7, an adhesive layer is provided on the side surface of the semiconductor chip, and the semiconductor chip and the lead member are covered so that the outer leads of the lead member are extended to the outside. The potting portion thus potted is provided, and the outer leads extending to the outside of the potting portion are bent and fixed to the adhesive layer provided on the side surface of the semiconductor chip, so that the semiconductor device according to claim 4 can be manufactured. it can.

According to an eighth aspect of the semiconductor module of the present invention, a plurality of semiconductor devices according to any one of the second to fourth aspects are provided on a printed wiring board, and outer leads of the semiconductor device are provided on pads of the printed wiring board. Since it is configured to be electrically connected, it is possible to improve the density when mounting the semiconductor device on the printed wiring board.

Further, it is possible to increase the capacity of the semiconductor module or to reduce the size and weight of the semiconductor module, which greatly contributes to the performance improvement.

A semiconductor module according to a ninth aspect of the present invention includes a printed wiring board having wiring patterns composed of pads and external electrodes on both sides, and a plurality of semiconductor devices are provided on both sides of the printed wiring board. Furthermore, the mounting density can be improved.

[0044]

1 is a perspective view of a film carrier tape which is a lead member according to a first embodiment of the present invention.

The film carrier tape 10 is for mounting a semiconductor chip having electrode pads on two sides.

The film carrier tape 10 includes a flexible resin tape 11 having electric insulation and cushioning properties, an adhesive layer (not shown), TAB leads 12 which are plated so as to concentrate in one direction. It is composed of a plated test pad 13, an inner lead hole 14, a weight reducing hole 15, an outer lead hole 16 and a sprocket hole 17.

The resin tape 11 is made of polyimide, glass epoxy, BT resin obtained by impregnating glass cloth with BT resin, polyester, Upilex (trade name), TX.
A material such as -1 (trade name) is used.

The resin tape 11 includes a conventional intermediate lead resin tape 11a formed in a device hole and TA.
It includes a buffer resin tape 11b for connecting the B lead 12 via an adhesive layer.

The resin tape 11 has a U-shaped inner lead hole 14, a weight reducing hole 15 for reducing the weight of the intermediate lead resin tape 11a, an outer lead hole 16, and a sprocket hole 17.

The adhesive layer is for adhering the TAB lead 12 to the resin tape 11, and an epoxy-based or phenol-based adhesive is used.

The TAB lead 12 is formed of an electrolytic copper foil or a rolled copper foil which becomes a conductive layer and has a thickness of 35 μm or 1
It was 8 μm. The copper material of the TAB lead 12 having a thickness of 18 μm is mixed with a metal such as Sn in order to increase the Young's modulus. Although not shown, the surface of the TAB lead 12 is plated with Sn, Au, solder or the like.

The TAB lead 12 is composed of an inner lead 12a, an intermediate lead 12b and an outer lead 12c which serves as an external electrode.

The inner leads 12a project from the resin tape 11 into the inner lead holes 14 in two directions.
As shown in FIG. 2, inner bonding is performed with the electrode pad 2 of the semiconductor chip 1.

The intermediate lead 12b is the inner lead 12a.
The inner lead 12a that extends from the
Resin tape for intermediate leads 1
It is disposed on the intermediate lead resin tape 11a via an adhesive layer so as to reduce the surface area of 1a.

The outer lead 12c is the intermediate lead 12b.
From the test pad 13 to the buffer resin tape 11
It straddles the inner lead hole 14 and the outer lead hole 16 via b.

Such a film carrier tape 10
Is the intermediate lead resin tape 11a and the intermediate lead 1
Since it has 2b, it can be used in a TAB semiconductor device in which electrodes for output / input existing on two or more sides of a semiconductor chip are concentrated on one side face while being drawn.

Even if the inner leads 12a of the film carrier tape 10 correspond to the electrode pads arranged on the four sides of the semiconductor chip, they are arranged in the central portion other than the four sides of the semiconductor chip. It may correspond to the electrode pad.

Next, a method of manufacturing the film carrier tape 10 will be described.

First, an adhesive is applied to the upper surface of the resin tape 11. The resin tape 11 on which this adhesive layer is formed is punched with a die. As a result, the inner lead hole 14, the weight reducing hole 15, and the outer lead hole 1
6. The sprocket hole 17 is formed in the resin tape 11.

After this, a copper foil is attached to the resin tape 11 via a layer of an adhesive by rotating a heat roller.

After that, the copper foil is subjected to resist coating, mask exposure, development and wet etching, and the TAB lead 1
2 and the test pad 13 are formed. TAB lead 1
2 and the test pad 13 are plated.

As a result, the film carrier tape 10 shown in FIG. 1 is completed.

Next, the film carrier tape 10 of FIG.
A first semiconductor device using the above will be described with reference to FIG. FIG. 3A is a perspective view of this semiconductor device, and FIG.
Shows the front view.

In this semiconductor device 20, the semiconductor chip body 51 having the electrode pads 2 arranged on two sides is mounted on the film carrier tape 10.

The film carrier tape 10 is shown in FIG.
It is cut at a place surrounded by a dashed line X. Semiconductor chip 1
Resin tape 1 for intermediate lead on the passivation film 3 of
1a is placed. The electrode pad 2 of the semiconductor chip 1 is electrically connected to the inner lead 12a of the TAB lead 12 by thermocompression bonding or ultrasonic bonding.

The outer lead 12c is the inner lead 1
It continuously extends from 2a and is bent so as to be parallel to the side surface 4. This bent outer lead 12c
Buffer resin tape 11 that is connected to the via an adhesive layer
Are connected to the side surface 4 of the semiconductor chip 1 by the adhesive layer 21.

For the adhesive layer 21, a thermosetting or ultraviolet curable adhesive is used.

The outer lead 12c is a printed wiring board of a semiconductor module, MCM (Multi Chip Module),
Other semiconductor chips and other mounting substrate electrodes and semiconductor device 2
Used for electrical connection with 0.

Since the semiconductor device 20 as described above uses the film carrier tape 10, the semiconductor chip 20 is not used.
One electrode pad 2 for output / input that exists on one side or more
Outer lead 12
The length of c becomes the same as the width W1 of the device, and the semiconductor chip 1
The width W1 is reduced so as to be close to the thickness of

Therefore, the device can be downsized to a size as close as possible to the semiconductor chip 1, and when mounted upright on the mounting substrate, the mounting area can be reduced and a higher density can be achieved.

Next, the film carrier tape 10 of FIG.
A second semiconductor device using the above will be described with reference to FIG. FIG. 4 is a front view showing the configuration of this semiconductor device.

The semiconductor device 25 has outer leads 12
C is bent in an arc shape and is connected to the side surface 4 of the semiconductor chip 1 by a silicone rubber 26 serving as a cushioning member instead of the cushioning resin tape 11b. Other configurations are the same as those of the semiconductor device 20.

Since the outer leads 12c of the semiconductor device 25 are bent in an arc shape, mechanical stress is relieved by the outer leads 12c of the semiconductor device 10, and when the semiconductor device 25 is mounted on a semiconductor module or the like, a gap is formed between the outer lead 12c and the pad of the semiconductor module or the like. Silicone rubber can be used to easily absorb solder.
Since 6 is used, the adhesive layer is unnecessary.

Next, the film carrier tape 10 of FIG.
A third semiconductor device using is described with reference to FIG. FIG. 5A shows a perspective view of this semiconductor device.
(B) shows the sectional drawing of the front.

This semiconductor device 30 corresponds to the semiconductor device 20.
Is provided with a mold sealing portion 31 such as an epoxy resin that covers the semiconductor chip 1 and the TAB lead 12 so as to expose the back surface 5 of the semiconductor chip 1, and is connected to the bent outer lead 12c through an adhesive layer. The buffer resin tape 11 to be molded is sealed with the adhesive layer 21 in the mold sealing portion 3
1 to the side surface 32.

Since the semiconductor device 30 seals the semiconductor device 20 with the mold sealing portion 31, the surface of the semiconductor chip 1 and the inner leads 12a can be protected, and the semiconductor device 20 is mounted in the semiconductor module as it is.

Since the length W2 of the bent outer lead 12c is made shorter than the width W2 of the device, the device can be downsized.

The semiconductor device 25 may be used instead of the semiconductor device 20.

Next, the film carrier tape 10 of FIG.
A fourth semiconductor device using is described with reference to FIG. FIG. 6 is a front sectional view of this semiconductor device.

This semiconductor device 40 corresponds to the semiconductor device 20.
A potting portion 41 made of liquid epoxy resin or the like for covering the semiconductor chip 1 is provided, and the buffer resin tape 11 connected to the bent outer lead 12c via an adhesive layer is bonded to the semiconductor chip 1 by the adhesive layer 21. Side 4
Connect to.

Since the semiconductor device 40 seals the semiconductor device 20 with the potting portion 41, the surface of the semiconductor chip 1 and the inner leads 12a can be protected, and the semiconductor device 20 is mounted in the semiconductor module as it is.

Further, since the adhesive layer 21 is connected to the side surface 4 of the semiconductor chip 1 without interposing another member, the device can be made smaller than the semiconductor device 30.

The semiconductor device 25 may be used instead of the semiconductor device 20.

Next, a method of manufacturing the semiconductor device 30 will be described with reference to FIG.
This will be described with reference to FIG.

First, as shown in FIG. 7A, the inner leads 12a of the film carrier tape 10 are inner-bonded to the semiconductor chip 1 by a bonding tool 81 such as single TAB bonding.

At this time, the film carrier tape 10 is not cut at the portion surrounded by the chain double-dashed line X.

Next, as shown in FIG. 7 (B), the back surface 5 of the semiconductor chip 1 is exposed by transfer molding, the outer leads 12c are extended, and the buffer resin tape 11b is exposed so that an epoxy resin or the like is used. The mold sealing part 31 is molded to protect the surface of the semiconductor chip 1 and the inner leads 12a.

Next, as shown in the sectional view of FIG.
A heat-curable or ultraviolet-curable adhesive is applied to the lower portion of the side surface 32 of the mold sealing portion 31 to form the adhesive layer 21.

Then, as shown in FIG. 7D, while bending the outer leads 12c extending outside the mold sealing portion 31 to be parallel to the side surfaces 32, the buffer resin tape 11b is attached to the adhesive layer 21. Then, the buffer resin tape 11b is connected and fixed to the cured adhesive layer 12 by pressing and heating or irradiating with ultraviolet rays.

The functional test of the semiconductor chip 1 is performed through the test pad 13 of the film carrier tape 10, and as shown in FIG.
The portion surrounded by the chain double-dashed line X of the film carrier tape 10 shown in is cut.

Next, as shown in FIG. 7E, in the outer lead 12c, the portion protruding from the lower surface of the mold sealing portion 31 is cut to complete the semiconductor device 30 as a single body.

Next, a method of manufacturing the semiconductor device 40 will be described.

In this manufacturing method, in the case shown in FIG. 7B, a potting portion 41 of liquid epoxy resin or the like is formed by potting to protect the surface of the semiconductor chip 1 and the inner leads 12a, and In the case shown in C), the manufacturing method of the semiconductor device 30 is the same as the manufacturing method of the semiconductor device 30, except that the adhesive layer 21 is formed by applying a thermosetting or ultraviolet curing adhesive to the lower portion of the side surface 4 of the semiconductor chip 1.

Next, the first semiconductor module will be described with reference to FIG.

This semiconductor module 50 has a base substrate 2
The external electrodes 53 of the semiconductor module 50 are electrically connected to the bonding pads 201 of No. 00, and a plurality of semiconductor devices 30 (or semiconductor devices 40) are erected in a grid pattern on the printed wiring board 51 having the wiring pattern 52. To implement.

The wiring pattern 52 has an external electrode 53 formed in an L shape on the outside in four directions from the upper surface, and a pad 54 electrically connected to the external electrode 53 and arranged on the upper surface. The outer lead 12c of the semiconductor device 30 (40) is electrically connected to 54 by soldering or the like.

Since such a semiconductor module 50 mounts the small-sized semiconductor device 30 (40), the density when mounting the semiconductor device 30 (40) on the upper surface of the printed wiring board 51 can be improved.

Further, it is possible to increase the capacity of the semiconductor module 50 or to reduce the size and weight of the semiconductor module 50, which greatly contributes to the performance improvement.

The semiconductor module 50 may be mounted on the lower surface of the base substrate 200.

Next, the second semiconductor module will be described with reference to FIG.

This semiconductor module 60 has a large number of semiconductor devices 30 (or semiconductor devices 40) on the left and right surfaces of a printed wiring board 61 having wiring patterns 62 and 63 on the left and right surfaces.
Are installed upright in a grid pattern.

The wiring pattern 62 is inverted L from the left side to the outside.
An external electrode 64 formed in a V shape, and a pad 66 electrically connected to the external electrode 64 and arranged on the left side,
The outer leads 12c of the semiconductor device 30 (40) are electrically connected to the pads 66 by soldering or the like.

The wiring pattern 63 has an external electrode 65 formed in an L-shape from the right surface to the outside and a pad 67 electrically connected to the external electrode 65 and arranged on the right surface. Outer lead 1 of semiconductor device 30 (40)
2c is electrically connected by soldering or the like.

In such a semiconductor module 60, since the semiconductor devices 30 (40) are mounted on both sides in a lattice pattern, the mounting density can be further improved.

Further, the external electrodes 64 and 65 of a large number of semiconductor modules 60 can be electrically connected to the bonding pads 201 of the base substrate 200 and mounted in a grid pattern.

As shown in FIG. 10, the base substrate 21 having the bonding pads 211 and 212 on the upper and lower surfaces thereof.
The semiconductor modules 60 may be mounted on the upper and lower surfaces of 0 in a grid pattern.

Next, the third semiconductor module will be described with reference to FIG.

In this semiconductor module 70, a plurality of semiconductor devices 30 (or semiconductor devices 40) are stacked and mounted on a printed wiring board 71 having a wiring pattern 72.

The wiring pattern 72 has an external electrode 73 formed in an L shape on the outside in four directions from the upper surface, and a pad 74 electrically connected to the external electrode 73 and arranged on the upper surface. The outer leads 12c of the semiconductor device 30 (40) are electrically connected to 74 by soldering or the like.

The anisotropic conductive film 75 is used to electrically connect the outer leads 12c of each semiconductor device 30 (40).

Since such a semiconductor module 70 is provided with the outer lead 12c having a constant shape and length,
The mold for forming the outer leads 12c is the same for each stacking order, facilitating the adjustment when stacking the semiconductor devices 30 (40) and improving the manufacturing yield of the semiconductor module 70.

Further, the external electrode 73 of the semiconductor module 70 can be electrically connected to the bonding pad 201 of the base substrate 200 of FIG.

[0113]

As described above, according to the invention of claim 1,
Since the outer leads extending from the inner leads are arranged on the electrically insulating layer so that the outer leads extend toward one side of the semiconductor chip, the electrodes of the semiconductor chip are concentrated on one side of the device. It can be used for semiconductor devices.

According to the second aspect of the invention, since the lead member is provided, the plurality of electrodes of the semiconductor chip 1 can be concentrated on the side surface by the outer leads.

Since the outer leads are bent and fixed to the adhesive layer of the semiconductor chip, the length of the outer leads can be made equal to the width of the device, and the device width can be reduced so as to be close to the thickness of the semiconductor chip. can do.

Therefore, the semiconductor device can be miniaturized to a size as close as possible to the semiconductor chip, and when mounted upright on the mounting substrate, the mounting area is reduced and further high density is achieved.

Further, according to the invention of claim 3, since the sealing portion for sealing the semiconductor chip and the lead member is provided so as to extend the outer lead of the lead member to the outside, the surface of the semiconductor chip and The inner lead can be protected and can be mounted on the semiconductor module as it is.

Further, according to the invention of claim 4, since the potting portion potted so as to cover the semiconductor chip and the lead member is provided and the outer lead is fixed to the adhesive layer provided on the side surface of the semiconductor chip,
The size of the device can be further reduced as compared with the semiconductor device according to the third aspect.

According to the invention of claim 5, claim 1
A semiconductor chip having a lead member and a plurality of electrodes is prepared, an adhesive layer is provided on the side surface of the semiconductor chip, a lead member is provided on the surface of the semiconductor chip, and a plurality of inner leads of the lead member are provided on a plurality of electrodes of the semiconductor chip. Since the outer lead of the lead member is bent and fixed to the adhesive layer of the semiconductor chip, the semiconductor device according to the second aspect can be manufactured.

Further, according to the invention of claim 6, a sealing portion for sealing the semiconductor chip and the lead member is provided so as to extend the outer lead of the lead member to the outside, and the sealing portion extends to the outside of this sealing portion. Since the outer leads that are projected are bent and fixed to the adhesive layer provided on the side surface of the sealing portion, the semiconductor device according to the third aspect can be manufactured.

According to the invention of claim 7, an adhesive layer is provided on the side surface of the semiconductor chip, and the potting is potted so as to cover the semiconductor chip and the lead member so that the outer leads of the lead member are extended to the outside. The semiconductor device according to claim 4 can be manufactured by providing a portion and bending the outer lead extending to the outside of the potting portion and fixing the outer lead to the adhesive layer provided on the side surface of the semiconductor chip.

According to the invention of claim 8, claim 2
The semiconductor device is mounted on the printed wiring board, because the plurality of semiconductor devices described in any one of 4 to 4 are provided on the printed wiring board and the outer leads of the semiconductor device are electrically connected to the pads of the printed wiring board. The density at that time can be improved.

Further, it is possible to increase the capacity of the semiconductor module or to reduce the size and weight of the semiconductor module, which greatly contributes to the performance improvement.

According to the invention of claim 9, a printed wiring board having a wiring pattern composed of pads and external electrodes on both sides is provided, and a plurality of semiconductor devices are provided on both sides of the printed wiring board. The mounting density can be improved.

[Brief description of drawings]

FIG. 1 is a diagram showing a configuration of a film carrier tape according to an embodiment of the present invention.

FIG. 2 is a perspective view showing a state in which a semiconductor chip is connected to the film carrier tape of FIG.

FIG. 3 is a first example of using the film carrier tape of FIG.
It is a figure which shows the structure of this semiconductor device.

FIG. 4 is a second view using the film carrier tape of FIG.
It is a figure which shows the structure of this semiconductor device.

FIG. 5 is a third view of using the film carrier tape of FIG.
It is a figure which shows the structure of this semiconductor device.

FIG. 6 is a fourth view using the film carrier tape of FIG.
It is a figure which shows the structure of this semiconductor device.

FIG. 7 is a diagram for explaining the manufacturing method for the semiconductor device in FIG.

FIG. 8 is a front view showing a configuration of a first semiconductor module and a mounting structure on a base substrate.

FIG. 9 is a front view showing a configuration of a second semiconductor module and a mounting structure on a base substrate.

FIG. 10 is a front view showing a mounting structure on a base substrate.

FIG. 11 is a front view showing the configuration of a third semiconductor module.

FIG. 12 is a cross-sectional view showing a configuration of a conventional semiconductor device and a semiconductor module.

[Explanation of symbols]

 1 Semiconductor Chip 2 Electrode Pad 3 Passivation Film 4 Side 10 Film Carrier 11 Resin Tape 11a Resin Tape for Intermediate Lead 11b Buffer Resin Tape 12 TAB Lead 12a Inner Lead 12b Intermediate Lead 12c Outer Lead 13 Test Pad 14 Inner Lead Hole 15 Weight Reduction Hole 16 Outer lead hole 18 Adhesive layer 20 Semiconductor device 21 Adhesive layer 25 Semiconductor device 26 Silicone rubber 30 Semiconductor device 31 Mold sealing part 32 Side surface 40 Semiconductor device 41 Potting part 50 Semiconductor module 51 Printed wiring board 52 Wiring pattern 53 External Electrode 54 Pad 60 Semiconductor Module 61 Printed Wiring Board 62 Wiring Pattern 63 Wiring Pattern 64 External Electrode 65 External Electrode 66 Pad 67 Head 70 semiconductor module 71 printed wiring board 72 wiring pattern 73 external electrode 74 pad 81 bonding tool 200 base substrate 201 bonding pad 210 base substrate 211 bonding pads

 ─────────────────────────────────────────────────── ─── Continuation of front page (72) Masataka Mizukoshi 1015 Kamiodanaka, Nakahara-ku, Kawasaki-shi, Kanagawa, Fujitsu Limited Fujitsu Limited

Claims (9)

[Claims] 1. A lead member corresponding to the positions of a plurality of electrodes on a semiconductor chip and provided with a plurality of inner leads for electrical connection with the electrodes and a plurality of outer leads continuously extending from each inner lead. 3. The lead member according to claim 1, wherein the plurality of outer leads extending from the plurality of inner leads are provided on the electrically insulating layer so as to interpose the plurality of outer leads toward one side surface of the semiconductor chip. 2. A semiconductor device comprising the lead member according to claim 1, a semiconductor chip having a plurality of electrodes, and an adhesive layer provided on a side surface of the semiconductor chip, wherein the lead member is the semiconductor chip. The inner lead of the lead member is electrically connected to the plurality of electrodes of the semiconductor chip, and the outer lead of the lead member is bent and fixed to the adhesive layer of the semiconductor chip. A semiconductor device characterized by: 3. A semiconductor device comprising the lead member according to claim 1 and a semiconductor chip having a plurality of electrodes, wherein the lead member is provided on a surface of the semiconductor chip, and a plurality of inner leads of the lead member are provided. Is electrically connected to a plurality of electrodes of the semiconductor chip, and a sealing portion for sealing the semiconductor chip and the lead member is provided so as to extend the outer lead of the lead member to the outside. A semiconductor device having a structure in which an outer lead extending to the outside of the is bent and fixed to an adhesive layer provided on a side surface of the sealing portion. 4. A semiconductor device having the lead member according to claim 1, a semiconductor chip having a plurality of electrodes, and an adhesive layer provided on a side surface of the semiconductor chip, wherein the lead member is the semiconductor chip. Is provided on the surface of the semiconductor chip, the plurality of inner leads of the lead member are electrically connected to the plurality of electrodes of the semiconductor chip, and the semiconductor chip and the lead member are formed so as to extend the outer leads of the lead member to the outside. A semiconductor device, comprising: a potting portion that is potted so as to cover it, and an outer lead extending outside the potting portion is bent and fixed to an adhesive layer provided on a side surface of the semiconductor chip. 5. A semiconductor chip having a lead member according to claim 1 and a plurality of electrodes is prepared, an adhesive layer is provided on a side surface of the semiconductor chip, and the lead member is provided on a surface of the semiconductor chip. A method of manufacturing a semiconductor device, comprising electrically connecting a plurality of inner leads to a plurality of electrodes of the semiconductor chip, bending the outer leads of the lead member, and fixing the outer leads to an adhesive layer of the semiconductor chip. 6. A semiconductor chip having a lead member according to claim 1 and a plurality of electrodes is prepared, the lead member is provided on a surface of the semiconductor chip, and a plurality of inner leads of the lead member are provided on a plurality of the semiconductor chips of the semiconductor chip. An outer portion electrically connected to the electrode and provided with a sealing portion that seals the semiconductor chip and the lead member so as to extend the outer lead of the lead member to the outside, and extends to the outside of the sealing portion A method of manufacturing a semiconductor device, comprising bending a lead and fixing the lead to an adhesive layer provided on a side surface of the sealing portion. 7. A semiconductor chip having a lead member according to claim 1 and a plurality of electrodes is prepared, an adhesive layer is provided on a side surface of the semiconductor chip, and the lead member is provided on a surface of the semiconductor chip. The inner lead of the semiconductor chip is electrically connected to the plurality of electrodes of the semiconductor chip, and the potting portion is provided so as to cover the semiconductor chip and the lead member so as to extend the outer lead of the lead member to the outside. A method of manufacturing a semiconductor device, comprising bending an outer lead extending outside the potting portion and fixing the outer lead to an adhesive layer provided on a side surface of the semiconductor chip. 8. A semiconductor module comprising: a plurality of semiconductor devices according to claim 2; and a printed wiring board having a wiring pattern composed of pads and external electrodes. A semiconductor module, wherein a semiconductor device is provided on the printed wiring board, and outer leads of the semiconductor device are electrically connected to pads of the printed wiring board. 9. A semiconductor module comprising: a plurality of semiconductor devices according to claim 2; and a printed wiring board having a wiring pattern composed of pads and external electrodes on both sides. A semiconductor module, wherein a plurality of semiconductor devices are provided on both sides of the printed wiring board, and outer leads of the semiconductor device are electrically connected to pads of the printed wiring board.