JP3892259B2 - Manufacturing method of semiconductor device - Google Patents

Manufacturing method of semiconductor device Download PDF

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Publication number
JP3892259B2
JP3892259B2 JP2001279062A JP2001279062A JP3892259B2 JP 3892259 B2 JP3892259 B2 JP 3892259B2 JP 2001279062 A JP2001279062 A JP 2001279062A JP 2001279062 A JP2001279062 A JP 2001279062A JP 3892259 B2 JP3892259 B2 JP 3892259B2
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substrate
rigid
rigid substrate
flexible
collective
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JP2003086761A (en
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伊和男 田原
祐司 根岸
伸治 脇坂
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Casio Computer Co Ltd
Oki Electric Industry Co Ltd
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Casio Computer Co Ltd
Oki Electric Industry Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32135—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/32145—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73253—Bump and layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01005—Boron [B]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01029—Copper [Cu]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01033—Arsenic [As]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01067—Holmium [Ho]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)

Description

【０００１】
【発明の属する技術分野】
本発明は、複数の半導体チップを高密度実装する半導体装置およびその製造方法に関する。
【０００２】
【従来の技術】
近年、中間基板を用いて複数の半導体チップを高密度実装するマルチチップモジュールが知られている。この種の技術として、例えば特開２０００−３０７０３７号公報には、図１０（イ）〜（ハ）に図示するように、可撓性を有するフレキシブル基板１００上に、バンプ１０１を介して２つの半導体チップ１０２，１０２をフリップチップ実装し、その後にフレキシブル基板１００を屈曲させて両チップ１０２，１０２の背面同士を当接させた状態で接着固定して積層し、屈曲させたフレキシブル基板１００の接続パッド１０３に形成されるハンダボール１０４を介して配線基板に接続するようにしたマルチチップモジュールが開示されている。
【０００３】
【発明が解決しようとする課題】
ところで、こうしたマルチチップモジュール構造の半導体装置では、可撓性のフレキシブル基板１００を使用しているので、当該基板１００に撓みや捩れが生じ易い。この為、汎用のチップマウンタや基板搬送システムに適用し難い弊害や、とりわけ半導体チップ１０２をフェイスダウンで実装する際に位置ずれが起こり易くなる結果、製造歩留りの低下を招致するという問題がある。
【０００４】
また、上述のモジュール構造では、フレキシブル基板１００の屈曲により積層される半導体チップ１０２の裏面同士が接着固定されるだけであって、さらにチップ周辺は露出状態にあるから耐湿性に欠け、信頼性低下を招致するという問題もある。
【０００５】
そこで本発明は、このような事情に鑑みてなされたもので、汎用のチップマウンタや基板搬送システムに適用できる上、製造歩留りの低下や信頼性を損うこと無く高密度実装することができる半導体装置およびその製造方法を提供することを目的としている。
【０００６】
【課題を解決するための手段】
【００１４】
請求項１に記載の発明では、屈曲自在なフレキシブル基板と、このフレキシブル基板の１つの第１の領域の両面を挟み込む２枚のリジッド基板を備える第1のリジッド基板部と、前記フレキシブル基板の少なくとも１つの第２の領域の、少なくとも一方の面上に配設されるリジッド基板を備える第２のリジッド基板部とから構成されるリジッドフレックス基板を複数連結したシート状の集合基板を用い、前記集合基板の前記各リジッドフレックス基板における、前記第１のリジッド基板部の、前記第２のリジッド基板部における前記リジッド基板と同じ側の一方のリジッド基板上に、少なくとも１つの第１の半導体チップを実装するとともに、前記第２のリジッド基板部の前記リジッド基板に、少なくとも１つの第２の半導体チップを実装する半導体チップ実装工程と、前記集合基板の前記各リジッドフレックス基板における、前記第１のリジッド基板部の、他方のリジッド基板上に外部接続端子を形成する外部接続端子形成工程と、前記半導体チップ実装工程および前記外部接続端子形成工程後、前記集合基板上の前記各リジッドフレックス基板において、前記第１のリジッド基板部を集合基板に連結させたまま、前記第２のリジッド基板部の前記リジッド基板を当該集合基板から裁断して分離する分離工程と、前記各リジッドフレックス基板の前記第１のリジッド基板部と前記第２のリジッド基板部間の前記フレキシブル基板を可撓部として、前記第２のリジッド基板部が前記集合基板から分離された状態の前記各リジッドフレックス基板を、前記可撓部でそれぞれ屈曲させて前記各リジッド基板に実装される前記各半導体チップを積層し、その状態で上下に対向する半導体チップ同士を接着固定してなるモジュールを一括して樹脂モールドした後、前記第１のリジッド基板部の前記各リジット基板を集合基板から裁断してモジュール単位に個片化するモジュール形成工程と、を具備することを特徴とする。
【００１５】
上記請求項１に従属する請求項２に記載の発明では、前記各リジッド基板にそれぞれ実装される各半導体チップは、突起電極を介して接続されるウェハレベルＣＳＰ構造を有することを特徴とする。
【００１６】
上記請求項１に従属する請求項３に記載の発明によれば、前記モジュール形成工程では、上下に対向する半導体チップ同士が接着固定された複数のモジュールを個々に覆う金型を用い、これにより全モジュールを一括して樹脂モールドすることを特徴とする。
【００１７】
本発明による半導体装置では、リジッドフレックス基板をフレキシブル基板からなる可撓部で屈曲させて各リジッド基板にそれぞれ実装される各半導体チップを積層させて樹脂封止する。これにより、積層された各半導体チップが固定保持されつつ気密封止される為、耐湿性に優れた信頼性の高い半導体装置を実現でき、しかもリジッドフレックス基板を用いたことで、基板の撓みや捩れがなくなる為、半導体チップ実装時の位置ずれを防ぐことができる結果、製造歩留りの低下を回避し得る。
【００１８】
また、本発明による半導体装置の製造方法では、リジッドフレックス基板を複数連結したシート状の集合基板を使用しているので、撓みや捩れが発生せず、これ故、汎用のチップマウンタや基板搬送システムに適用でき、しかも実装時の位置ずれも回避し得る結果、製造歩留りの低下を防ぐ。
さらに、集合基板には複数のリジッドフレックス基板が配設される為、それら複数のリジッドフレックス基板に一括して半導体チップ実装、端子形成および樹脂封止するバッチ処理が実現し得、特別な実装プロセスを用いずとも効率良くモジュール構造の半導体装置を製造することができ、製品コスト低減に寄与し得るようになっている。
【００１９】
【発明の実施の形態】
以下、図面を参照して本発明の実施の形態について説明する。
（１）第１実施例
▲１▼半導体装置１０の構造
図１（イ）は第１実施例による半導体装置１０の構造を示す断面図である。この図において、１はフレキシブル基板１ａとリジッド基板１ｂとから形成されるリジッドフレックス基板である。リジッドフレックス基板１は、同図（ロ）に図示するように、フレキシブル基板１ａと複数のリジッド基板１ｂを備え、フレキシブル基板１ａの上下両面をリジッド基板１ｂで挟んだ所謂サンドイッチ構造を成した部分と、フレキシブル基板１ａが露出された部分（可撓部）１ｃを有する複合基板である。
【００２０】
すなわち、リジッドフレックス基板１は、フレキシブル基板１ａが露出する可撓部１ｃで屈曲自在となり、また可撓部１ｃを境にして、両側にリジッド基板１ｂが上下両面に配設され、４面のリジッド基板１ｂを具備する。そして、可撓部１ｃを境にした一方側の、リジッド基板１ｂが上下両面に配設される部分（第１のリジッド基板部１１）の一方のリジッド基板１ｂには、例えばウェハレベルＣＳＰ構造の半導体チップ２がフェイスダウンによりフリップチップ実装され、他方のリジッド基板１ｂには格子状にハンダボール３ａを配設して外部接続端子３が形成される。また、可撓部１ｃを境にした他方側の、リジッド基板１ｂが上下両面に配設される部分（第２のリジッド基板部１２）の各リジッド基板１ｂには、同様に、例えばウェハレベルＣＳＰ構造の半導体チップ２がフリップチップ実装される。
【００２１】
また、後述するように、第１のリジッド基板部１１の、一方の半導体チップ２がフリップチップ実装される側のリジッド基板１ｂ、及び第２のリジッド基板部１２の各リジッド基板１ｂには、半導体チップ実装用の接続端子パッド、配線パターン及びフレキシブル基板１ａに形成される配線パターンに接続されるスルーホール等が形成され、第１のリジッド基板部１１の、他方の外部接続端子３が形成されるリジッド基板１ｂには、外部接続端子形成用の端子パッド及び配線パターン及びスルーホール等が形成される。
【００２２】
一方、フレキシブル基板１ａには、リジッド基板１ｂに接続される配線パターンやスルーホール（あるいはビアホール）等が形成され、これらにより各リジッド基板１ｂの端子パッドおよび接続端子パッドがフレキシブル基板１ａの配線パターンを介して相互に電気的に接続されるように構成されている。
【００２３】
なお、ここで半導体チップ２をウェハレベルＣＳＰ構造によるものとしたが、このウェハレベルＣＳＰ構造は、ウェハ状態で半導体チップ上に絶縁層を形成した後、再配線層を形成し、次いで突起電極（ポスト端子）による接続用電極端子を形成した後、チップ毎に個片化して形成したものであり、半導体チップとほぼ同じ大きさで、且つ突起電極（ポスト端子）による接続用電極端子の配置を比較的自由に設定可能としたものである。
従って、半導体チップ２をウェハレベルＣＳＰ構造とした場合、後述する図２に示すように、リジッド基板１ｂに形成される半導体チップ実装用の接続端子パッドをマトリクス状に配置することができ、リジッド基板１ｂの大きさを小さくすることができる。ただし、本発明における各実施形態において、半導体チップ２の構成はこのウェハレベルＣＳＰ構造に限定されるものではなく、突起電極が形成された種々の構造による半導体チップを用いることができる。
【００２４】
こうしてチップ実装および端子形成されたリジッドフレックス基板１は、可撓部１ｃで屈曲されることによって、各半導体チップ２を積層状態にする。この状態で上下に対向する半導体チップ２同士を接着固定してから、リジッド基板１ｂとの接合部を覆うようにリジッド基板１ｂに実装される各半導体チップ２を封止樹脂５にて気密封止する構造を有する。
【００２５】
このようなモジュール構造にすると、積層状態の各半導体チップ２を固定保持しつつ気密封止し得る為、耐湿性に優れた信頼性の高い半導体装置１０を実現できる。しかも、リジッドフレックス基板１を用いたことで、基板の撓みや捩れが大きく低減され、殆どなくなる為、チップ実装時の位置ずれを防ぐことができる結果、製造歩留りを向上させることができる。
また、リジッドフレックス基板１を用いると、半導体チップ２をフリップチップ実装する面が３面となり、フレキシブル基板１００を用いた従来例（図１０参照）に比べ、より高密度実装し得るようになる。
【００２６】
なお、上記構成では、リジッドフレックス基板１における第２のリジッド基板部もリジッド基板１ｂが上下両面に配設される構成としたが、これに限るものではなく、少なくとも第１のリジッド基板部において半導体チップ２がフリップチップ実装される側のリジッド基板１ｂと同じ側にのみリジッド基板１ｂを配設する構成とし、そこに半導体チップ２をフリップチップ実装するようにしてもよい。
【００２７】
▲２▼半導体装置１０の製造方法
次に、図２〜図５を参照して上記構造による半導体装置１０の製造方法について説明する。第１実施例による製造方法では、複数のリジッドフレックス基板１が連設して形成されたシート状の集合基板２０を用いる。図２（イ）（ロ）に集合基板２０の構成の一例を示す。この図に示す集合基板２０は、フレキシブル基板からなるシート状基材２１に４行３列のリジッドフレックス基板１を一体的に連設して形成したものであり、図２（イ）は集合基板２０の平面形状を示し、図２（ロ）は集合基板２０の、リジッドフレックス基板１が形成された部分を含む、Ａ−Ａ面での断面形状の要部を示す。
【００２８】
図に示す如く、複数のリジッドフレックス基板１が形成される箇所においては、基材２１をフレキシブル基板１ａとして用い、これをリジッド基板１ｂで上下に挟んで、上下のリジット基板１ｂとフレキシブル基板１ａとが一体化されるとともに、２つのリジット基板１ｂ配設領域間のフレキシブル基板１ａを可撓部１ｃとする、前記図１におけるリジッドフレックス基板１と同様の構成が複数連結して形成される。各連結部分には、予め開口部（以下、ミシン目）２２が、各リジッドフレックス基板１形成箇所の周囲に設けられている。これにより、後述するように、このミシン目２２に沿って連結部分を裁断することで、容易に各リジッドフレックス基板１を個片化し得るようになっている。
【００２９】
図２（ロ）に示す各リジッドフレックス基板１において、図面上、右側のリジット基板１ｂとフレキシブル基板１ａが一体化された部分を第１のリジッド基板部１１、左側のリジット基板１ｂとフレキシブル基板１ａが一体化された部分を第２のリジッド基板部１２とした場合、ウェハレベルＣＳＰ構造による半導体チップが実装される、第１のリジッド基板部１１の一方のリジッド基板１ｂ、及び第２のリジッド基板部１２の各リジッド基板１ｂには、例えば図２（イ）に示すようなマトリクス状の接続端子パッド１ｄや配線パターン、及び図２（ロ）に示すようなスルーホール１ｅが形成され、また、外部接続端子３が形成される、第１のリジッド基板部１１の他方のリジッド基板１ｂには、外部接続端子形成用の端子パッド１ｆや配線パターン及びスルーホール１ｅが形成される。
【００３０】
また、フレキシブル基板１ａには配線パターン１ｇが形成される。これらにより各リジッド基板１ｂの接続端子パッド１ｄおよび端子パッド１ｆがフレキシブル基板１ａの配線パターン１ｇを介して相互に電気的に接続されるように構成されている。
また、図２（イ）に示すように、基材２１のリジッドフレックス基板１形成領域外の周辺部分には、例えば銅箔からなるダミーパターン２３が形成されている。このダミーパターン２３は、フレキシブル基板からなる基材２１の剛性を向上させ、撓みや捻れ等の変形を抑制して、製造工程において汎用のチップマウンタや汎用の基板搬送システムを用いることができるようにするために設けられているものである。但し、フレキシブル基板からなる基材２１のみで撓みや捻れ等が問題とならない場合は、ダミーパターン２３を設けないようにしてもよい。
【００３１】
さて、このような集合基板２０を用いて半導体装置１０を製造する工程を以下に説明する。なお、以下の各工程説明図においては、便宜上、第１のリジッド基板部１１及び第２のリジッド基板部１２を斜線部として、単純化して示している。
第１実施例の製造工程においては、まず図３（イ）に図示するように、集合基板２０の一面側にメタルマスクＭＭを載置し、その上にクリームハンダ２１を供給して、スキージ２２により印刷することにより、同図（ロ）に示すように、各リジッド基板１ｂの必要箇所（接続端子パッド１ｄ上）にクリームハンダ２１を印刷する。
【００３２】
次いで、図４（イ）に示すように、ハンダ印刷された箇所（接続端子パッド１ｄ）に、図示しないチップマウンターにより、ウェハレベルＣＳＰ構造の半導体チップ２を搭載する。次に、この状態で集合基板２０をリフロー炉へ搬送してリフロー処理する。これにより、半導体チップ２がリジッド基板１ｂの各接続端子パッド１ｄにハンダ接合される。
【００３３】
ここで、本発明による集合基板２０は、フレキシブル基板からなるものであるが、上記のように多くのリジッド基板１ｂが載置された部分を備えるため、従来のフレキシブル基板のように撓みや捩れが発生することが大幅に抑制される。この結果、汎用のチップマウンタを用いて半導体チップ２をフェイスダウンで位置決め搭載したり、汎用の基板搬送システムにてリフロー炉に搬送し得るようになる。
【００３４】
次いで、集合基板２０に配設される各リジッドフレックス基板１の一面側に搭載された半導体チップ２についてリフローし終えた後、図４（ロ）に示すように、集合基板２０の向きを反転させ、第２のリジッド基板部１２の他面側のリジット基板１ｂの必要箇所（接続端子パッド１ｄ上）に、前記図３（イ）と同様にしてハンダ印刷を施し、そこに半導体チップ２を搭載した後、リフロー処理する。続いて、図４（ハ）に示すように、第１のリジッド基板部１１の他面側の、外部接続端子３が形成されるリジット基板１ｂに設けられた外部接続端子形成用の端子パッド１ｆにフラックスを、例えばピンにより転写して塗布した後、フラックスが塗布された各端子パッドにハンダボール３を搭載する。この後、リフロー処理して外部接続端子３を形成する。
【００３５】
こうして半導体チップ２の実装および外部接続端子３の形成が完了すると、同図（ニ）に示すように、基材２１の各リジッドフレックス基板１形成箇所の周囲に設けられているミシン目２２（図２（イ）参照）に沿って基材２１を裁断する。これにより、各リジッドフレックス基板１は、集合基板２０からモジュール単位で個片化される。なお、裁断には、例えばＮＣルーター４を用いる。
【００３６】
次に、図５（イ）に図示するように、モジュール単位に個片化されたリジッドフレックス基板１の第１のリジッド基板部１１における、ハンダボール３に対向する側のリジット基板１ｂにフリップチップ実装される半導体チップ２上に、接着剤Ｓを塗布した後、同図（ロ）に示すように、フレキシブル基板による可撓部１ｃを屈曲させて各半導体チップ２を積層状態とする。この状態で上下に対向する半導体チップ２同士を接着固定する。
【００３７】
そして、上下に対向する半導体チップ２同士が接着固定された後、同図（ハ）に示すように、リジッド基板１ｂに実装される各半導体チップ２に封止樹脂５（例えばエポキシ樹脂）を、各半導体チップ２が完全に覆われるまで塗布する。
この際、例えばディスペンサを用いてリジッド基板１ｂと半導体チップ２との接合部分にも封止樹脂５が充填されるようポッティングする。この後、封止樹脂５を熱硬化させる。これにより、図１に図示した構造の半導体装置１０が製造される。
【００３８】
このように、第１実施例による製造方法によれば、フレキシブル基板からなるシート状の基材２１に複数のリジッド基板１ｂが載置された複数のリジッドフレックス基板１を一体的に連設した集合基板２０を使用しているので、従来のフレキシブル基板単体を用いた場合のように撓みや捩れが発生することが大幅に抑制され、殆どなくなる為、リジッド基板を用いる場合と同様の汎用のチップマウンタや基板搬送システムを用いることができる。
しかも、半導体チップをフェイスダウンでリジッド基板にフリップチップ実装する形態として、リジッド基板はフレキシブル基板に比し、搭載部の平坦度、寸法の安定性に優れるため、実装時の位置ずれも回避し得る結果、製造歩留りを向上させることができる。
【００３９】
さらに、集合基板２０には複数のリジッドフレックス基板１が配設される為、それら複数のリジッドフレックス基板１に一括してチップ実装および端子形成するバッチ処理が実現し、特別な実装プロセスを用いずとも効率良くモジュール構造の半導体装置１０を製造することができ、製品コスト低減に寄与し得る、という効果も奏する。
【００４０】
（２）第２実施例
次に、図６〜図７を参照して第２実施例について説明する。なお、これらの図において、上述した第１実施例と共通する要素には同一の番号を付している。
上述の第１実施例では、集合基板２０の基材２１をミシン目２２に沿って裁断して、形成された各リジッドフレックス基板１をモジュール単位に個片化し、個片化されたリジッドフレックス基板１を可撓部１ｃで屈曲させて各半導体チップ２を積層し、その状態で上下に対向する半導体チップ２同士を接着固定してからディスペンサによるポッティングにより各半導体チップ２に樹脂封止する態様とした。
【００４１】
これに対し、第２実施例では、集合基板２０に形成された各リジッドフレックス基板１において、一方の第１のリジッド基板部１１を集合基板２０の基材２１に連結させたまま、他方の第２のリジッド基板部１２をミシン目２２で裁断して基材２１から分離し、可撓部１ｃを屈曲させて各半導体チップ２を積層し、上下に対向する半導体チップ２同士を接着固定してから各半導体チップ２を一括して樹脂モールドした後、個片化することを特徴としている。
【００４２】
すなわち、図６（イ）に図示するように、上述の第１実施例と同様の実装プロセスによって集合基板２０に配設される各リジッドフレックス基板１に半導体チップ２を実装するとともに、外部接続端子３を形成する。
次いで、同図（ロ）に示すように、各リジッドフレックス基板部１の一方の、外部接続端子３が形成される側の第１のリジッド基板部１１を集合基板２０の基材２１に連結させたまま、他方の第２のリジッド基板部１２の周囲を、例えばＮＣルーター４によりミシン目２２で裁断して集合基板２０の基材２１から分離する。
次いで、同図（ハ）に示すように、可撓部１ｃを屈曲させて各半導体チップ２を積層し、その状態で上下に対向する半導体チップ２同士を接着固定する。
【００４３】
この後、同図（ニ）に示すように、トランファモールド用の金型７を集合基板２０上に装着し、エポキシ等のモールド樹脂材６を金型７のキャビティ部７cに注入する。注入したモールド樹脂材を熱硬化させた後、金型７を取り外すと、同図（ホ）に示すように、各モジュールが一括して樹脂モールドされる。
そして、各リジッドフレックス基板１において、集合基板２０の基材２１に連結させたままの第１のリジッド基板部１１の周囲をミシン目２２に沿って裁断することで図７に図示する構造の半導体装置１０が形成される。
【００４４】
以上のように、第２実施例による製造方法では、上述の第１実施例と同様、汎用のチップマウンタや基板搬送システムに適用可能であり、製造歩留りの低下も防ぐことが出来る上、集合基板２０上に形成される複数のモジュールを一括して樹脂モールドする為、効率良くモジュール構造の半導体装置１０を製造し得るようになり、製品コスト低減に寄与し得る。
【００４５】
なお、本実施例では、可撓部１ｃの屈曲に応じて上下に対向し、下部側となる第１のリジッド基板部１１の各リジット基板１ｂと上部側となる第２のリジッド基板部１１の各リジッド基板１ｂの寸法、形状を同一のものとしていたが、これに替えて、下部側の各リジット基板１ｂの大きさを上部側のそれより大きくするようにしてもよい。このように、下部側のリジット基板１ｂを上部側より大きくすると、トランスファーモールドに用いる金型７の形状を簡略化でき、しかも集合基板２０への金型装着が容易になる、という利点が得られる。
【００４６】
（３）変形例
次に、図８〜図９を参照して変形例について説明する。上述した第１および第２実施例では、屈曲自在な可撓部１ｃを隔てて両側に１つの第１のリジッド基板部１１と１つの第２のリジッド基板部１２を具備するリジッドフレックス基板１を用いてマルチチップモジュールを形成する構造例について言及したが、これに限らず、１つの第１のリジッド基板部１１を備えるとともに、複数の第２のリジッド基板部１２を複数の可撓部１ｃを介して連結したリジッドフレックス基板１を用いてマルチチップモジュールを形成することもできる。
【００４７】
例えば、図８（イ）に図示するように、下面に外部接続端子３が形成される１つの第１のリジッド基板部１１と、３つの可撓部１ｃ−１〜１ｃ−３を介して縦続的に連結した３つの第２のリジッド基板部１２を備えるリジッドフレックス基板１を用い、これら可撓部１ｃ−１〜１ｃ−３を順番に屈曲させれば、同図（ロ）に示すように、各リジット基板１ｂにフリップチップ実装される半導体チップ２が順次折畳まれるように積層され、モールド樹脂材６で封止された、７層構造のマルチチップモジュールを形成することができる。
【００４８】
また、図９（イ）および、そのＢ−Ｂ面での断面図を示す同図（ロ）に図示するように、下面に外部接続端子３が形成される第１のリジッド基板部１１の周囲４辺に可撓部１ｃ−１〜１ｃ−４を介して第２のリジッド基板部１２−１〜１２−４を連結したリジッドフレックス基板１を用い、これら可撓部１ｃ−１〜１ｃ−４を順番に屈曲させれば、同図（ハ）に示すように、各リジッド基板１ｂにフリップチップ実装される各半導体チップ２が順次折畳まれるように積層され、モールド樹脂材６で封止された、９層構造のマルチチップモジュールを形成することができる。
【００４９】
この場合、第２のリジッド基板部１２−１〜１２−４の各リジッド基板１ｂに実装される各半導体チップ２と外部接続端子３との間の、可撓部を介する配線長を短縮することができるため、電気的特性を向上させることができる。
また、上記各実施形態においては、積層された各半導体チップ２を接着剤で固定し、その後、封止樹脂５またはモールド樹脂６により封止を行う構成としたが、これに限らず、例えば、積層された各半導体チップ２を仮止め冶具でクリップして仮止めし、封止樹脂５またはモールド樹脂６の硬化後、これを取り外すようにしてもよい。
さらに高密度実装する場合には、例えば図８および図９に図示した折畳み形態を組合せる等、様々なアレンジが可能であることは言うまでもない。
【００５０】
【発明の効果】
請求項１に記載の発明によれば、マルチチップモジュールの製造工程において、リジッドフレックス基板を複数連結したシート状の集合基板を使用しているので、撓みや捩れが発生せず、これ故、汎用のチップマウンタや基板搬送システムに適用でき、しかも実装時の位置ずれも回避し得る結果、製造歩留りを向上させることができる。さらに、集合基板には複数のリジッドフレックス基板が配設される為、それら複数のリジッドフレックス基板に一括してチップ実装、端子形成および樹脂封止するバッチ処理を実現し得、特別な実装プロセスを用いずとも効率良くモジュール構造の半導体装置を製造することができ、製品コスト低減に寄与することができる。請求項３に記載の発明によれば、上下に対向する半導体チップ同士が接着固定された複数のモジュールを個々に覆う金型を用い、これにより全モジュールを一括して樹脂モールドするので、効率良くモジュール構造の半導体装置を製造し得るようになり、製品コスト低減に寄与することができる。
【図面の簡単な説明】
【図１】第１実施例による半導体装置１０の構造を示す断面図である。
【図２】集合基板２０の一例を示す平面図である。
【図３】第１実施例による半導体装置の製造工程を説明するための断面図である。
【図４】図３に続く製造工程を説明するための断面図である。
【図５】図４に続く製造工程を説明するための断面図である。
【図６】第２実施例による半導体装置の製造工程を説明するための断面図である。
【図７】第２実施例による半導体装置１０の構造を示す断面図である。
【図８】変形例を示す図である。
【図９】変形例を示す図である。
【図１０】従来例を示す断面図である。
【符号の説明】
１ リジッドフレックス基板
１ａ フレキシブル基板
１ｂ リジッド基板
１ｃ 可撓部
２ 半導体チップ
３ ハンダボール
５ 封止樹脂
６ モールド樹脂材
７ 金型
２０ 集合基板
２１ リジッド基材
２２ ミシン目[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor device for mounting a plurality of semiconductor chips at high density and a method for manufacturing the same.
[0002]
[Prior art]
In recent years, multi-chip modules are known in which a plurality of semiconductor chips are mounted with high density using an intermediate substrate. As this type of technology, for example, in Japanese Patent Laid-Open No. 2000-307037, as shown in FIGS. 10 (a) to 10 (c), two flexible bumps 101 are provided on a flexible substrate 100 having flexibility. The semiconductor chips 102 and 102 are flip-chip mounted, and then the flexible substrate 100 is bent and bonded and fixed in a state where the back surfaces of both the chips 102 and 102 are in contact with each other, and the bent flexible substrate 100 is connected. A multi-chip module is disclosed that is connected to a wiring board via solder balls 104 formed on the pads 103.
[0003]
[Problems to be solved by the invention]
By the way, in such a semiconductor device having a multi-chip module structure, since the flexible substrate 100 is used, the substrate 100 is likely to be bent or twisted. For this reason, there is a problem that it is difficult to apply to a general-purpose chip mounter or a substrate transfer system, and in particular, when the semiconductor chip 102 is mounted face down, misalignment is likely to occur, resulting in a decrease in manufacturing yield.
[0004]
Further, in the above-described module structure, the back surfaces of the semiconductor chips 102 stacked by bending the flexible substrate 100 are merely bonded and fixed, and further, the chip periphery is in an exposed state, so that moisture resistance is lacking and reliability is lowered. There is also a problem of inviting.
[0005]
Therefore, the present invention has been made in view of such circumstances, and can be applied to a general-purpose chip mounter or a substrate transfer system, and can be mounted at a high density without deteriorating the manufacturing yield or impairing the reliability. An object is to provide an apparatus and a method for manufacturing the same.
[0006]
[Means for Solving the Problems]
[0014]
According to the first aspect of the present invention, a flexible substrate that can be bent, a first rigid substrate portion including two rigid substrates that sandwich both surfaces of one first region of the flexible substrate, and at least the flexible substrate. Using the sheet-like collective substrate in which a plurality of rigid flex substrates each composed of a second rigid substrate portion including a rigid substrate disposed on at least one surface of one second region is used, At least one first semiconductor chip is mounted on one rigid substrate on the same side as the rigid substrate in the second rigid substrate portion of the first rigid substrate portion in each rigid flex substrate of the substrate. And mounting at least one second semiconductor chip on the rigid substrate of the second rigid substrate portion. Semiconductor chip mounting step, external connection terminal forming step of forming an external connection terminal on the other rigid substrate of the first rigid substrate portion in each of the rigid flex substrates of the collective substrate, and the semiconductor chip mounting step And after the external connection terminal forming step, in each of the rigid flex substrates on the collective substrate, the rigid substrate of the second rigid substrate portion is connected to the collective substrate while the first rigid substrate portion is connected to the collective substrate. A separation step of cutting and separating from the collective substrate, and the second rigid substrate using the flexible substrate between the first rigid substrate portion and the second rigid substrate portion of each rigid flex substrate as a flexible portion. Each rigid flex substrate in a state where the portion is separated from the collective substrate is bent by the flexible portion, After laminating the respective semiconductor chips mounted on each rigid substrate and then collectively resin-molding a module formed by bonding and fixing the semiconductor chips facing each other up and down in that state, the first rigid substrate portion of the first rigid substrate portion And a module forming step of cutting each rigid substrate from the collective substrate into individual modules.
[0015]
According to a second aspect of the present invention, which is dependent on the first aspect, each semiconductor chip mounted on each rigid substrate has a wafer level CSP structure connected via a protruding electrode.
[0016]
According to the invention of claim 3 that is dependent on claim 1, the module forming step uses a mold that individually covers a plurality of modules in which semiconductor chips facing each other are bonded and fixed. It is characterized by resin molding all modules at once.
[0017]
In the semiconductor device according to the present invention, the rigid flex substrate is bent by a flexible portion made of a flexible substrate, and each semiconductor chip mounted on each rigid substrate is laminated and resin-sealed. As a result, each stacked semiconductor chip is hermetically sealed while being fixedly held, so that it is possible to realize a highly reliable semiconductor device with excellent moisture resistance, and by using a rigid flex substrate, bending of the substrate and Since there is no twisting, it is possible to prevent the positional deviation when mounting the semiconductor chip, so that it is possible to avoid a decrease in manufacturing yield.
[0018]
Further, in the method of manufacturing a semiconductor device according to the present invention, since a sheet-like collective substrate in which a plurality of rigid flex substrates are connected is used, no bending or twisting occurs, and therefore a general-purpose chip mounter or substrate transport system is used. As a result, it is possible to avoid misalignment during mounting, thereby preventing a decrease in manufacturing yield.
In addition, since multiple rigid flex substrates are arranged on the collective substrate, batch processing for batch mounting of semiconductor chips, terminal formation, and resin sealing can be realized on these multiple rigid flex substrates, and a special mounting process A semiconductor device having a module structure can be efficiently manufactured without using a material, and can contribute to a reduction in product cost.
[0019]
DETAILED DESCRIPTION OF THE INVENTION
Embodiments of the present invention will be described below with reference to the drawings.
(1) First embodiment
(1) Structure of the semiconductor device 10
FIG. 1A is a sectional view showing the structure of the semiconductor device 10 according to the first embodiment. In this figure, reference numeral 1 denotes a rigid flex substrate formed of a flexible substrate 1a and a rigid substrate 1b. The rigid flex substrate 1 includes a flexible substrate 1a and a plurality of rigid substrates 1b, and a portion having a so-called sandwich structure in which the upper and lower surfaces of the flexible substrate 1a are sandwiched between the rigid substrates 1b as shown in FIG. The composite substrate has a portion (flexible portion) 1c where the flexible substrate 1a is exposed.
[0020]
In other words, the rigid flex substrate 1 can be bent at the flexible portion 1c from which the flexible substrate 1a is exposed, and the rigid substrate 1b is disposed on both sides of the flexible portion 1c on both sides. A substrate 1b is provided. One rigid substrate 1b of the portion (first rigid substrate portion 11) on one side of the flexible portion 1c where the rigid substrate 1b is disposed on both the upper and lower surfaces is, for example, a wafer level CSP structure. The semiconductor chip 2 is flip-chip mounted by face-down, and the external connection terminals 3 are formed by disposing solder balls 3a in a lattice shape on the other rigid substrate 1b. Similarly, each rigid substrate 1b of the portion (second rigid substrate portion 12) on the other side of the flexible portion 1c where the rigid substrate 1b is disposed on both the upper and lower surfaces is similarly, for example, a wafer level CSP. A semiconductor chip 2 having a structure is flip-chip mounted.
[0021]
In addition, as will be described later, the rigid substrate 1b on the side where one semiconductor chip 2 of the first rigid substrate unit 11 is flip-chip mounted and each rigid substrate 1b of the second rigid substrate unit 12 include a semiconductor. Chip mounting connection terminal pads, wiring patterns, through holes connected to the wiring patterns formed on the flexible substrate 1a, and the like are formed, and the other external connection terminals 3 of the first rigid board portion 11 are formed. Terminal pads for forming external connection terminals, wiring patterns, through holes, and the like are formed on the rigid substrate 1b.
[0022]
On the other hand, the flexible substrate 1a is formed with wiring patterns and through holes (or via holes) connected to the rigid substrate 1b, so that the terminal pads and connection terminal pads of each rigid substrate 1b change the wiring pattern of the flexible substrate 1a. And are electrically connected to each other.
[0023]
Here, the semiconductor chip 2 has a wafer level CSP structure. In this wafer level CSP structure, an insulating layer is formed on a semiconductor chip in a wafer state, a rewiring layer is formed, and then a protruding electrode ( After forming the connection electrode terminal by the post terminal), it is formed by dividing into individual chips, and the arrangement of the connection electrode terminal by the protruding electrode (post terminal) is almost the same size as the semiconductor chip. It can be set relatively freely.
Therefore, when the semiconductor chip 2 has a wafer level CSP structure, as shown in FIG. 2 to be described later, the connection terminal pads for mounting the semiconductor chip formed on the rigid substrate 1b can be arranged in a matrix. The size of 1b can be reduced. However, in each embodiment of the present invention, the configuration of the semiconductor chip 2 is not limited to this wafer level CSP structure, and semiconductor chips having various structures in which protruding electrodes are formed can be used.
[0024]
The rigid flex substrate 1 on which the chip is mounted and the terminals are formed is bent at the flexible portion 1c, thereby bringing the semiconductor chips 2 into a stacked state. In this state, the semiconductor chips 2 facing each other vertically are bonded and fixed, and then each semiconductor chip 2 mounted on the rigid substrate 1b is hermetically sealed with a sealing resin 5 so as to cover the joint portion with the rigid substrate 1b. It has the structure to do.
[0025]
With such a module structure, each semiconductor chip 2 in the stacked state can be hermetically sealed while being fixedly held, so that the highly reliable semiconductor device 10 having excellent moisture resistance can be realized. In addition, since the rigid flex substrate 1 is used, the bending and twisting of the substrate are greatly reduced and almost eliminated, so that it is possible to prevent misalignment during chip mounting, thereby improving the manufacturing yield.
Further, when the rigid flex substrate 1 is used, the surface on which the semiconductor chip 2 is flip-chip mounted becomes three surfaces, and can be mounted at a higher density than the conventional example using the flexible substrate 100 (see FIG. 10).
[0026]
In the above configuration, the second rigid substrate portion of the rigid flex substrate 1 is also configured such that the rigid substrate 1b is disposed on both the upper and lower surfaces. However, the present invention is not limited to this, and at least the first rigid substrate portion includes a semiconductor. The rigid substrate 1b may be disposed only on the same side as the rigid substrate 1b on which the chip 2 is flip-chip mounted, and the semiconductor chip 2 may be flip-chip mounted thereon.
[0027]
(2) Manufacturing method of semiconductor device 10
Next, a method for manufacturing the semiconductor device 10 having the above structure will be described with reference to FIGS. In the manufacturing method according to the first embodiment, a sheet-like collective substrate 20 formed by connecting a plurality of rigid flex substrates 1 is used. An example of the configuration of the collective substrate 20 is shown in FIGS. The collective substrate 20 shown in this figure is formed by integrally connecting a rigid flex substrate 1 of 4 rows and 3 columns to a sheet-like base material 21 made of a flexible substrate. FIG. FIG. 2B shows the main part of the cross-sectional shape along the AA plane including the portion of the collective substrate 20 where the rigid flex substrate 1 is formed.
[0028]
As shown in the figure, in a place where a plurality of rigid flex substrates 1 are formed, a base material 21 is used as a flexible substrate 1a, which is sandwiched vertically by a rigid substrate 1b, and the upper and lower rigid substrates 1b and flexible substrates 1a. Are integrated, and the flexible substrate 1a between the two rigid substrate 1b arrangement regions is a flexible portion 1c, and a plurality of the same configurations as those of the rigid flex substrate 1 in FIG. Each connection portion is provided with an opening (hereinafter referred to as perforation) 22 in advance around each rigid flex substrate 1 formation portion. Thus, as described later, each rigid flex substrate 1 can be easily separated by cutting the connecting portion along the perforation 22.
[0029]
In each rigid flex board 1 shown in FIG. 2 (b), the right rigid board 1b and the flexible board 1a in the drawing are integrated into the first rigid board portion 11, the left rigid board 1b and the flexible board 1a. When the second rigid substrate portion 12 is used as the integrated portion, the one rigid substrate 1b of the first rigid substrate portion 11 and the second rigid substrate on which the semiconductor chip having the wafer level CSP structure is mounted. Each rigid substrate 1b of the section 12 is formed with, for example, a matrix-like connection terminal pad 1d and a wiring pattern as shown in FIG. 2 (a) and a through hole 1e as shown in FIG. 2 (b). On the other rigid substrate 1b of the first rigid substrate portion 11 where the external connection terminals 3 are formed, terminal pads 1f for forming external connection terminals and wirings are provided. Turn and through-hole 1e is formed.
[0030]
A wiring pattern 1g is formed on the flexible substrate 1a. Thus, the connection terminal pad 1d and the terminal pad 1f of each rigid substrate 1b are configured to be electrically connected to each other via the wiring pattern 1g of the flexible substrate 1a.
Further, as shown in FIG. 2A, a dummy pattern 23 made of, for example, copper foil is formed in the peripheral portion of the base material 21 outside the region where the rigid flex substrate 1 is formed. The dummy pattern 23 improves the rigidity of the base material 21 made of a flexible substrate and suppresses deformation such as bending and twisting so that a general-purpose chip mounter or a general-purpose substrate transport system can be used in the manufacturing process. It is provided to do. However, the dummy pattern 23 may not be provided if bending or twisting is not a problem only with the base material 21 made of a flexible substrate.
[0031]
Now, a process for manufacturing the semiconductor device 10 using such a collective substrate 20 will be described below. In the following process explanatory diagrams, for the sake of convenience, the first rigid substrate portion 11 and the second rigid substrate portion 12 are simply shown as hatched portions.
In the manufacturing process of the first embodiment, first, as shown in FIG. 3A, a metal mask MM is placed on one side of the collective substrate 20, and cream solder 21 is supplied on the metal mask MM. As shown in FIG. 5B, the cream solder 21 is printed on the necessary portion (on the connection terminal pad 1d) of each rigid substrate 1b.
[0032]
Next, as shown in FIG. 4A, a semiconductor chip 2 having a wafer level CSP structure is mounted on a solder printed portion (connection terminal pad 1d) by a chip mounter (not shown). Next, in this state, the collective substrate 20 is transferred to a reflow furnace and subjected to a reflow process. As a result, the semiconductor chip 2 is soldered to each connection terminal pad 1d of the rigid substrate 1b.
[0033]
Here, the collective substrate 20 according to the present invention is made of a flexible substrate, but has a portion on which many rigid substrates 1b are placed as described above, so that it is not bent or twisted like a conventional flexible substrate. Occurrence is greatly suppressed. As a result, the semiconductor chip 2 can be positioned and mounted face-down using a general-purpose chip mounter, or can be transferred to a reflow furnace by a general-purpose substrate transfer system.
[0034]
Next, after the reflow of the semiconductor chips 2 mounted on one surface side of each rigid flex substrate 1 disposed on the collective substrate 20 is finished, the direction of the collective substrate 20 is reversed as shown in FIG. Then, solder printing is performed on the necessary portion (on the connection terminal pad 1d) of the rigid substrate 1b on the other surface side of the second rigid substrate portion 12 in the same manner as in FIG. 3A, and the semiconductor chip 2 is mounted thereon. After that, reflow processing is performed. Subsequently, as shown in FIG. 4C, the external connection terminal forming terminal pad 1f provided on the rigid substrate 1b on the other surface side of the first rigid substrate portion 11 on which the external connection terminals 3 are formed. After the flux is transferred to and coated on the pins, for example, solder balls 3 are mounted on the respective terminal pads to which the flux has been applied. Thereafter, the external connection terminal 3 is formed by reflow processing.
[0035]
When the mounting of the semiconductor chip 2 and the formation of the external connection terminals 3 are completed in this way, as shown in FIG. 4D, the perforations 22 (see FIG. 2 (see (a)), the base material 21 is cut. As a result, each rigid flex board 1 is separated into individual modules from the collective board 20. For cutting, for example, an NC router 4 is used.
[0036]
Next, as shown in FIG. 5A, flip chip is attached to the rigid substrate 1b facing the solder ball 3 in the first rigid substrate portion 11 of the rigid flex substrate 1 separated into modules. After the adhesive S is applied on the semiconductor chip 2 to be mounted, as shown in FIG. 2B, the flexible part 1c by the flexible substrate is bent to make each semiconductor chip 2 in a laminated state. In this state, the semiconductor chips 2 facing vertically are bonded and fixed together.
[0037]
Then, after the semiconductor chips 2 that are vertically opposed to each other are bonded and fixed, as shown in FIG. 3C, the sealing resin 5 (for example, epoxy resin) is applied to each semiconductor chip 2 mounted on the rigid substrate 1b. Application is performed until each semiconductor chip 2 is completely covered.
At this time, for example, using a dispenser, potting is performed so that the sealing resin 5 is also filled in the joint portion between the rigid substrate 1 b and the semiconductor chip 2. Thereafter, the sealing resin 5 is thermoset. Thereby, the semiconductor device 10 having the structure shown in FIG. 1 is manufactured.
[0038]
As described above, according to the manufacturing method according to the first embodiment, a plurality of rigid flex substrates 1 on which a plurality of rigid substrates 1b are placed on a sheet-like base material 21 made of a flexible substrate are integrally connected. Since the substrate 20 is used, the occurrence of bending and twisting as in the case of using a conventional flexible substrate alone is greatly suppressed and almost eliminated, so that the same general-purpose chip mounter as in the case of using a rigid substrate is used. Or a substrate transfer system.
Moreover, as a form in which the semiconductor chip is flip-chip mounted on the rigid substrate face-down, the rigid substrate is superior in flatness and dimensional stability to the mounting portion compared to the flexible substrate, so that misalignment during mounting can also be avoided. As a result, the manufacturing yield can be improved.
[0039]
Further, since the plurality of rigid flex substrates 1 are disposed on the collective substrate 20, batch processing for collectively mounting chips and forming terminals on the plurality of rigid flex substrates 1 is realized without using a special mounting process. In addition, the semiconductor device 10 having a module structure can be efficiently manufactured, and the effect that the product cost can be reduced is also achieved.
[0040]
(2) Second embodiment
Next, a second embodiment will be described with reference to FIGS. In these drawings, the same reference numerals are given to elements common to the above-described first embodiment.
In the first embodiment described above, the base 21 of the collective substrate 20 is cut along the perforations 22, and each of the formed rigid flex substrates 1 is separated into modules, and the individual rigid flex substrates are separated. 1 is bent by a flexible portion 1c, and the respective semiconductor chips 2 are stacked, and in this state, the semiconductor chips 2 that are vertically opposed to each other are bonded and fixed, and then resin-sealed to each semiconductor chip 2 by potting with a dispenser. did.
[0041]
In contrast, in the second embodiment, in each rigid flex substrate 1 formed on the collective substrate 20, one of the first rigid substrate portions 11 is connected to the base material 21 of the collective substrate 20, while the other first flex substrate 1 is connected. 2 rigid substrate part 12 is cut from perforation 22 and separated from base material 21, flexible part 1 c is bent to stack each semiconductor chip 2, and upper and lower semiconductor chips 2 are bonded and fixed together. The semiconductor chips 2 are collectively molded by resin molding and then separated into individual pieces.
[0042]
That is, as shown in FIG. 6A, the semiconductor chip 2 is mounted on each rigid flex substrate 1 disposed on the collective substrate 20 by the same mounting process as in the first embodiment, and the external connection terminals 3 is formed.
Next, as shown in FIG. 5B, one rigid flex board part 1 of each rigid flex board part 1 on the side where the external connection terminals 3 are formed is connected to the base material 21 of the collective board 20. As it is, the periphery of the other second rigid substrate portion 12 is cut by the perforation 22 by the NC router 4, for example, and separated from the base material 21 of the collective substrate 20.
Next, as shown in FIG. 3C, the flexible portion 1c is bent to stack the semiconductor chips 2, and in this state, the semiconductor chips 2 facing vertically are bonded and fixed together.
[0043]
Thereafter, as shown in FIG. 4D, the transfer mold die 7 is mounted on the collective substrate 20, and a mold resin material 6 such as epoxy is injected into the cavity portion 7 c of the die 7. When the mold 7 is removed after the injected mold resin material is thermally cured, the modules are collectively resin-molded as shown in FIG.
Then, in each rigid flex substrate 1, the periphery of the first rigid substrate portion 11 that is connected to the base material 21 of the collective substrate 20 is cut along the perforation 22 to thereby form a semiconductor having a structure illustrated in FIG. 7. A device 10 is formed.
[0044]
As described above, the manufacturing method according to the second embodiment can be applied to a general-purpose chip mounter and a substrate transfer system, as in the first embodiment, and can prevent a decrease in manufacturing yield. Since a plurality of modules formed on 20 are collectively resin-molded, the semiconductor device 10 having a module structure can be efficiently manufactured, which can contribute to a reduction in product cost.
[0045]
In the present embodiment, each of the rigid substrates 1b of the first rigid substrate portion 11 which is opposed to the upper and lower sides according to the bending of the flexible portion 1c and which is the lower side, and the second rigid substrate portion 11 which is the upper side. Although each rigid substrate 1b has the same size and shape, the size of each rigid substrate 1b on the lower side may be made larger than that on the upper side. Thus, if the lower rigid substrate 1b is made larger than the upper side, the shape of the mold 7 used for transfer molding can be simplified, and the mold can be easily mounted on the collective substrate 20. .
[0046]
(3) Modification
Next, a modification will be described with reference to FIGS. In the first and second embodiments described above, the rigid flex substrate 1 having one first rigid substrate portion 11 and one second rigid substrate portion 12 on both sides with a bendable flexible portion 1c is provided. Although an example of a structure in which a multichip module is formed using the above-described structure is not limited thereto, the first rigid substrate portion 11 is provided, and the plurality of second rigid substrate portions 12 are provided with the plurality of flexible portions 1c. A multi-chip module can also be formed using the rigid flex substrate 1 connected through the vias.
[0047]
For example, as shown in FIG. 8 (a), it is cascaded via one first rigid board portion 11 having an external connection terminal 3 formed on the lower surface and three flexible portions 1c-1 to 1c-3. If the rigid flex board 1 provided with the three second rigid board parts 12 connected in general is used and these flexible parts 1c-1 to 1c-3 are bent in order, as shown in FIG. A multi-chip module having a 7-layer structure in which the semiconductor chips 2 flip-chip mounted on each rigid substrate 1b are stacked so as to be sequentially folded and sealed with the mold resin material 6 can be formed.
[0048]
Further, as shown in FIG. 9 (A) and FIG. 9 (B) showing a cross-sectional view along the B-B plane, the periphery of the first rigid board portion 11 in which the external connection terminals 3 are formed on the lower surface. Using the rigid flex board 1 in which the second rigid board parts 12-1 to 12-4 are connected to the four sides via the flexible parts 1c-1 to 1c-4, these flexible parts 1c-1 to 1c-4 are used. Are sequentially laminated, each semiconductor chip 2 flip-chip mounted on each rigid substrate 1b is sequentially folded and sealed with a mold resin material 6, as shown in FIG. Thus, a multi-chip module having a 9-layer structure can be formed.
[0049]
In this case, the wiring length through the flexible portion between each semiconductor chip 2 and the external connection terminal 3 mounted on each rigid substrate 1b of the second rigid substrate portions 12-1 to 12-4 is shortened. Therefore, electrical characteristics can be improved.
Moreover, in each said embodiment, it was set as the structure which fixes each semiconductor chip 2 laminated | stacked with the adhesive agent, and seals by sealing resin 5 or the mold resin 6 after that, but it is not restricted to this, For example, Each stacked semiconductor chip 2 may be clipped and temporarily fixed with a temporary fixing jig, and removed after the sealing resin 5 or the mold resin 6 is cured.
Needless to say, in the case of mounting at higher density, various arrangements are possible, for example, by combining the folding forms shown in FIGS.
[0050]
【The invention's effect】
According to the first aspect of the present invention, in the manufacturing process of the multichip module, since a sheet-like collective substrate in which a plurality of rigid flex substrates are connected is used, there is no occurrence of bending or twisting. As a result, the manufacturing yield can be improved as a result of being able to avoid misalignment during mounting. In addition, since multiple rigid flex boards are arranged on the collective board, batch processing can be realized in which chip mounting, terminal formation and resin sealing are collectively performed on these multiple rigid flex boards. Even if it is not used, a semiconductor device having a module structure can be manufactured efficiently, which can contribute to a reduction in product cost. According to the third aspect of the present invention, since the molds that individually cover the plurality of modules in which the semiconductor chips facing each other in the vertical direction are individually fixed are used, and all the modules are collectively resin-molded, it is efficient. A module-structured semiconductor device can be manufactured, which can contribute to a reduction in product cost.
[Brief description of the drawings]
FIG. 1 is a cross-sectional view showing a structure of a semiconductor device 10 according to a first embodiment.
FIG. 2 is a plan view showing an example of a collective substrate 20. FIG.
FIG. 3 is a cross-sectional view for explaining a manufacturing step of the semiconductor device according to the first embodiment;
4 is a cross-sectional view for illustrating a manufacturing step subsequent to FIG. 3. FIG.
FIG. 5 is a cross-sectional view for illustrating a manufacturing step subsequent to FIG. 4;
FIG. 6 is a cross-sectional view for illustrating a manufacturing step of the semiconductor device according to the second embodiment.
FIG. 7 is a cross-sectional view showing a structure of a semiconductor device 10 according to a second embodiment.
FIG. 8 is a diagram showing a modification.
FIG. 9 is a diagram showing a modification.
FIG. 10 is a cross-sectional view showing a conventional example.
[Explanation of symbols]
1 Rigid flex board
1a Flexible substrate
1b Rigid board
1c Flexible part
2 Semiconductor chip
3 Solder balls
5 Sealing resin
6 Mold resin material
7 Mold
20 Assembly board
21 Rigid base material
22 Perforation

Claims (3)

屈曲自在なフレキシブル基板と、このフレキシブル基板の１つの第１の領域の両面を挟み込む２枚のリジッド基板を備える第1のリジッド基板部と、前記フレキシブル基板の少なくとも１つの第２の領域の、少なくとも一方の面上に配設されるリジッド基板を備える第２のリジッド基板部とから構成されるリジッドフレックス基板を複数連結したシート状の集合基板を用い、
前記集合基板の前記各リジッドフレックス基板における、前記第１のリジッド基板部の、前記第２のリジッド基板部における前記リジッド基板と同じ側の一方のリジッド基板上に、少なくとも１つの第１の半導体チップを実装するとともに、前記第２のリジッド基板部の前記リジッド基板に、少なくとも１つの第２の半導体チップを実装する半導体チップ実装工程と、
前記集合基板の前記各リジッドフレックス基板における、前記第１のリジッド基板部の、他方のリジッド基板上に外部接続端子を形成する外部接続端子形成工程と、
前記半導体チップ実装工程および前記外部接続端子形成工程後、前記集合基板上の前記各リジッドフレックス基板において、前記第１のリジッド基板部を集合基板に連結させたまま、前記第２のリジッド基板部の前記リジッド基板を当該集合基板から裁断して分離する分離工程と、
前記各リジッドフレックス基板の前記第１のリジッド基板部と前記第２のリジッド基板部間の前記フレキシブル基板を可撓部として、前記第２のリジッド基板部が前記集合基板から分離された状態の前記各リジッドフレックス基板を、前記可撓部でそれぞれ屈曲させて前記各リジッド基板に実装される前記各半導体チップを積層し、その状態で上下に対向する半導体チップ同士を接着固定してなるモジュールを一括して樹脂モールドした後、前記第１のリジッド基板部の前記各リジット基板を集合基板から裁断してモジュール単位に個片化するモジュール形成工程と、
を具備することを特徴とする半導体装置の製造方法。At least one of a flexible substrate, a first rigid substrate portion including two rigid substrates sandwiching both surfaces of one first region of the flexible substrate, and at least one second region of the flexible substrate. Using a sheet-like collective substrate in which a plurality of rigid flex substrates composed of a second rigid substrate portion including a rigid substrate disposed on one surface is connected,
At least one first semiconductor chip on one rigid substrate on the same side as the rigid substrate in the second rigid substrate portion of the first rigid substrate portion in each rigid flex substrate of the collective substrate. A semiconductor chip mounting step of mounting at least one second semiconductor chip on the rigid substrate of the second rigid substrate portion;
An external connection terminal forming step of forming an external connection terminal on the other rigid substrate of the first rigid substrate portion in each of the rigid flex substrates of the aggregate substrate;
After the semiconductor chip mounting step and the external connection terminal forming step, in each of the rigid flex substrates on the collective substrate, the first rigid substrate portion is connected to the collective substrate while the second rigid substrate portion is connected. A separation step of cutting and separating the rigid substrate from the aggregate substrate;
The flexible substrate between the first rigid substrate portion and the second rigid substrate portion of each rigid flex substrate is defined as a flexible portion, and the second rigid substrate portion is separated from the collective substrate. Each rigid flex substrate is bent at the flexible portion, and the semiconductor chips mounted on the rigid substrate are stacked, and in this state, a module is formed by bonding and fixing the semiconductor chips facing each other vertically. Then, after the resin molding, a module forming step of cutting each rigid substrate of the first rigid substrate portion from a collective substrate into individual modules, and
A method for manufacturing a semiconductor device, comprising: 前記各リジッド基板にそれぞれ実装される各半導体チップは、突起電極を介して接続されるウェハレベルＣＳＰ構造を有することを特徴とする請求項１記載の半導体装置の製造方法。  2. The method of manufacturing a semiconductor device according to claim 1, wherein each semiconductor chip mounted on each rigid substrate has a wafer level CSP structure connected through a protruding electrode. 前記モジュール形成工程では、上下に対向する半導体チップ同士が接着固定された複数のモジュールを個々に覆う金型を用い、これにより全モジュールを一括して樹脂モールドすることを特徴とする請求項１記載の半導体装置の製造方法。  2. The module forming step according to claim 1, wherein a mold is used to individually cover a plurality of modules in which semiconductor chips facing each other in the vertical direction are bonded and fixed, and thereby all the modules are collectively resin-molded. Manufacturing method of the semiconductor device.
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