JPH0897140A - Compound semiconductor substrate and its manufacture - Google Patents

Abstract

PURPOSE: To lessen the dislocation density and also, lessen the band structure and the change of carrier concentration by providing a III-V compound semiconductor 9 layer which contains group V atoms excessively within the specified range as compared with group III atoms by at least one layer or more. CONSTITUTION: A GaAs layer 12 epitaxially grown is made on an Si substrate 11. And, a GaAs layer 13 containing excessive As is made on the GaAs layer 12. During the growth, since the release of As from the surface of the GaAs layer 13 is suppressed, stoichimetically excessive As is taken into the GaAs layer 13. The content of excessive As within the GaAs layer 13 for reducing the density of dislocation 15a should be 0.2% or more, while the upper limit value is limited by growth method, so in molecular beam epitaxial growth method, 1.5% becomes the upper limit value.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a compound semiconductor substrate and a method for manufacturing the same, and more particularly to a compound semiconductor substrate used for, for example, an optical or high-speed electronic device and a method for manufacturing the same.

[0002]

2. Description of the Related Art In recent years, a compound semiconductor substrate has been studied in which a different type of compound semiconductor is epitaxially grown on a substrate and the respective advantages of the substrate and the compound semiconductor can be utilized. For example, by epitaxially growing GaAs on a silicon (hereinafter referred to as Si) substrate, a compound semiconductor substrate having both mechanical strength possessed by Si and high-speed response possessed by GaAs has been produced. Compound semiconductor substrates obtained by various methods are applied to electronic devices, optical devices, and the like. However, there is a large difference in the lattice constant and the coefficient of thermal expansion between Si and GaAs, and dislocations are easily formed at the interface between the Si substrate and the GaAs layer due to the difference in the lattice constant. The dislocation easily propagates toward the surface of the GaAs layer due to the generated stress. As a result, there are many dislocations on the surface of the GaAs layer, the crystallinity in the vicinity of the surface of the GaAs layer deteriorates, and there is a problem that it is difficult to sufficiently exhibit the function as a device or the like.

As a method of reducing the dislocation density near the surface of the GaAs layer, it has been attempted to insert a dislocation reduction layer for suppressing the propagation of dislocations in the GaAs layer. As the dislocation reducing layer, a strained superlattice layer having a composition different from that of the GaAs layer, a layer to which impurities are added, and the like have been studied (Applied Physics: Vol. 61, No. 2, pp126-133, 1992).

For the strained superlattice layer, for example, InGaAs is used.
A compound having a lattice constant different from that of a GaAs layer such as a GaAs layer or a GaAsP layer is used, and when this strained superlattice layer is inserted, the dislocation propagation direction is bent by the strain generated from this strained Is suppressed, the dislocation density near the surface of the GaAs layer can be reduced. When impurities such as Zn, In, and Si atoms are added to the GaAs layer, propagation of dislocations near the surface of the GaAs layer is suppressed by the effect of hardening the crystal and the effect of pinning the dislocations. The dislocation density can be reduced.

[0005]

However, in the compound semiconductor substrate in which the above strained superlattice layer is inserted,
There is a problem that the strained superlattice layer easily changes the band structure of the GaAs layer, and the change of the band structure easily adversely affects the electrical characteristics near the surface of the GaAs layer.

Further, in the compound semiconductor substrate to which the impurities are added, the impurities from the dislocation reducing layer are Ga.
If diffused near the surface of the As layer, impurities such as Zn, In, or Si atoms act as a dopant, and GaA
There has been a problem that the carrier concentration in the vicinity of the surface of the s layer is likely to change and adversely affect the electrical characteristics.

The present invention has been made in view of the above problems, and has a low dislocation density near the surface of a compound semiconductor substrate in which a III-V group compound semiconductor layer is epitaxially grown on a Si substrate, and has a band structure and a carrier concentration. It is an object of the present invention to provide a high-quality compound semiconductor substrate excellent in electrical characteristics, which is less likely to change, and a manufacturing method thereof.

[0008]

To achieve the above object, a compound semiconductor substrate according to the present invention is formed on a silicon substrate.
In a compound semiconductor substrate in which a III-V group compound semiconductor layer is epitaxially grown, it is composed of the same constituent elements as the III-V group compound semiconductor layer, and contains 0.2% or more of V group atoms as compared with III group atoms. It is characterized by containing at least one III-V group compound semiconductor layer which is excessively contained within a range of 5% or less (1).

The method of manufacturing a compound semiconductor substrate according to the present invention is a method of manufacturing a compound semiconductor substrate in which a group III-V compound semiconductor layer is epitaxially grown on a silicon substrate. It is characterized in that it includes a step of growing a III-V group compound semiconductor layer containing a group V atom in excess by incorporating it excessively in a range of 2% or more and 1.5% or less (2).

A method for producing a compound semiconductor substrate according to the present invention is the method for producing a compound semiconductor substrate according to the above (2), in which a group V atom is contained excessively compared to a group III atom.
After epitaxially growing the group V compound semiconductor layer,
It is characterized by performing a heat treatment step at a temperature higher than the growth temperature of the III-V group compound semiconductor layer to be grown thereafter (3).

[0011]

In the case of a GaAs (III-V group compound) layer, for example, a relatively low temperature (200-
Ga at a predetermined temperature of 300 ° C.
It is known that a GaAs layer containing a certain concentration of As (group III atom) in excess of that of group V atom can be epitaxially grown (Thin Solid Films: 231 (1993) 61-7).
3). In this case, mainly by changing the growth temperature,
The excessive As content concentration in the GaAs layer is controlled.

FIG. 6 is a schematic diagram for explaining dislocation propagation in a compound semiconductor substrate in which a GaAs layer is epitaxially grown on a Si substrate and the GaAs layer contains one GaAs layer containing excess As. 11 is a schematic cross-sectional view, in which 11 indicates a Si substrate. Si substrate 11
An epitaxially grown GaAs layer 12 is formed thereon, and a GaAs layer 13 containing excess As is formed on the GaAs layer 12. The GaAs layer 13 is grown at a relatively low temperature by using the above-mentioned molecular beam epitaxy method, and during the growth, As is released from the surface of the GaAs layer 13 is suppressed.
A stoichiometric excess of As is incorporated therein. Further, a GaAs layer 14 that has been epitaxially grown is formed on the GaAs layer 13 substantially in the same manner as the GaAs layer 12, and during the epitaxial growth process of the GaAs layer 14, a part of As that is excessively taken into the GaAs layer 13 is formed. Will be aggregated and deposited as metal As13a.

In the compound semiconductor substrate thus configured, the dislocations 15 generated at the interface between the Si substrate 11 and the GaAs layer 12 are pinned by the metal As 13a. Therefore, except for some dislocations 15a, most of the dislocations 15 are blocked by the GaAs layer 13 and Ga
Propagation to the As layer 14 is blocked, and as a result, the density of dislocations 15a near the surface of the GaAs layer 14 decreases. Ga for reducing the density of dislocations 15a
The excess As content in the As layer 13 needs to be 0.2% or more, while the upper limit is restricted by the growth method, and the upper limit is 1.5% in the molecular beam epitaxial growth method. .

According to the compound semiconductor substrate (1) having the above structure, a group III-V compound semiconductor containing the group V atom in excess of 0.2% or more and 1.5% or less of the group III atom. A part of the group V atoms can be aggregated / precipitated in the layer, and the group V atom particles thus aggregated / precipitated cause Si
Dislocations generated at the interface between the substrate and the III-V group compound semiconductor layer epitaxially grown on the Si substrate can be pinned. Therefore, the group III-V compound semiconductor layer containing an excess of the group V atom causes
Propagation of dislocations to the surface of the II-V compound semiconductor layer can be blocked, and as a result, the dislocation density near the surface of the III-V compound semiconductor layer can be reduced. Further, since the III-V group compound semiconductor layer containing excess V group atoms does not contain atoms other than the constituent elements of the compound semiconductor layer, the influence on the band structure of the III-V group compound semiconductor layer is reduced. At the same time, the change in carrier concentration can be reduced, so that a high quality compound semiconductor substrate having excellent electrical characteristics can be obtained.

The step of excessively incorporating the group V atom in the method (2) for manufacturing the compound semiconductor substrate having the above-mentioned structure is easily carried out by employing the molecular beam epitaxy method, and the excess amount of the group V atom is reduced. It can be easily controlled by setting the growth temperature. By carrying out the method (2) for manufacturing a compound semiconductor substrate having the above structure, the compound semiconductor substrate (1) can be easily manufactured.

Further, by the above-mentioned method (3) for manufacturing a compound semiconductor substrate, it is possible to form a larger precipitate of the group V atom in the III-V group compound semiconductor layer containing the group V atom in excess. As a result, it is possible to manufacture a compound semiconductor substrate in which the dislocation propagation is further prevented and the dislocation density near the surface of the III-V compound semiconductor layer is further reduced.

[0017]

EXAMPLES AND COMPARATIVE EXAMPLES Examples of a compound semiconductor substrate and a method for manufacturing the same according to the present invention will be described below with reference to the drawings. FIG. 1 is a cross-sectional view schematically showing Example 1 of the compound semiconductor substrate according to the present invention, in which 11 indicates a Si substrate. GaA having a thickness of about 1 μm is formed on the Si substrate 11.
An s layer 12 is formed, and a GaAs layer 1 having a thickness of about 0.2 μm and containing As in an excess of about 0.4% is formed on the GaAs layer 12.
3 is formed. The thickness is about 2 on the GaAs layer 13.
A GaAs layer 14 having a thickness of μm is formed, and the Si substrate 11, the GaAs layers 12, 14, and Ga containing excess As
The compound semiconductor substrate 10 is configured to include the As layer 13.

When the compound semiconductor substrate 10 having such a structure is manufactured, solid As and solid Ga are used as vapor deposition sources and grown by the molecular beam epitaxy method. First, Si whose plane orientation is the (001) plane and is inclined by 2 ° in the [110] direction
After cleaning the substrate with about 1% hydrofluoric acid (HF), insert it into the molecular beam epitaxy chamber and heat it to about 900 ° C for S
The oxide film on the surface of the i substrate 11 is cleaned by evaporation. Next, the molecular beam intensity ratio of As to Ga is set to about 20, the growth temperature is set to about 400 ° C., and the growth rate is set to about 0.3 μm / h by the two-step growth method. A GaAs layer (initial layer) 12a of about 100 nm is grown. Next, the molecular beam intensity ratio of As to Ga is about 2
0, the growth temperature is about 600 ° C., the growth rate is about 1 μm / h, and the thickness is about 900 nm.
b is grown to form a GaAs layer 12 having a total thickness of about 1 μm. Next, the molecular beam intensity ratio of As to Ga is set to about 20, the growth temperature is set to about 200 ° C., the growth rate is set to about 1 μm / h, and the thickness of the GaAs layer 12 containing As in excess is about 0.2 μm. GaAs layer 13 is epitaxially grown. Next, the molecular beam intensity ratio of As to Ga is about 20,
The growth temperature is set to about 600 ° C., the growth rate is set to about 1 μm / h, and the Ga on the GaAs layer 13 is about 2 μm thick.
The As layer 14 is epitaxially grown.

As a result of measuring the excess As amount in the GaAs layer 13 of the compound semiconductor substrate 10 manufactured by the above method, it was about 0.4%. This excess As
The amount of the GaAs layer 13 was measured by X-ray diffraction based on the relationship between the excess As amount and the elongation of the lattice constant (Thin Solid Films: 231 (1993) 61-73 Fig. 3) that had already been obtained.
It was calculated from the lattice constant of.

The results of measuring the dislocation density and carrier concentration of the compound semiconductor substrate according to Example 1 will be described below. The sample was immersed in molten potassium hydroxide (KOH) whose dislocation density was kept at about 350 ° C for about 30 seconds, and the GaAs layer 1
4 It was calculated from the number of pits per unit area that appeared on the surface.
The carrier concentration was determined by measuring the capacity-voltage. As Comparative Example 1, GaA in the compound semiconductor substrate 10 was used.
The thing in which the s layer 13 was not formed was used. In addition, as Comparative Example 2, the GaAs layer 1 in the compound semiconductor substrate 10
Instead of 3, a superlattice layer having a thickness of about 0.3 μm was used. This superlattice layer is formed by alternately growing an In _0.1 Ga _0.9 As layer having a thickness of about 20 nm and a GaAs layer having a thickness of about 10 nm by a molecular beam epitaxial method, and stacking about 10 layers of In _0.1 Ga _0.9 As.
The layer was grown by setting the molecular beam intensity ratio of As to Ga to about 18, the growth temperature to about 550 ° C., and the growth rate to about 1.1 μm / h. Further, as Comparative Example 3, a compound semiconductor substrate 10 in which a Si-doped layer having a thickness of about 0.2 μm was inserted instead of the GaAs layer 13 was used. This Si-doped layer was formed by molecular beam epitaxy to obtain about 3 × 10 ²⁰ Si / cm ^{3 in} the GaAs layer.
Was grown including.

FIG. 2 is a graph showing the measurement results of dislocation density on the GaAs layer surface of the compound semiconductor substrates according to Example 1 and Comparative Examples 1 to 3. The dislocation density of the compound semiconductor substrate 10 according to Example 1 is about 5 × 10 ⁶ cm ⁻² ,
This is smaller than that in the case of Comparative Example 1 in which the GaAs layer 13 containing excess As is not formed (about 3 × 10 ⁷ cm ⁻² ). Further, the dislocation density of the compound semiconductor substrate 10 according to Example 1 is about the same as that of the compound semiconductor substrate 10 according to Comparative Example 2 in which the superlattice layer is inserted (about 4 × 10 ⁶ cm ⁻² ),
Also, it was somewhat larger than that of Comparative Example 3.

FIG. 3 is a curve diagram showing the relationship between the electron concentration and the distance from the surface of the compound semiconductor substrate. FIG. 3 (a) relates to Example 1 and FIG. 3 (b) relates to Comparative Example 3. The case is shown. As is clear from FIG. 3, the case of Example 1 exhibits n-type, and the portion of the GaAs layer 13 containing excess As has a low electron concentration (high resistance) of 10 ¹³ cm ⁻³ or less. , Therefore the GaAs layer 14
It is possible to easily separate the transistor elements formed in the above. On the other hand, in the case of the comparative example 3, it was found that Si in the Si-doped layer diffused to the surface layer and showed an n-type, which was likely to adversely affect the GaAs layer for forming the device.

As is clear from these results, in the compound semiconductor substrate 10 according to Example 1, some of the As atoms are aggregated / precipitated in the GaAs layer 13 containing an excess of about 0.4% As atoms. It is possible that this aggregated / precipitated A
The s-grains can pin the dislocations generated at the interface between the Si substrate 11 and the epitaxially grown GaAs layer 12. Therefore, G containing excess As atoms
Propagation of dislocations to the surface of the GaAs layer 14 can be blocked by the aAs layer 13, and as a result, the GaAs layer 1
4 The dislocation density near the surface can be reduced.
Further, since the GaAs layer 13 containing excess As atoms does not contain atoms other than the constituent elements, it has a small effect on the band structure of the GaAs layer 14, a small change in carrier concentration, and high quality with excellent electrical characteristics. The compound semiconductor substrate can be obtained.

Further, the compound semiconductor substrate 10 according to the first embodiment.
In the manufacturing method described above, the step of excessively incorporating As atoms can be easily performed by adopting the molecular beam epitaxy method, and the excess amount of As atoms can be easily controlled by setting the growth temperature. . Therefore, compound semiconductor substrate 10 can be easily manufactured by carrying out this manufacturing method.

Next, the compound semiconductor substrates according to Examples 2 to 7 are the compound semiconductor substrate 10 according to Example 1 shown in FIG.
It has a configuration substantially similar to. However, when the GaAs layer 13 containing excess As is epitaxially grown, the growth temperature is changed from about 180 ° C. to about 250 ° C., so that the excess As amount ranges from about 0.2% to about 1.5%. The difference is that it is related to Example 1. The results of measuring the dislocation density on the surface of the GaAs layer 14 in the compound semiconductor substrates according to Examples 2 to 7 will be described below. As a comparative example, the As atom is about 0.1.
% Excess was also produced.

FIG. 4 is a curve diagram showing the relationship between the dislocation density and the excess As amount. As is clear from this figure, the dislocation density is higher in the comparative example in which the excess As amount is 0.1%. About 2x
Although it was as high as 10 ⁶ cm ⁻² , the dislocation density was low in Examples 2 to 7 containing an excessive amount of As atoms in the range of about 0.2% to about 1.5%.

Next, the compound semiconductor substrate according to Example 8 is
It has substantially the same configuration as the compound semiconductor substrate 10 according to the first embodiment shown in FIG. However, the GaAs layer 13 is epitaxially grown, and then the GaAs layer 14 is continuously grown.
Prior to the growth, a heat treatment step was performed at about 700 ° C., which is higher than the growth temperature of the GaAs layer 14, for about 10 minutes (excluding the temperature rise and fall times). FIG. 5 is a diagram showing a heat pattern of the compound semiconductor substrate according to Example 8. During this heat treatment, a flux of As was irradiated to prevent As from evaporating from the surface of the GaAs layer 13.

As a result of measuring the dislocation density on the surface of the compound semiconductor substrate according to Example 8 which has been subjected to this heat treatment, it is 2 × 10 ⁶ cm as compared with 5 × 10 ⁶ cm ⁻² of Example 1 which is not subjected to the heat treatment. Reduced to ^-2 .

As is clear from the above results, in the compound semiconductor substrate according to the eighth embodiment, the same effect as in the first embodiment can be obtained, and at the same time, the GaAs layer 13 containing an excessive amount of As atoms contains one As atom. It is possible to further agglomerate the parts and deposit a large precipitate, and as a result, it is possible to further enhance the dislocation propagation preventing effect, and thus it is possible to further reduce the dislocation density near the surface of the GaAs layer 14. In addition, this heat treatment temperature can
No., pp126-133, 1992), the temperature could be set lower, and the growth time could be shortened and the heater power could be saved.

In each of the above embodiments, GaA is used.
The case where the GaAs layer 13 containing excess As is epitaxially grown between the s layers 12 and 14 has been described, but in another embodiment, the G layer is replaced with G instead of the GaAs layers 12 and 14.
Another III-V group compound semiconductor layer such as an aP layer or an InGaAs layer is epitaxially grown, and a GaP layer or an InGaAs layer containing excess group V atoms such as P or As instead of the GaAs layer 13 containing excess As. Another i such as
The II-V group compound semiconductor layer may be epitaxially grown.

In each of the above-described embodiments, the case where one GaAs layer 13 is epitaxially grown has been described, but in another embodiment, this may be two or more layers.

[0032]

As described in detail above, in the compound semiconductor substrate (1) according to the present invention, the compound semiconductor substrate is composed of the same constituent elements as the III-V group compound semiconductor layer, and the V-group atom is larger than the III-group atom. Is included in excess of 0.2% to 1.5% I
Since at least one II-V group compound semiconductor layer is included, the number of the group V atoms is 0.2, compared with the number of the group III atoms.
% -1.5% or less, a part of the group V atoms can be aggregated / precipitated in the III-V group compound semiconductor layer, and the group / group V atomic particles thus aggregated / precipitated cause S
The i substrate and the above-described epitaxially grown Si substrate
Dislocations generated at the interface with the III-V group compound semiconductor layer can be pinned. Therefore, the group III-V compound semiconductor layer containing the group V atoms in excess is used to form the group III-V compound semiconductor layer.
Propagation of dislocations to the surface of the -V compound semiconductor layer can be blocked, and as a result, the dislocation density near the surface of the III-V compound semiconductor layer can be reduced.
In addition, since the III-V group compound semiconductor layer containing an excessive amount of V group atoms does not contain atoms other than the constituent elements,
The influence on the band structure of the II-V group compound semiconductor layer can be reduced, and the change in carrier concentration can also be reduced, so that a high quality compound semiconductor substrate having excellent electrical characteristics can be obtained. .

In the method (2) for producing a compound semiconductor substrate, the group V atom is excessively incorporated in the range of 0.2% or more and 1.5% or less as compared with the group III atom, and the group V atom is contained. Since at least one III-V group compound semiconductor layer containing excess V is grown, the step of incorporating V group atoms in excess can be easily performed by employing a molecular epitaxy method. The excess amount of group atoms can be easily controlled by setting the growth temperature. Therefore, by carrying out this manufacturing method, the compound semiconductor substrate (1) can be easily manufactured.

In addition, in the method (3) for manufacturing a compound semiconductor substrate, the group I atom containing an excessive amount of group V atoms as compared with the group III atom is used.
After the II-V group compound semiconductor layer is epitaxially grown, a heat treatment step is performed at a temperature higher than the growth temperature of the III-V group compound semiconductor layer to be grown thereafter. A larger precipitate of the group V atom can be formed in the group-V compound semiconductor layer, and as a result, dislocation propagation can be further prevented, and the vicinity of the surface of the group-III-V compound semiconductor layer can be prevented. It is possible to manufacture a compound semiconductor substrate having a further reduced dislocation density.

[Brief description of drawings]

FIG. 1 is a sectional view schematically showing Example 1 of a compound semiconductor substrate according to the present invention.

FIG. 2 is a graph showing the measurement results of dislocation density on the GaAs layer surface of the compound semiconductor substrates according to Example 1 and Comparative Examples 1 to 3.

FIG. 3 is a curve diagram showing the relationship between carrier concentration and the distance from the surface of the compound semiconductor substrate, where (a) shows the case of Example 1 and (b) shows the case of Comparative Example 3. .

FIG. 4 is a curve diagram showing the relationship between the dislocation density and the excess As amount contained in the compound semiconductor substrates of Examples 2 to 7 and Comparative Example.

5 is a diagram showing a heat pattern of a compound semiconductor substrate according to Example 8. FIG.

FIG. 6 is a GaAs layer epitaxially grown on a Si substrate, and GaA containing excess As in the GaAs layer.
FIG. 4 is a schematic cross-sectional view shown for explaining propagation of dislocations in a compound semiconductor substrate including one s layer.

[Explanation of Codes] 10 Compound semiconductor substrate 11 Silicon substrate 12 GaAs layer 13 GaAs layer containing excess As 14 GaAs layer

Claims (3)

[Claims] 1. A compound semiconductor substrate having a III-V group compound semiconductor layer epitaxially grown on a silicon substrate, comprising the same constituent element as the III-V group compound semiconductor layer, and having a V group group as compared with a III group atom. 0.2% of atoms
A compound semiconductor substrate comprising at least one III-V compound semiconductor layer which is excessively contained in the range of 1.5% or less. 2. A method for manufacturing a compound semiconductor substrate in which a group III-V compound semiconductor layer is epitaxially grown on a silicon substrate, the group V atom being 0.2% compared to the group III atom.
% Or more and 1.5% or less, and a step of growing a III-V group compound semiconductor layer containing a group V atom in an excessive amount, and growing the compound semiconductor substrate. 3. A group III-V compound semiconductor layer containing group V atoms in excess of group III atoms is epitaxially grown and then grown at a temperature higher than the growth temperature of the group III-V compound semiconductor layer grown thereafter. The method of manufacturing a compound semiconductor substrate according to claim 2, wherein the heat treatment step is performed.