JP4216580B2 - ZnTe compound semiconductor surface treatment method and semiconductor device manufacturing method - Google Patents
ZnTe compound semiconductor surface treatment method and semiconductor device manufacturing method Download PDFInfo
- Publication number
- JP4216580B2 JP4216580B2 JP2002380757A JP2002380757A JP4216580B2 JP 4216580 B2 JP4216580 B2 JP 4216580B2 JP 2002380757 A JP2002380757 A JP 2002380757A JP 2002380757 A JP2002380757 A JP 2002380757A JP 4216580 B2 JP4216580 B2 JP 4216580B2
- Authority
- JP
- Japan
- Prior art keywords
- surface treatment
- substrate
- znte
- compound semiconductor
- atomic hydrogen
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Description
【０００１】
【発明の属する技術分野】
本発明は、ＩＩ−ＶＩ族化合物半導体基板の表面処理方法および該基板上に分子線エピタキシー法によりエピタキシャル層を成長させる半導体装置の製造方法に関する。
【０００２】
【従来の技術】
周期表第１２（２Ｂ）族元素および第１６（６Ｂ）族元素からなる化合物半導体（以下、ＩＩ−ＶＩ族化合物半導体と称する）結晶は、構成元素の組成比を変えることで種々の禁制帯幅を実現できるため光学的特性も多様である。従って、構成元素の組成比を調整して禁制帯幅を制御することにより所望の波長の光を得ることが可能となるため、発光素子の材料として利用されている。
【０００３】
また、高効率の発光特性を有する発光素子を実現するためには高キャリア濃度のＩＩ−ＶＩ族化合物半導体が必要とされる。そして、効率よく不純物をドーピングするために分子線エピタキシー法（以下、ＭＢＥと称する）等のエピタキシャル成長技術が一般的に用いられている。
【０００４】
さらに、ＩＩ−ＶＩ族化合物半導体のキャリア濃度を向上させるための技術として、プレーナ・ドーピング法を利用した製造方法が提案されている（例えば、特許文献１，非特許文献１）。ここで、プレーナ・ドーピング法とは、結晶成長とドーパントの堆積とを交互に繰り返すことによって、膜厚方向のある特定の結晶表面上に選択的にドーピングを行う方法である。前記特許文献１，非特許文献２では、ＺｎＳｅ基板を用いてＭＢＥ法により該基板にＺｎを照射しながら窒素ドーピングを行うことでＺｎ安定化面に窒素を高濃度でドーピングし、高キャリア濃度のｐ型ＺｎＳｅ化合物半導体を実現している。
【０００５】
ところで、近年では、量子効果を積極的に活用した量子効果デバイス (量子細線、量子ドットなど) の研究開発が積極的に実施され、これにより従来よりも発光効率の良い発光素子の実現が期待されている。
【０００６】
また、プレーナ・ドーピングや量子効果デバイスの実現には基板表面の平坦性が重要であり、特に、量子ドット等の形成には原子レベルで見て平坦な基板表面が必要であり１原子層以下の表面平坦性が得られるのが理想的ではあるが、基板表面の凹凸の差の最大値は２ｎｍ以下であることが望ましい。
【０００７】
従来は、ＩＩ−ＶＩ族系化合物半導体結晶を基板として、該基板上に良好なエピタキシャル層を成長させるために、例えばＨＦ（フッ化水素）により基板の表面を清浄化する表面処理が行われていた。しかし、量子ドット等に利用しうる微細なエピタキシャル層を均一に成長させるためには基板表面の平坦性が十分ではなかった。
【０００８】
そこで、化合物半導体の表面処理方法として、原子状水素を用いた清浄化方法が提案された（例えば、非特許文献２）。前記非特許文献２には、ＧａＡｓ基板の（００１）面に原子状水素を照射しながら低温で清浄化し、その後に高温で表面の平坦化する技術が開示されている。そして、前記非特許文献２では、ＧａＡｓ基板表面を原子的に平坦な状態にできることが報告されている。加えて、この原子状水素による表面処理は、比較的低温で半導体表面の清浄化が可能であるという点で有用とされている。
【０００９】
また、上述した原子状水素による表面処理方法は、前記文献にあるＧａＡｓ基板に限らず、ＩＩ−ＶＩ族化合物半導体の一つであるＺｎＳｅ基板の表面処理方法としても一般的に行われている。
【００１０】
【特許文献１】
特開平６−２１６１６５号公報
【００１１】
【非特許文献１】
Appl. Phys. Left. 53(21), 21 November 1988
【００１２】
【非特許文献２】
Jpn. J. Appl. Phys. Vol.36 (1997) pp. L1367-L1369
【００１３】
【発明が解決しようとする課題】
しかしながら、本発明者等が、ＺｎＴｅ基板において、上述したような原子状水素による表面処理を適応したところ、目的とする平坦な基板表面を得ることができなかった。つまり、ＺｎＴｅ基板に原子状水素による表面処理を施しても基板表面の凹凸の差の最大値を２ｎｍ以下とすることができず、従来の表面処理方法では微細エピタキシャル層を成長させるのに十分な平坦性を有する基板表面を得ることは困難であることが明らかとなった。
【００１４】
そこで本発明は、量子ドット等に利用しうる微細なエピタキシャル層を成長させるのに適した基板表面を実現できるＺｎＴｅ系化合物半導体基板の表面処理方法、および該基板を用いた半導体装置の製造方法を提供することを目的とする。
【００１５】
【課題を解決するための手段】
本発明は、上記目的を達成するために、ＺｎＴｅ系化合物半導体の表面処理において、ＺｎＴｅ系化合物半導体基板に少なくともＺｎおよび原子状水素を照射しながら１５０℃から３００℃の温度範囲で所定の時間アニールする第１の表面処理工程を少なくとも有するようにしたものである。
【００１６】
これにより、ＺｎＴｅ系化合物半導体について基板表面の平坦性を向上することができる。具体的には、基板表面の凹凸の差の最大値を２ｎｍ以下とすることができる。ここで、基板表面の凹凸の差の最大値とは、ＡＦＭにより基板表面の任意の１ミクロン四方を測定したときの、その面内の一番高いところと一番低いところの差であり、それが２ｎｍ以下の範囲に入っていることを意味している。
【００１７】
なお、表面処理温度の下限は特に制限されないが、１５０℃以下の低温ではアニール効果が得られるのに長時間を要するので工業的に適切でない。また、３００℃以上でアニールすると基板表面が荒れるために表面処理温度の上限を３００℃とした。また、表面処理時間は、５分以下とすると効果がなく、あまりにも長時間とするのは工業的ではないので、５分〜２時間の範囲とするのが望ましい。
【００１８】
また、照射する原子状水素の量（圧力）は、表面処理の効果が得られる量以上とすればよいが、真空装置の負担を増大させないように上限を設定するべきである。同様にＺｎの照射量も基板表面が荒れないこと、真空装置の負担を増大させないことを考慮して設定するのが望ましい。
【００１９】
さらに、前記第１の表面処理工程の前に、前記ＺｎＴｅ系化合物半導体基板に原子状水素を照射しながら８０℃から１５０℃の温度範囲で所定の時間アニールする第２の表面処理工程を有するようにした。
【００２０】
これにより、基板表面から酸化膜や炭素等の不純物を効果的に除去することができ、基板表面を清浄化することができる。なお、基板表面の清浄化の効果と工業的見地から第１の処理工程と同様に、表面処理時間は５分〜２時間の範囲とするのが望ましい。
【００２１】
また、ＺｎＴｅ系化合物半導体基板に上述した表面処理を施した後、該基板上に分子線エピタキシー法によりエピタキシャル層を成長させることにより、量子ドット等に利用しうる微細エピタキシャル層を成長させることができる。したがって、従来よりも発光効率の良い発光素子を作製することが可能となる。
【００２２】
【発明の実施の形態】
以下、本発明の好適な実施の形態を、ＺｎＴｅ化合物半導体単結晶をエピタキシャル成長用基板とする場合について説明する。本実施形態では、ＺｎＴｅ単結晶を成長用基板として、分子線エピタキシー法により該基板上にＺｎＴｅ化合物半導体結晶をエピタキシャル成長させた。
【００２３】
ここで、結晶成長装置には公知のＭＢＥ装置を用いたのでその詳細な説明は省略する（特許文献１の図１参照）。本実施形態では原子状水素による表面処理を行うため、結晶成長装置内には水素ガスをクラッキングして原子状水素を生成するためのタングステンからなるフィラメントが設けられるとともに、成長装置内に弁を介して水素ガス源が接続されている点が前記特許文献１の装置構成と異なる。
【００２４】
（実施例）
本実施例では、エピタキシャル成長の前処理としてＺｎＴｅ単結晶基板に図１に示す表面処理を施した。具体的には、図１に示す表面処理工程は、ＺｎＴｅ単結晶基板に原子状水素のみを照射する工程Ａと原子状水素およびＺｎを照射する工程Ｂとを有する。
【００２５】
まず、融液成長法で得られたＺｎＴｅ単結晶インゴットを、厚さ０．８ｍｍにスライスし、ラッピング後、３％のＢｒ−メタノールで１分間エッチングを施した。そして、該ＺｎＴｅ単結晶基板を基板ホルダに固定した。
【００２６】
次に、所定の圧力まで真空排気したＭＢＥ装置内に、ＺｎＴｅ単結晶基板を固定した基板ホルダを搬送し、該基板と分子線源が対向する位置となるように固定した。ここで、本実施形態では、ＺｎとＴｅをＭＢＥ装置の成長室内に設けられたルツボに収納して分子線源とした。
【００２７】
次に、基板温度を１００℃に加熱し、タングステンフィラメントを加熱することで得られる原子状水素を装置内圧力が１×１０−５Ｔｏｒｒとなるように導入し、この原子状水素をＺｎＴｅ基板に照射しながら表面処理を３０分間行った（工程Ａ）。
【００２８】
その後、基板を２３０℃に加熱し、上記圧力と同じ原子状水素を導入しながら基板に向けてＺｎ分子線を照射し、この原子状水素とＺｎ照射による表面処理を３０分間行った（工程Ｂ）。このときのＺｎ分子線の強度は、ビームモニタ値で１×１０−８Ｔｏｒｒであった。
【００２９】
上述した２段階の表面処理工程を行った後、原子間力顕微鏡（Atomic Force Microscope;AFM）により基板表面を観察したところ、凹凸の差の最大値は２ｎｍ以下であった。
【００３０】
さらに、ＺｎＴｅ単結晶基板に上記表面処理を施した後、成長温度（基板温度）を３００℃にし、ＴｅとＺｎの分子線を交互に照射し（Atomic Layer Epitaxy;ALE）、ＺｎＴｅのバッファー層を形成した。そののち、ＺｎＴｅとは格子定数が異なるＣｄＳを２ＭＬ成長した。成長後、基板表面をＡＦＭで観察した結果、ＣｄＳの量子ドットが形成されていることを確認した。
【００３１】
（比較例）
比較例では、エピタキシャル成長の前処理としてＺｎＴｅ単結晶基板に原子状水素のみによる表面処理工程を行った。つまり、図１の工程ＢにおいてＺｎ照射を行わないようにした。なお、基板温度および処理時間は実施例と同じで図１に示すとおりである。その結果、得られたＺｎＴｅ基板表面は凹凸の差の最大値が４ｎｍ以上の値となり、また、１０ｎｍ程度の大きな突起が存在した。
【００３２】
さらに、ＺｎＴｅ単結晶基板に上記表面処理を施した後にＭＢＥ法により上記実施例と同様のエピタキシャル層を成長させたが、上記実施例で得られたＣｄＳの量子ドットをＡＦＭで確認することができなかった。
【００３３】
以上本発明者によってなされた発明を実施例に基づき具体的に説明したが、本発明は上記実施例に限定されるものではない。
例えば、図１の工程Ｂにおける処理条件は、処理時間を５分〜２時間の範囲、処理温度を１５０℃〜３００℃の範囲、で適当に変更しても同様の効果を得ることができる。また、図１の工程Ａ，Ｂにおいて照射する原子状水素の量（圧力）は、効率よく基板表面の清浄化および平坦化を行うために１×１０−６ Ｔｏｒｒ以上とし、真空装置の負担を増大させないように１×１０−４ Ｔｏｒｒ以下とするのがよい。また、工程Ｂで照射するＺｎの量（圧力）は、基板表面に荒れが生じないこと、および真空装置の負担を考慮して決定するべきである。
【００３４】
また、本発明の表面処理方法はＺｎＴｅ単結晶を基板として用いた場合に制限されず、その他のＺｎＴｅ系化合物半導体を基板とする場合にも適用できる。例えば、表面処理工程において原子状水素と同時に照射する分子線源を適当に選択すれば、ＩＩ−ＶＩ族化合物半導体やＩＩＩ−Ｖ族化合物半導体を基板とする場合の表面処理にも応用できる可能性がある。
【００３５】
【発明の効果】
本発明によれば、ＺｎＴｅ系化合物半導体の表面処理において、ＺｎＴｅ系化合物半導体基板に少なくともＺｎおよび原子状水素を照射しながら１５０℃から３００℃の温度範囲でアニールする第１の表面処理工程を少なくとも有するようにしたので、基板表面の平坦性を向上でき、該基板上に量子ドット等に利用しうる微細エピタキシャル層を均一に成長させることができるという効果を奏する。
【図面の簡単な説明】
【図１】本実施形態に係る表面処理工程の温度プロファイルを示す説明図である。[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a surface treatment method for a II-VI group compound semiconductor substrate and a method for manufacturing a semiconductor device in which an epitaxial layer is grown on the substrate by molecular beam epitaxy.
[0002]
[Prior art]
A compound semiconductor (hereinafter referred to as a II-VI group compound semiconductor) crystal composed of Group 12 (2B) group element and Group 16 (6B) group element of the periodic table has various forbidden band widths by changing the composition ratio of the constituent elements. The optical characteristics are also diverse. Accordingly, light having a desired wavelength can be obtained by adjusting the compositional ratio of the constituent elements to control the forbidden band width, and therefore, it is used as a material for a light-emitting element.
[0003]
In addition, a high carrier concentration II-VI group compound semiconductor is required to realize a light-emitting element having high-efficiency light emission characteristics. In order to dope impurities efficiently, an epitaxial growth technique such as molecular beam epitaxy (hereinafter referred to as MBE) is generally used.
[0004]
Furthermore, as a technique for improving the carrier concentration of the II-VI group compound semiconductor, a manufacturing method using a planar doping method has been proposed (for example, Patent Document 1, Non-Patent Document 1). Here, the planar doping method is a method of selectively performing doping on a specific crystal surface in the film thickness direction by alternately repeating crystal growth and dopant deposition. In Patent Document 1 and Non-Patent Document 2, by using a ZnSe substrate and performing nitrogen doping while irradiating the substrate with Zn by MBE method, the Zn stabilization surface is doped with nitrogen at a high concentration, and a high carrier concentration is obtained. A p-type ZnSe compound semiconductor is realized.
[0005]
By the way, in recent years, research and development of quantum effect devices (quantum wires, quantum dots, etc.) that actively utilize the quantum effect have been actively carried out. ing.
[0006]
In addition, the planarity of the substrate surface is important for the realization of planar doping and quantum effect devices. In particular, the formation of quantum dots and the like requires a flat substrate surface as viewed at the atomic level and is less than one atomic layer. Although it is ideal that surface flatness is obtained, it is desirable that the maximum difference in unevenness on the substrate surface is 2 nm or less.
[0007]
Conventionally, in order to grow a good epitaxial layer on a II-VI group compound semiconductor crystal as a substrate, surface treatment for cleaning the surface of the substrate with, for example, HF (hydrogen fluoride) has been performed. It was. However, the flatness of the substrate surface has not been sufficient for uniformly growing a fine epitaxial layer that can be used for quantum dots or the like.
[0008]
Therefore, a cleaning method using atomic hydrogen has been proposed as a surface treatment method for compound semiconductors (for example, Non-Patent Document 2). Non-Patent Document 2 discloses a technique of cleaning a (001) surface of a GaAs substrate at a low temperature while irradiating atomic hydrogen, and then flattening the surface at a high temperature. And in the said nonpatent literature 2, it is reported that the GaAs substrate surface can be made into an atomically flat state. In addition, the surface treatment with atomic hydrogen is useful in that the semiconductor surface can be cleaned at a relatively low temperature.
[0009]
Further, the above-described surface treatment method using atomic hydrogen is not limited to the GaAs substrate described in the above literature, but is generally performed as a surface treatment method for a ZnSe substrate which is one of II-VI group compound semiconductors.
[0010]
[Patent Document 1]
JP-A-6-216165 gazette
[Non-Patent Document 1]
Appl. Phys. Left. 53 (21), 21 November 1988
[0012]
[Non-Patent Document 2]
Jpn. J. Appl. Phys. Vol. 36 (1997) pp. L1367-L1369
[0013]
[Problems to be solved by the invention]
However, when the present inventors applied surface treatment with atomic hydrogen as described above to a ZnTe substrate, the intended flat substrate surface could not be obtained. In other words, even if a surface treatment with atomic hydrogen is performed on a ZnTe substrate, the maximum difference in unevenness on the substrate surface cannot be reduced to 2 nm or less, and the conventional surface treatment method is sufficient to grow a fine epitaxial layer. It became clear that it was difficult to obtain a substrate surface having flatness.
[0014]
Accordingly, the present invention provides a surface treatment method for a ZnTe-based compound semiconductor substrate capable of realizing a substrate surface suitable for growing a fine epitaxial layer that can be used for quantum dots and the like, and a method for manufacturing a semiconductor device using the substrate. The purpose is to provide.
[0015]
[Means for Solving the Problems]
In order to achieve the above object, according to the present invention, in the surface treatment of a ZnTe compound semiconductor, annealing is performed for a predetermined time in a temperature range of 150 ° C. to 300 ° C. while irradiating at least Zn and atomic hydrogen to the ZnTe compound semiconductor substrate. The first surface treatment step is performed at least.
[0016]
Thereby, the flatness of the substrate surface of the ZnTe-based compound semiconductor can be improved. Specifically, the maximum value of the unevenness on the substrate surface can be 2 nm or less. Here, the maximum difference in unevenness on the substrate surface is the difference between the highest and lowest points in the surface when measuring any 1 micron square on the substrate surface by AFM. In the range of 2 nm or less.
[0017]
The lower limit of the surface treatment temperature is not particularly limited, but is not industrially suitable at a low temperature of 150 ° C. or lower because it takes a long time to obtain the annealing effect. Moreover, since the substrate surface is roughened when annealing is performed at 300 ° C. or higher, the upper limit of the surface treatment temperature is set to 300 ° C. Further, if the surface treatment time is 5 minutes or less, there is no effect and it is not industrial to make it too long, so it is desirable that the surface treatment time be in the range of 5 minutes to 2 hours.
[0018]
Further, the amount (pressure) of atomic hydrogen to be irradiated may be equal to or more than an amount capable of obtaining the effect of the surface treatment, but the upper limit should be set so as not to increase the burden on the vacuum apparatus. Similarly, it is desirable to set the Zn irradiation amount in consideration of the fact that the substrate surface is not roughened and the burden on the vacuum apparatus is not increased.
[0019]
Furthermore, before the first surface treatment step, a second surface treatment step is performed in which the ZnTe-based compound semiconductor substrate is annealed for a predetermined time in a temperature range of 80 ° C. to 150 ° C. while being irradiated with atomic hydrogen. I made it.
[0020]
Thereby, impurities such as an oxide film and carbon can be effectively removed from the substrate surface, and the substrate surface can be cleaned. In addition, it is desirable that the surface treatment time be in the range of 5 minutes to 2 hours as in the first treatment step from the effect of cleaning the substrate surface and from an industrial viewpoint.
[0021]
In addition, after the surface treatment described above is performed on the ZnTe-based compound semiconductor substrate, a fine epitaxial layer that can be used for quantum dots or the like can be grown on the substrate by growing an epitaxial layer by molecular beam epitaxy. . Therefore, a light-emitting element with higher light emission efficiency than the conventional one can be manufactured.
[0022]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, a preferred embodiment of the present invention will be described in the case where a ZnTe compound semiconductor single crystal is used as an epitaxial growth substrate. In this embodiment, a ZnTe single crystal was used as a growth substrate, and a ZnTe compound semiconductor crystal was epitaxially grown on the substrate by molecular beam epitaxy.
[0023]
Here, since the well-known MBE apparatus was used for the crystal growth apparatus, the detailed description is abbreviate | omitted (refer FIG. 1 of patent document 1). In this embodiment, in order to perform surface treatment with atomic hydrogen, a filament made of tungsten for cracking hydrogen gas to generate atomic hydrogen is provided in the crystal growth apparatus, and a valve is provided in the growth apparatus via a valve. The point that the hydrogen gas source is connected is different from the apparatus configuration of Patent Document 1.
[0024]
(Example)
In this example, the ZnTe single crystal substrate was subjected to the surface treatment shown in FIG. 1 as a pretreatment for epitaxial growth. Specifically, the surface treatment step shown in FIG. 1 includes a step A in which only the atomic hydrogen is irradiated onto the ZnTe single crystal substrate and a step B in which the atomic hydrogen and Zn are irradiated.
[0025]
First, a ZnTe single crystal ingot obtained by the melt growth method was sliced to a thickness of 0.8 mm, lapped, and then etched with 3% Br-methanol for 1 minute. Then, the ZnTe single crystal substrate was fixed to a substrate holder.
[0026]
Next, the substrate holder on which the ZnTe single crystal substrate was fixed was transported into the MBE apparatus evacuated to a predetermined pressure, and fixed so that the substrate and the molecular beam source faced each other. Here, in the present embodiment, Zn and Te are housed in a crucible provided in the growth chamber of the MBE apparatus to form a molecular beam source.
[0027]
Next, the atomic temperature obtained by heating the substrate temperature to 100 ° C. and heating the tungsten filament is introduced so that the internal pressure becomes 1 × 10 −5 Torr, and this atomic hydrogen is introduced into the ZnTe substrate. Surface treatment was performed for 30 minutes while irradiating (Step A).
[0028]
After that, the substrate was heated to 230 ° C., and Zn molecular beam was irradiated toward the substrate while introducing atomic hydrogen having the same pressure as described above, and surface treatment was performed for 30 minutes by this atomic hydrogen and Zn irradiation (step B). ). The intensity of the Zn molecular beam at this time was 1 × 10 −8 Torr as a beam monitor value.
[0029]
After performing the above-described two-step surface treatment process, the substrate surface was observed with an atomic force microscope (AFM). As a result, the maximum unevenness difference was 2 nm or less.
[0030]
Further, after the above surface treatment is performed on the ZnTe single crystal substrate, the growth temperature (substrate temperature) is set to 300 ° C., and Te and Zn molecular beams are alternately irradiated (Atomic Layer Epitaxy; ALE), and the ZnTe buffer layer is formed. Formed. After that, 2 ML of CdS having a lattice constant different from that of ZnTe was grown. After the growth, the surface of the substrate was observed with AFM, and it was confirmed that CdS quantum dots were formed.
[0031]
(Comparative example)
In the comparative example, a surface treatment process using only atomic hydrogen was performed on a ZnTe single crystal substrate as a pretreatment for epitaxial growth. That is, Zn irradiation was not performed in step B of FIG. The substrate temperature and processing time are the same as in the example and are as shown in FIG. As a result, the surface of the obtained ZnTe substrate had a maximum unevenness value of 4 nm or more, and there were large protrusions of about 10 nm.
[0032]
Furthermore, after the surface treatment was performed on the ZnTe single crystal substrate, an epitaxial layer similar to that in the above example was grown by MBE, but the CdS quantum dots obtained in the above example could be confirmed by AFM. There wasn't.
[0033]
Although the invention made by the present inventor has been specifically described based on the embodiments, the present invention is not limited to the above embodiments.
For example, the processing conditions in step B in FIG. 1 can obtain the same effect even if the processing time is appropriately changed in the range of 5 minutes to 2 hours and the processing temperature is in the range of 150 ° C. to 300 ° C. The step A in FIG. 1, the amount of atomic hydrogen to be irradiated in B (pressure), 1 × 10 in order to perform the cleaning and flattening efficiently substrate surface - and 6 Torr or more, the burden of the vacuum device so as not to increase 1 × 10 - preferably set to 4 Torr or less. Further, the amount (pressure) of Zn irradiated in the process B should be determined in consideration of the fact that the substrate surface is not roughened and the burden on the vacuum apparatus.
[0034]
Further, the surface treatment method of the present invention is not limited to the case where a ZnTe single crystal is used as a substrate, and can be applied to the case where another ZnTe-based compound semiconductor is used as a substrate. For example, if a molecular beam source that irradiates simultaneously with atomic hydrogen in the surface treatment step is appropriately selected, it may be applicable to surface treatment when a II-VI group compound semiconductor or a III-V group compound semiconductor is used as a substrate. There is.
[0035]
【The invention's effect】
According to the present invention, in the surface treatment of the ZnTe-based compound semiconductor, at least a first surface treatment step of annealing in a temperature range of 150 ° C. to 300 ° C. while irradiating the ZnTe-based compound semiconductor substrate with at least Zn and atomic hydrogen. As a result, the flatness of the substrate surface can be improved, and the fine epitaxial layer that can be used for quantum dots or the like can be uniformly grown on the substrate.
[Brief description of the drawings]
FIG. 1 is an explanatory diagram showing a temperature profile of a surface treatment process according to an embodiment.
Claims (3)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2002380757A JP4216580B2 (en) | 2002-12-27 | 2002-12-27 | ZnTe compound semiconductor surface treatment method and semiconductor device manufacturing method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2002380757A JP4216580B2 (en) | 2002-12-27 | 2002-12-27 | ZnTe compound semiconductor surface treatment method and semiconductor device manufacturing method |
Related Child Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2008258525A Division JP4733729B2 (en) | 2008-10-03 | 2008-10-03 | ZnTe compound semiconductor surface treatment method and semiconductor device manufacturing method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2004214348A JP2004214348A (en) | 2004-07-29 |
| JP4216580B2 true JP4216580B2 (en) | 2009-01-28 |
Family
ID=32816890
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2002380757A Expired - Fee Related JP4216580B2 (en) | 2002-12-27 | 2002-12-27 | ZnTe compound semiconductor surface treatment method and semiconductor device manufacturing method |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP4216580B2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101840188B (en) * | 2009-03-19 | 2012-08-01 | 柯尼卡美能达商用科技株式会社 | Image forming device, printing system, and printing method |
-
2002
- 2002-12-27 JP JP2002380757A patent/JP4216580B2/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101840188B (en) * | 2009-03-19 | 2012-08-01 | 柯尼卡美能达商用科技株式会社 | Image forming device, printing system, and printing method |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2004214348A (en) | 2004-07-29 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP4849296B2 (en) | GaN substrate | |
| JP5361107B2 (en) | Method for improving the epitaxy quality (surface roughness and defect density) of aluminum nitride, indium, gallium ((Al, In, Ga) N) free-standing substrates for optoelectronic devices and electronics devices | |
| US6440823B1 (en) | Low defect density (Ga, Al, In)N and HVPE process for making same | |
| TWI445052B (en) | Growth of indium gallium nitride (ingan) on porous gallium nitride (gan) template by metal-organic chemical vapor deposition (mocvd) | |
| JP5212283B2 (en) | Group III nitride semiconductor free-standing substrate manufacturing method, group III nitride semiconductor free-standing substrate, group III nitride semiconductor device manufacturing method, and group III nitride semiconductor device | |
| US7125801B2 (en) | Method of manufacturing Group III nitride crystal substrate, etchant used in the method, Group III nitride crystal substrate, and semiconductor device including the same | |
| JP2005303246A (en) | METHOD OF GROWING HIGH QUALITY ZnSe EPITAXIAL LAYER ONTO NEW Si SUBSTRATE | |
| JP2007070154A (en) | Group iii-v nitride-based semiconductor substrate and its manufacturing method | |
| JP2005528795A (en) | Formation of lattice-matched semiconductor substrates | |
| JPH0831419B2 (en) | Method for producing compound semiconductor single crystal on single crystal silicon substrate | |
| CN113488565B (en) | Preparation method of aluminum nitride film | |
| JP4382748B2 (en) | Semiconductor crystal growth method | |
| JP4486435B2 (en) | Group III nitride crystal substrate manufacturing method and etching solution used therefor | |
| JP2004244307A (en) | Method for producing group iii nitride substrate, and semiconductor device | |
| JP2001192300A (en) | Nitride-based compound semiconductor substrate and method of producing the same | |
| JP4301592B2 (en) | Manufacturing method of substrate with nitride semiconductor layer | |
| JP2004111848A (en) | Sapphire substrate, epitaxial substrate using it, and its manufacturing method | |
| JP3244980B2 (en) | Method for manufacturing semiconductor device | |
| JPH02243592A (en) | Epitaxial growth of compound semiconductor | |
| JP2006062931A (en) | Sapphire substrate and its heat treatment method, and method of crystal growth | |
| JP4100759B2 (en) | Method for manufacturing compound semiconductor device | |
| JP4733729B2 (en) | ZnTe compound semiconductor surface treatment method and semiconductor device manufacturing method | |
| JP4216580B2 (en) | ZnTe compound semiconductor surface treatment method and semiconductor device manufacturing method | |
| EP3435407A1 (en) | Method for producing group iii nitride laminate | |
| JP2004307253A (en) | Method for manufacturing semiconductor substrate |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20051219 |
|
| A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20080418 |
|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20080430 |
|
| A521 | Written amendment |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20080630 |
|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20080805 |
|
| A521 | Written amendment |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20081003 |
|
| TRDD | Decision of grant or rejection written | ||
| A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20081028 |
|
| A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 |
|
| A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20081106 |
|
| R150 | Certificate of patent or registration of utility model |
Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20111114 Year of fee payment: 3 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20111114 Year of fee payment: 3 |
|
| S111 | Request for change of ownership or part of ownership |
Free format text: JAPANESE INTERMEDIATE CODE: R313115 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20111114 Year of fee payment: 3 |
|
| R350 | Written notification of registration of transfer |
Free format text: JAPANESE INTERMEDIATE CODE: R350 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20111114 Year of fee payment: 3 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20121114 Year of fee payment: 4 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20121114 Year of fee payment: 4 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20131114 Year of fee payment: 5 |
|
| S531 | Written request for registration of change of domicile |
Free format text: JAPANESE INTERMEDIATE CODE: R313531 |
|
| S533 | Written request for registration of change of name |
Free format text: JAPANESE INTERMEDIATE CODE: R313533 |
|
| R350 | Written notification of registration of transfer |
Free format text: JAPANESE INTERMEDIATE CODE: R350 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| LAPS | Cancellation because of no payment of annual fees |