JP2870061B2 - Super lattice structure element - Google Patents

Super lattice structure element

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Publication number
JP2870061B2
JP2870061B2 JP30051489A JP30051489A JP2870061B2 JP 2870061 B2 JP2870061 B2 JP 2870061B2 JP 30051489 A JP30051489 A JP 30051489A JP 30051489 A JP30051489 A JP 30051489A JP 2870061 B2 JP2870061 B2 JP 2870061B2
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JP
Japan
Prior art keywords
superlattice
substance
zns
buffer layer
znte
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
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JP30051489A
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Japanese (ja)
Other versions
JPH03159997A (en
Inventor
武 柄沢
和宏 大川
常男 三露
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Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
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Description

【発明の詳細な説明】 産業上の利用分野 本発明は、各種の電子素子,オプトエレクトロニクス
素子など、高品質の結晶性を必要とする超格子構造を利
用した超格子構造素子に関する。
Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a superlattice structure element using a superlattice structure requiring high quality crystallinity, such as various electronic elements and optoelectronic elements.

従来の技術 超格子は自然界には存在しない原子,分子配列をもつ
物質を人工的に作製し、在来物質による機能の向上を図
ったり、新たな機能の創造をめざす試みとしてその研究
開発は近年益々盛んになってきている。とくにGaAs/AlA
s系などのIII−V族化合物半導体超格子を利用したもの
は既にデバイス化されているものもある。これらをはじ
めとして実用化されているヘテロ積層構造あるいは超格
子構造においては、基板と超格子、あるいは超格子を構
成している物質同士の結晶格子定数はきわめて近い値を
有しており、結晶欠陥を生ずることなく良質のヘテロエ
ピタキシャル成長が可能な組合せが比較的容易に得られ
ている。
2. Description of the Related Art Superlattices have recently been researched and developed as an attempt to improve the functions of existing materials or to create new functions by artificially producing substances with atomic and molecular arrangements that do not exist in nature. It is becoming more and more popular. Especially GaAs / AlA
Some devices using a III-V compound semiconductor superlattice such as an s-system have already been made into devices. In the hetero-stacked structure or the superlattice structure practically used in these and other ways, the crystal lattice constant between the substrate and the superlattice or the materials constituting the superlattice have extremely close values, and the crystal defect Thus, a combination capable of high-quality heteroepitaxial growth without causing cracks is relatively easily obtained.

一方、格子定数に数%あるいはそれ以上の差があり、
結晶成長にとっては無視し得ない影響があるが、他の物
質では代用が困難であるなどの理由から、これらの歪を
取り込んだ形でのいわゆる歪超格子も各種試みられてい
る。これは格子が若千の歪を有した状態で、かつ格子緩
和を起こしてしまわないようにエピタキシャル成長させ
ようとするものである。
On the other hand, there is a difference of several percent or more in the lattice constant,
Although there are effects that cannot be ignored on crystal growth, various strains of so-called strained superlattices in which these strains are incorporated have been tried because other substances are difficult to substitute. This is intended to make the lattice epitaxially grow in a state where the lattice has a little strain and not to cause lattice relaxation.

発明が解決しようとする課題 超格子の作製には各種の成膜方法が用いられている
が、制御性の良さからみてMBE法やMOCVD法が主流となっ
ている。超格子の構造は、その目的にもよるが周期がき
わめて短いもの、たとえば10ないし20Å程度のものを作
製する必要が生ずる場合もある。このような短周期構造
の正確な制御には、結晶成長速度の安定化,均一化が不
可欠である。基板温度を一定に保ち、MBE法であれば原
料の入ったセルの温度を精密に制御し分子線強度を一定
にするなどの対策は当然なされている。また、結晶性向
上のためにバッファー層を用いることはよく行なわれて
いる。しかしながら、本発明者らは結晶成長速度がこれ
らの成長条件のみならず作製しようとする超格子の構造
自体、とくにバッファー層の物質に依存してしまうとい
う問題を見いだした。たとえば、物質Aと物質Bとで超
格子を組む場合、同一条件であってもAの成長速度がバ
ッファー層をAで形成するか、いずれでもない第3の物
質を用いるかによって異なってくる。例として第1図に
MBE法によりZnTe−ZnS超格子をGaAs基板上に直接成長さ
せた場合Aと、異なる物質によるバッファー層の上に成
長させた場合B,Cとで、この超格子を構成しているZnTe
層の成長速度が異なる様子を示している。横軸にシャッ
タ開時間(任意単位)をとり、縦軸にZnTe堆積速度(任
意単位)をとっている。成長時の条件はすべて統一して
ある。したがってZnTe層厚が異なるということは成長速
度の相違を意味している。
Problems to be Solved by the Invention Various film forming methods are used for fabricating a superlattice, but MBE and MOCVD are predominant from the viewpoint of good controllability. Depending on the purpose, the superlattice structure may need to have a very short period, for example, about 10 to 20 °. For accurate control of such a short-period structure, stabilization and uniformity of the crystal growth rate are indispensable. In the case of the MBE method, the substrate temperature is kept constant, and the temperature of the cell containing the raw materials is precisely controlled to take measures such as keeping the molecular beam intensity constant. In addition, it is common to use a buffer layer to improve crystallinity. However, the present inventors have found a problem that the crystal growth rate depends not only on these growth conditions but also on the superlattice structure to be prepared itself, particularly the material of the buffer layer. For example, when a superlattice is formed of the substance A and the substance B, the growth rate of A differs depending on whether the buffer layer is formed of A or a third substance other than the above is used even under the same conditions. See Figure 1 for an example
The ZnTe-ZnS superlattice grown directly on the GaAs substrate by the MBE method and the B and C ZnTe-ZnS superlattices grown on the buffer layer made of a different material have different ZnTe-ZnS superlattices.
It shows how the growth rates of the layers are different. The horizontal axis indicates the shutter open time (arbitrary unit), and the vertical axis indicates the ZnTe deposition rate (arbitrary unit). All growth conditions are unified. Therefore, different ZnTe layer thicknesses mean different growth rates.

一方、バッファー層は何でも良いというわけにはいか
ず、その利用目的に応じて選択の範囲は当然限られ、基
板と異なる物質を必要とする場合もある。さらにデバイ
ス構成において下地としてパターンが形成されており、
異なる物質上に同一構造の超格子を成長させる必要があ
る場合、超格子を構成する各層の成長速度が場所によっ
て異なるようでは意図するデバイス作製が困難となる。
On the other hand, the buffer layer is not limited to anything, and the range of selection is naturally limited depending on the purpose of use, and a substance different from the substrate may be required in some cases. Furthermore, a pattern is formed as a base in the device configuration,
When it is necessary to grow a superlattice having the same structure on different materials, it is difficult to manufacture an intended device if the growth rate of each layer constituting the superlattice is different depending on the location.

本発明はこのような従来の課題を解決するものであ
り、異なる物質上に形成する超格子の各層の成長速度を
均一にし、同一構造,同一膜厚の超格子構造素子を提供
することを目的とするものである。
An object of the present invention is to solve such a conventional problem and to provide a superlattice structure element having the same structure and the same thickness by making the growth rates of the respective layers of the superlattice formed on different materials uniform. It is assumed that.

課題を解決するための手段 そこで本発明においては、基板と異なる物質によるバ
ッファー層を形成する際に基板の格子定数との差異が1
%未満であるような格子定数を有する物質を用いること
により、基板上に直接およびバッファー層上に超格子を
成長させる部分が同一工程に存在する場合にも成長速度
が均一になるようにするものである。
Means for Solving the Problems Therefore, in the present invention, when a buffer layer is formed of a substance different from the substrate, the difference between the lattice constant of the substrate and the substrate is one.
%, By using a substance having a lattice constant of less than 1% so that the growth rate becomes uniform even when the portion for growing the superlattice directly on the substrate and on the buffer layer are present in the same step. It is.

作用 格子定数がほぼ等しければ超格子成長中の各層の成長
速度が等しくなるメカニズムは必ずしも明らかではない
が、格子定数の相違に起因する歪が影響しているものと
考えられる。圧縮応力が働くときは飛来する分子あるい
は原子の付着を妨げる傾向にあり、引張応力の時は逆に
付着を助ける傾向にある。したがって、格子定数が近い
ものであれぱ基板上もバッファー層上も等しい成長速度
が得られる。
Action The mechanism by which the growth rates of the respective layers during superlattice growth are equal if the lattice constants are substantially equal is not necessarily clear, but it is considered that the strain caused by the difference in the lattice constants is affecting. When compressive stress is applied, it tends to hinder the attachment of flying molecules or atoms, and when tensile stress is applied, it tends to assist in attachment. Therefore, even if the lattice constant is close, the same growth rate can be obtained on both the substrate and the buffer layer.

実施例 本発明は格子定数の異なる物質の組合せによる超格子
の作製に広く利用できるものであるが、ここでは実施例
としてII−VI族化合物半導体による超格子をIII−V族
化合物半導体基板上に形成する場合について説明する。
Embodiments The present invention can be widely used for producing a superlattice by a combination of substances having different lattice constants.Here, as an example, a superlattice made of a II-VI compound semiconductor is formed on a III-V compound semiconductor substrate. The case of forming will be described.

GaAs(aGaAs=5.6533Å)基板上にZnTe(aZnTe=6.1037
Å)およびZnS(aZnS=5.4093Å)からなる超格子の形
成を次のように行なう。ZnTe−ZnS系超格子結晶成長
は、超高真空下での高純度、非平衡状態での低温成長、
分子線のシャッター操作による瞬時の切り替えによる急
峻な界面などの利点を考え、分子線エピタキシー装置
(MBE装置)を用いる。第2図にMBE装置の概略構成図を
示す。成長室部分のみを示し、ロードロック室,基板移
動機構などは省略してある。基板ホルダー5にセットさ
れたGaAs基板4は加熱機構3によって必要な温度に加熱
される。成長室1内の真空度は電離真空計7で、また残
留ガスは四重極型質量分析装置6によってモニターされ
る。薄膜結晶成長中の様子は反射高速電子線回折(RHEE
D)9によって観察し、そのパターンはスクリーン8に
映し出される。
ZnTe (a ZnTe = 6.1037) on a GaAs (a GaAs = 5.6533Å) substrate
The superlattice composed of Å) and ZnS (a ZnS = 5.4093Å) is formed as follows. ZnTe-ZnS-based superlattice crystal growth is high-purity under ultra-high vacuum, low-temperature growth in non-equilibrium state,
Considering the advantages such as a steep interface due to instantaneous switching by molecular beam shutter operation, a molecular beam epitaxy device (MBE device) is used. FIG. 2 shows a schematic configuration diagram of the MBE apparatus. Only a growth chamber portion is shown, and a load lock chamber, a substrate moving mechanism, and the like are omitted. The GaAs substrate 4 set on the substrate holder 5 is heated to a required temperature by the heating mechanism 3. The degree of vacuum in the growth chamber 1 is monitored by an ionization gauge 7, and the residual gas is monitored by a quadrupole mass spectrometer 6. During the growth of the thin film crystal, reflection high-energy electron diffraction (RHEE)
D) Observe by 9 and the pattern is projected on the screen 8.

排気系2で成長室1内を10-10Torr台まで排気し、ま
た原料の入ったセル11a〜11dをそれぞれ所定の分子線強
度が得られる温度にして安定した後、GaAs基板4の温度
を600℃に上げ、表面酸化膜を離脱させる。このときRHE
EDパターンのシャープなストリークを観察することによ
りこのサーマルエッチングが完了したことを確認する。
次に基板温度を目的に応じておよそ200〜350℃に下げ、
超格子形成を開始する。
After evacuation of the inside of the growth chamber 1 to the order of 10 −10 Torr by the exhaust system 2 and stabilization of the cells 11 a to 11 d containing the raw materials to a temperature at which a predetermined molecular beam intensity can be obtained, the temperature of the GaAs substrate 4 is reduced. Raise the temperature to 600 ° C to release the surface oxide film. At this time, RHE
The completion of this thermal etching is confirmed by observing sharp streaks in the ED pattern.
Next, lower the substrate temperature to approximately 200-350 ° C, depending on the purpose,
Start superlattice formation.

まず、ZnSeバッファー層 (aZnSe=5.6687Å)を形成する。その際にはALE法でも
MBE法でもかまわないが、時間的にはMBE法の方が速いの
で、後者を例にとる。ZnおよびSeそれぞれ単体の原料の
入ったセル11aおよび11dのシャッター10aと10dを同時に
開け、所定の時間の後に閉じる。基板温度が330℃、Zn
およびSeの分子線強度がそれぞれ2×10-7,8×10-7Torr
(電離真空計によるフラックスモニター値)において1
時間でおよそ500Å堆積した。この時の基板温度はALE法
で用いるには高すぎるので、240℃に下げたのちに超格
子成長に移った。分子線強度は一定のままである。堆積
する物質の切り替えはシャッター10a〜10dの開閉により
行う。すなわち、ZnS堆積中にはZnS原料の入ったセル11
cのシャッター10cをあけ、他のものは閉じておき、一定
時間の後にZnSのシャッター10cを閉じる。ZnTeおよびZn
Sの分子線強度は1×10-6、7×10-7Torrである。ここ
では超高真空中での扱いを考え、ZnS化合物原料を用い
たが、ZnおよびSそれぞれの単体原料あるいはSをH2S
ガスのクラッキングにより供給してもかまわない。次に
適当なインターバル(1〜数秒)の後にZnおよびTe原料
の入ったセル11aおよび11bのシャッター10aと10bを開
け、一定時間の後に閉じる。この操作を繰り返し、ZnS
とZnTeとを交互に積層する。
First, a ZnSe buffer layer (aZnSe = 5.6687 °) is formed. In that case, even with the ALE method
The MBE method can be used, but the latter is taken as an example because the MBE method is faster in terms of time. The shutters 10a and 10d of the cells 11a and 11d containing the raw materials of Zn and Se, respectively, are simultaneously opened and closed after a predetermined time. Substrate temperature 330 ° C, Zn
And Se molecular beam intensities are 2 × 10 -7 and 8 × 10 -7 Torr, respectively.
(Flux monitor value by ionization gauge) 1
Approximately 500 で was deposited in an hour. Since the substrate temperature at this time was too high to be used in the ALE method, the temperature was lowered to 240 ° C., and then, the superlattice growth was started. The molecular beam intensity remains constant. The material to be deposited is switched by opening and closing the shutters 10a to 10d. That is, during the ZnS deposition, the cell 11 containing the ZnS raw material was
The shutter 10c of c is opened, the others are closed, and after a certain time, the shutter 10c of ZnS is closed. ZnTe and Zn
The molecular beam intensity of S is 1 × 10 −6 and 7 × 10 −7 Torr. Here consider the handling of in ultrahigh vacuum, was used ZnS compound materials, Zn and S each single raw material or S H 2 S
The gas may be supplied by cracking. Next, after an appropriate interval (1 to several seconds), the shutters 10a and 10b of the cells 11a and 11b containing the Zn and Te raw materials are opened and closed after a certain time. Repeat this operation until the ZnS
And ZnTe are alternately laminated.

以上のようにZnSeバッファー層を形成したのちにその
上にZnTe−ZnS超格子を形成した場合の超格子を構成す
るZnTe層の積層数とZnおよびTeのシャッターを開けてい
る時間との関係を第3図に示す。比較のためにZnSeバッ
ファー層のない場合も示してある。バッファー層のない
ものは、GaAs基板のサーマルエッチングののちに基板温
度を直接240℃に下げ、まったく同様の条件で超格子を
成長させた試料である。この図から明らかなように、Zn
Te−ZnS超格子をGaAs基板上に直接成長させた場合とZnS
eバッファー層を用いた場合とでZnTe層形成速度がとも
に等しく、ZnTeの付着係数の均一化が図られていること
がわかる。
As described above, the relationship between the number of stacked ZnTe layers constituting the superlattice and the time for opening the Zn and Te shutters when a ZnSe buffer layer is formed thereon and then a ZnTe-ZnS superlattice is formed thereon. As shown in FIG. For comparison, the case without the ZnSe buffer layer is also shown. The sample without a buffer layer was a sample in which the substrate temperature was directly lowered to 240 ° C. after thermal etching of the GaAs substrate, and a superlattice was grown under exactly the same conditions. As is clear from this figure, Zn
Te-ZnS superlattice grown directly on GaAs substrate and ZnS
It can be seen that the formation rate of the ZnTe layer is equal to that in the case where the e-buffer layer is used, and that the adhesion coefficient of ZnTe is made uniform.

以上はIII−V族化合物半導体基板(物質S)としてG
aAsを用い、超格子としてのII−VI族化合物半導体とし
てZnTe(物質A)とZnS(物質B),バッファー層とし
てZnSe(物質C)を用いた場合について説明した。基板
の格子定数とバッファー層の格子定数との差異はできる
限り小さいことが望ましいが、実用上許容される差異は
1%未満である。なお・格子定数の差異が1%未満であ
り、かつ実存する物質を用いたものとして、’以下のよ
うな組み合わせも可能である。
The above description is based on a III-V compound semiconductor substrate (substance S).
The case where aAs is used, ZnTe (substance A) and ZnS (substance B) are used as the superlattice group II-VI compound semiconductor, and ZnSe (substance C) is used as the buffer layer has been described. It is desirable that the difference between the lattice constant of the substrate and the lattice constant of the buffer layer be as small as possible, but the difference that is practically acceptable is less than 1%. The following combinations are also possible, assuming that the difference in lattice constant is less than 1% and an existing substance is used.

発明の効果 本発明によれば、基板上およびバッファー層上ともに
超格子成長速度を均一にできるため、超格子構造の制御
性を向上させ、また下地のパターンなどにより同時に異
なる物質上に成長させる際にも同一構造を形成できる。
Effect of the Invention According to the present invention, the superlattice growth rate can be made uniform on both the substrate and the buffer layer, so that the controllability of the superlattice structure is improved. The same structure can also be formed.

【図面の簡単な説明】[Brief description of the drawings]

第1図は超格子を成長させたときに、バッファー層あり
(A)、なし(B)および物質の相違が格子定数が大き
な方の物質の実際の層数に影響を与えている様子を示す
図、第2図は実施例における超格子作製に用いる分子線
エピタキシー装置の概略構成図、第3図は本発明による
バッファー層の効果を示す図である。 4……基板。
FIG. 1 shows that when a superlattice is grown, a buffer layer is present (A), there is no buffer layer (B), and the difference between the substances affects the actual number of layers of a substance having a larger lattice constant. FIG. 2 is a schematic configuration diagram of a molecular beam epitaxy apparatus used for fabricating a superlattice in the embodiment, and FIG. 3 is a diagram showing an effect of a buffer layer according to the present invention. 4 ... substrate.

フロントページの続き (56)参考文献 特開 平3−93221(JP,A) 特開 平2−92899(JP,A) 特開 平3−20096(JP,A) 特開 平1−289257(JP,A) 特開 平2−114648(JP,A) 特開 平2−263798(JP,A) 特開 平2−285630(JP,A) 特開 平2−289499(JP,A) 特開 平3−159990(JP,A) 特開 昭62−243144(JP,A) 特開 昭64−45113(JP,A) 特開 平2−96384(JP,A) (58)調査した分野(Int.Cl.6,DB名) C30B 28/00 - 35/00 H01S 3/096 H01S 3/103 H01S 3/133 H01S 3/18 - 3/19 Continuation of the front page (56) References JP-A-3-93221 (JP, A) JP-A-2-92899 (JP, A) JP-A-3-20096 (JP, A) JP-A-1-289257 (JP) JP-A-2-114648 (JP, A) JP-A-2-263798 (JP, A) JP-A-2-285630 (JP, A) JP-A-2-289499 (JP, A) 3-159990 (JP, A) JP-A-62-243144 (JP, A) JP-A-64-45113 (JP, A) JP-A-2-96384 (JP, A) (58) Fields investigated (Int. Cl. 6 , DB name) C30B 28/00-35/00 H01S 3/096 H01S 3/103 H01S 3/133 H01S 3/18-3/19

Claims (4)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】格子定数aSなる物質Sよりなる基板上に、
前記格子定数aSとの差異が1%未満であるような格子定
数を有する物質Cよりなるバッファー層を形成し、その
上に格子定数aAがaA>aSなる関係にある物質Aよりなる
層および格子定数aBがaS>aBなる関係にある物質Bより
なる層を交互に積層したことを特徴とする超格子構造素
子。
To 1. A substrate made of a lattice constant a S becomes substance S,
A buffer layer made of a substance C having a lattice constant whose difference from the lattice constant a S is less than 1% is formed, and a lattice constant a A is formed on the buffer layer from a substance A having a relation of a A > a S. 1. A superlattice structure element comprising: layers of materials B having a relationship of a S > a B with a lattice constant of a S > a B.
【請求項2】物資SとしてGaAs、物質AとしてZnTe,Cd
S,CdSeまたはCdTe、物質BとしてZnS、物質CとしてZnS
eを用いた請求項1記載の超格子構造素子。
2. The material S is GaAs, and the material A is ZnTe, Cd.
S, CdSe or CdTe, ZnS as substance B, ZnS as substance C
2. The superlattice structure element according to claim 1, wherein e is used.
【請求項3】物資SとしてInP、物質AとしてZnTe,CdSe
またはCdTe、物質BとしてZnSまたはZnSe、物質Cとし
てCdSを用いた請求項1記載の超格子構造素子。
3. The material S is InP, and the substance A is ZnTe, CdSe.
2. The superlattice structure element according to claim 1, wherein CdTe, ZnS or ZnSe as the substance B, and CdS as the substance C are used.
【請求項4】物資SとしてInAsまたはGaSb、物質Aとし
てCdTe、物質BとしてCdS,ZnSeまたはZnS、物質Cとし
てZnTeを用いた請求項1記載の超格子構造素子。
4. The superlattice structure element according to claim 1, wherein InAs or GaSb is used as the material S, CdTe is used as the material A, CdS, ZnSe or ZnS is used as the material B, and ZnTe is used as the material C.
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